Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations

We investigate the feasibility of developing a comprehensive gate delay and slew models which incorporates output load, input edge slew, supply voltage, temperature, global process variations and local process variations all in the same model. We find that the standard polynomial models cannot handle such a large heterogeneous set of input variables. We instead use neural networks, which are well known for their ability to approximate any arbitrary continuous function. Our initial experiments with a small subset of standard cell gates of an industrial 65 nm library show promising results with error in mean less than 1%, error in standard deviation less than 3% and maximum error less than 11% as compared to SPICE for models covering 0.9- 1.1 V of supply, -40degC to 125degC of temperature, load, slew and global and local process parameters. Enhancing the conventional libraries to be voltage and temperature scalable with similar accuracy requires on an average 4x more SPICE characterization runs.

On the fundamentally asynchronous nature of interference in cooperative base station systems

Cooperative transmission by base stations can significantly improve the spectral efficiency of multiuser, multi-cell multiple input multiple output systems. We show that in such systems the multiuser interference is asynchronous by nature, even when perfect timing-advance mechanisms ensure that the desired signal components arrive synchronously. We establish an accurate mathematical model for the asynchronism, and use it to show that the asynchronism leads to a significant performance degradation of existing linear preceding designs that assumed synchronous interference. We consider three different previously proposed precoding designs, and show how to modify them to effectively mitigate asynchronous interference.