970 resultados para AREA OPTOELECTRONIC DEVICES
Resumo:
The carrier density dependent current-voltage (J V) characteristics of electrochemically prepared poly(3-methylthiophene) (P3MeT) have been investigated in Pt/P3MeT/Al devices, as a function of temperature from 280 to 84 K. In these devices, the charge transport is found to be mainly governed by different transport regimes of space charge limited conduction (SCLC). In a lightly doped device, SCLC controlled by exponentially distributed traps (Vl+1 law, l > 1) is observed in the intermediate voltage range (0.5-2 V) at all temperatures. However, at higher bias (> 2 V), the current deviates from the usual Vl+1 law where the slope is found to be less than 2 of the logJ-logV plot, which is attributed to the presence of the injection barrier. These deviations gradually disappear at higher doping level due to reduction in the injection barrier. Numerical simulations of the Vl+1 law by introducing the injection barrier show good agreement with experimental data. The results show that carrier density can tune the charge transport mechanism in Pt/P3MeT/Al devices to understand the non-Ohmic behavior. The plausible reasons for the origin of injection barrier and the transitions in the transport mechanism with carrier density are discussed. (C) 2015 AIP Publishing LLC.
Resumo:
We discuss here a semiconductors assembly comprising of titanium dioxide (TiO2) rods sensitized by cadmium sulfide (CdS) nanocrystals for potential applications in large area electronics on three dimensional (3-D) substrates. Vertically aligned TiO2 rods are grown on a substrate using a 150 degrees C process flow and then sensitized with CdS by SILAR method at room temperature. This structure forms an effective photoconductor as the photo-generated electrons are rapidly removed from the CdS via the TiO2 thereby permitting a hole rich CdS. Current-voltage characteristics are measured and models illustrate space charge limited photo-current as the mechanism of charge transport at moderate voltage bias. The stable assembly and high speed are achieved. The frequency response with a loading of 10 pF and 9 M Omega shows a half power frequency of 100 Hz. (C) 2015 The Electrochemical Society. All rights reserved.
Resumo:
In this paper, we study breakdown characteristics in shallow-trench isolation (STI)-type drain-extended MOSFETs (DeMOS) fabricated using a low-power 65-nm triple-well CMOS process with a thin gate oxide. Experimental data of p-type STI-DeMOS device showed distinct two-stage behavior in breakdown characteristics in both OFF-and ON-states, unlike the n-type device, causing a reduction in the breakdown voltage and safe operating area. The first-stage breakdown occurs due to punchthrough in the vertical structure formed by p-well, deep n-well, and p-substrate, whereas the second-stage breakdown occurs due to avalanche breakdown of lateral n-well/p-well junction. The breakdown characteristics are also compared with the STI-DeNMOS device structure. Using the experimental results and advanced TCAD simulations, a complete understanding of breakdown mechanisms is provided in this paper for STI-DeMOS devices in advanced CMOS processes.
Resumo:
Shallow-trench isolation drain extended pMOS (STI-DePMOS) devices show a distinct two-stage breakdown. The impact of p-well and deep-n-well doping profile on breakdown characteristics is investigated based on TCAD simulations. Design guidelines for p-well and deep-n-well doping profile are developed to shift the onset of the first-stage breakdown to a higher drain voltage and to avoid vertical punch-through leading to early breakdown. An optimal ratio between the OFF-state breakdown voltage and the ON-state resistance could be obtained. Furthermore, the impact of p-well/deep-n-well doping profile on the figure of merits of analog and digital performance is studied. This paper aids in the design of STI drain extended MOSFET devices for widest safe operating area and optimal mixed-signal performance in advanced system-on-chip input-output process technologies.
Resumo:
Two-dimensional materials and their heterostructures have emerged as a new class of materials, not only for fundamental physics but also for electronic and optoelectronic applications. Black phosphorus (BP) is a relatively new addition to this class of materials. Its strong in-plane anisotropy makes BP a unique material for making conceptually new types of electronic devices. However, the global density of states (DOS) of BP in device geometry has not been measured experimentally. Here, we report the quantum capacitance measurements together with the conductance measurements on an hBN-protected few-layer BP (similar to six layers) in a dual-gated field effect transistor (FET) geometry. The measured DOS from our quantum capacitance is compared with density functional theory (DFT). Our results reveal that the transport gap for quantum capacitance is smaller than that in conductance measurements due to the presence of localized states near the band edge. The presence of localized states is confirmed by the variable range hopping seen in our temperature dependence conductivity. A large asymmetry is observed between the electron and hole side. This asymmetric nature is attributed to the anisotropic band dispersion of BP. Our measurements establish the uniqueness of quantum capacitance in probing the localized states near the band edge, hitherto not seen in conductance measurements.
Resumo:
Quantum cellular automata (QCA) is a new technology in the nanometer scale and has been considered as one of the alternative to CMOS technology. In this paper, we describe the design and layout of a serial memory and parallel memory, showing the layout of individual memory cells. Assuming that we can fabricate cells which are separated by 10nm, memory capacities of over 1.6 Gbit/cm2 can be achieved. Simulations on the proposed memories were carried out using QCADesigner, a layout and simulation tool for QCA. During the design, we have tried to reduce the number of cells as well as to reduce the area which is found to be 86.16sq mm and 0.12 nm2 area with the QCA based memory cell. We have also achieved an increase in efficiency by 40%.These circuits are the building block of nano processors and provide us to understand the nano devices of the future.
Resumo:
An innovative technique to obtain high-surface-area mesostructured carbon (2545m(2)g(-1)) with significant microporosity uses Teflon as the silica template removal agent. This method not only shortens synthesis time by combining silica removal and carbonization in a single step, but also assists in ultrafast removal of the template (in 10min) with complete elimination of toxic HF usage. The obtained carbon material (JNC-1) displays excellent CO2 capture ability (ca. 26.2wt% at 0 degrees C under 0.88bar CO2 pressure), which is twice that of CMK-3 obtained by the HF etching method (13.0wt%). JNC-1 demonstrated higher H-2 adsorption capacity (2.8wt%) compared to CMK-3 (1.2wt%) at -196 degrees C under 1.0bar H-2 pressure. The bimodal pore architecture of JNC-1 led to superior supercapacitor performance, with a specific capacitance of 292Fg(-1) and 182Fg(-1) at a drain rate of 1Ag(-1) and 50Ag(-1), respectively, in 1m H2SO4 compared to CMK-3 and activated carbon.
Resumo:
An innovative technique to obtain high-surface-area mesostructured carbon (2545m(2)g(-1)) with significant microporosity uses Teflon as the silica template removal agent. This method not only shortens synthesis time by combining silica removal and carbonization in a single step, but also assists in ultrafast removal of the template (in 10min) with complete elimination of toxic HF usage. The obtained carbon material (JNC-1) displays excellent CO2 capture ability (ca. 26.2wt% at 0 degrees C under 0.88bar CO2 pressure), which is twice that of CMK-3 obtained by the HF etching method (13.0wt%). JNC-1 demonstrated higher H-2 adsorption capacity (2.8wt%) compared to CMK-3 (1.2wt%) at -196 degrees C under 1.0bar H-2 pressure. The bimodal pore architecture of JNC-1 led to superior supercapacitor performance, with a specific capacitance of 292Fg(-1) and 182Fg(-1) at a drain rate of 1Ag(-1) and 50Ag(-1), respectively, in 1m H2SO4 compared to CMK-3 and activated carbon.
Resumo:
The emergence of multiple Dirac cones in hexagonal boron nitride (hBN)-graphene heterostructures is particularly attractive because it offers potentially better landscape for higher and versatile transport properties than the primary Dirac cone. However, the transport coefficients of the cloned Dirac cones is yet not fully characterized and many open questions, including the evolution of charge dynamics and impurity scattering responsible for them, have remained unexplored. Noise measurements, having the potential to address these questions, have not been performed to date in dual-gated hBN graphene hBN devices. Here, we present the low frequency 1/f noise measurements at multiple Dirac cones in hBN encapsulated single and bilayer graphene in dual-gated geometry. Our results reveal that the low-frequency noise in graphene can be tuned by more than two-orders of magnitude by changing carrier concentration as well as by modifying the band structure in bilayer graphene. We find that the noise is surprisingly suppressed at the cloned Dirac cone compared to the primary Dirac cone in single layer graphene device, while it is strongly enhanced for the bilayer graphene with band gap opening. The results are explained with the calculation of dielectric function using tight-binding model. Our results also indicate that the 1/f noise indeed follows the Hooge's empirical formula in hBN-protected devices in dual-gated geometry. We also present for the first time the noise data in bipolar regime of a graphene device.
Resumo:
Restricted area heterojunctions, an array of lead sulfide colloidal quantum dots (PbS-CQDs) and crystalline silicon, are studied with a non-destructive remote contact light beam induced current (RC-LBIC) technique. As well as getting good quality active area images we observed an anomalous unipolar signal response for the PbS-CQD/n-Si devices and a conventionally expected bipolar signal profile for the PbS-CQD/p-Si devices. Interestingly, our simulation results consistently yielded a unipolar and bipolar nature in the signals related to the PbSCQD/n-Si and PbS-CQD/p-Si heterostructures, respectively. In order to explain the physical mechanism involved in the unipolar signal response of the PbS-CQD/n-Si devices, we propose a model based on the band alignment in the heterojunctions, in addition to the distribution of photo-induced excess majority carriers across the junction. Given that the RC-LBIC technique is well suited to this context, the presence of these two distinct mechanisms (the bipolar and unipolar nature of the signals) needs to be considered in order to have a better interpretation of the data in the characterization of an array of homo/heterojunctions.
Resumo:
We demonstrate all inorganic, robust, cost-effective, spin-coated, two-terminal capacitive memory metal-oxide nanoparticle-oxide-semiconductor devices with cadmium telluride nanoparticles sandwiched between aluminum oxide phosphate layers to form the dielectric memory stack. Using a novel high-speed circuit to decouple reading and writing, experimentally measured memory windows, programming voltages, retention times, and endurance are comparable with or better than the two-terminal memory devices realized using other fabrication techniques.
Resumo:
The phenomena of the 'piling up' and 'sinking-in' of surface profiles in conical indentation in elastic-plastic solids with work hardening are studied using dimensional and finite-element analysis. The degree of sinking in and piling up is shown to depend on the ratio of the initial yield strength Y to Young's modulus E and on the work-hardening exponent n. The widely used procedure proposed by Oliver and Pharr for estimating contact depth is then evaluated systematically. By comparing the contact depth obtained directly from finite-element calculations with that obtained from the initial unloading slope using the Oliver-Pharr procedure, the applicability of the procedure is discussed.
Resumo:
In this paper, construction of hybrid device by integrating nanowires with F1-ATPase motors is described. The nickel nanowires and multi-segment nanowires, including gold and nickel, were fabricated by electrochemical deposition in nanoporous templates. The nickel nanowires functionalized by biotinylated peptide can be assembled directly onto F1-ATPase motors to act as the propellers. If the multicomponent nanowires, including gold and nickel, were selectively functionalized by the thiol group modified ssDNA and the synthetic peptide, respectively, the biotinylated F1- ATPase motors can be attached to the biotinylated peptide on nickel segment of the nanowires. Then, the multi-component nanowires can also be used as the propellers, and one may observe the rotations of the multi-component nanowires driven by F1-ATPase motors. Therefore, introduction of multiple segments along the length of a nanowire can lead to a variety of multiple chemical functionalities, which can be selectively bound to cells and special biomolecules. This method provides an insight for the construction of other hybrid devices with its controlling arrangement of different biomolecule on designed nanometer scale structures.
Resumo:
A new area function is introduced and applied to a Berkovich tip in order to characterize the contact projected area between an indenter and indented material. The function can be related directly to tip-rounding, thereby having obviously physical meaning. Nanoindentation experiments are performed on a commercial Nano Indenter XPsystem. The other two area functions introduced by Oliver and Pharr and by Thurn and Cook respectively are involved in this paper for comparison. By comparison from experimental results among different area functions, the indenter tip described by the proposed area function here is very close to the experimental indenter.