Sarah Kane: Cool Britannia's reluctant feminist

Aleks Sierz in his important survey of mid 1990s drama has identified the plays of Sarah Kane as exemplars of what he terms ‘In-Yer Face’ theatre. Sierz argues that Kane and her contemporaries such as Mark Ravenhill and Judy Upton represent a break with the ideological concerns of the previous generation of playwrights such as Doug Lucie and Stephen Lowe, whose work was shaped through recognizable political concerns, often in direct opposition to Thatcherism. In contrast Sarah Kane and her generation have frequently been seen as literary embodiments of ‘Thatcher’s Children’, whereby following the fall of the Berlin Wall and the inertia of the Major years, their drama eschews a recognizable political position, and seems more preoccupied with the plight of individuals cut adrift from society. In the case of Sarah Kane her frequently quoted statement, ‘I have no responsibility as a woman writer because I don’t believe there’s such a thing’, has compounded this perception. Moreover, its dogmatism also echoes the infamous comments attributed to Mrs Thatcher regarding the role of the individual to society. However, this article seeks to reassess Kane’s position as a woman writer and will argue that her drama is positioned somewhere between the female playwrights who emerged after 1979 such as Sarah Daniels, Timberlake Wertenbaker and Clare McIntyre, whose drama was distinguished by overtly feminist concerns, and its subsequent breakdown, best exemplified by the brief cultural moment associated with the newly elected Blair government known as ‘Cool Britannia’. Drawing on a variety of sources, including Kane’s unpublished monologues, written while she was a student just after Mrs Thatcher left office, this paper will argue that far from being an exponent of post-feminism, Kane’s drama frequently revisits and is influenced by the generation of dramatists whose work was forged out the sharp ideological positions that characterized the 1980s and a direct consequence of Thatcherism.

Modification of cell wall properties in lettuce improves shelf life

It is proposed that post-harvest longevity and appearance of salad crops is closely linked to pre-harvest leaf morphology (cell and leaf size) and biophysical structure (leaf strength). Transgenic lettuce plants (Lactuca sativa cv. Valeria) were produced in which the production of the cell wall-modifying enzyme xyloglucan endotransglucosylase/hydrolase (XTH) was down-regulated by antisense inhibition. Independently transformed lines were shown to have multiple members of the LsXTH gene family down-regulated in mature leaves of 6-week-old plants and during the course of shelf life. Consequently, xyloglucan endotransglucosylase (XET) enzyme activity and action were down-regulated in the cell walls of these leaves and it was established that leaf area and fresh weight were decreased while leaf strength was increased in the transgenic lines. Membrane permeability was reduced towards the end of shelf life in the transgenic lines relative to the controls and bacteria were evident inside the leaves of control plants only. Most importantly, an extended shelf-life of transgenic lines was observed relative to the non-transgenic control plants. These data illustrate the potential for engineering cell wall traits for improving quality and longevity of salad crops using either genetic modification directly, or by using markers associated with XTH genes to inform a commercial breeding programme.

Distributed acceleration of mobile radio network optimisation algorithms

The past decade has witnessed explosive growth of mobile subscribers and services. With the purpose of providing better-swifter-cheaper services, radio network optimisation plays a crucial role but faces enormous challenges. The concept of Dynamic Network Optimisation (DNO), therefore, has been introduced to optimally and continuously adjust network configurations, in response to changes in network conditions and traffic. However, the realization of DNO has been seriously hindered by the bottleneck of optimisation speed performance. An advanced distributed parallel solution is presented in this paper, as to bridge the gap by accelerating the sophisticated proprietary network optimisation algorithm, while maintaining the optimisation quality and numerical consistency. The ariesoACP product from Arieso Ltd serves as the main platform for acceleration. This solution has been prototyped, implemented and tested. Real-project based results exhibit a high scalability and substantial acceleration at an average speed-up of 2.5, 4.9 and 6.1 on a distributed 5-core, 9-core and 16-core system, respectively. This significantly outperforms other parallel solutions such as multi-threading. Furthermore, augmented optimisation outcome, alongside high correctness and self-consistency, have also been fulfilled. Overall, this is a breakthrough towards the realization of DNO.

Acceleration of radio network optimisation algorithms

The increasing demand for cheaper-faster-better services anytime and anywhere has made radio network optimisation much more complex than ever before. In order to dynamically optimise the serving network, Dynamic Network Optimisation (DNO), is proposed as the ultimate solution and future trend. The realization of DNO, however, has been hindered by a significant bottleneck of the optimisation speed as the network complexity grows. This paper presents a multi-threaded parallel solution to accelerate complicated proprietary network optimisation algorithms, under a rigid condition of numerical consistency. ariesoACP product from Arieso Ltd serves as the platform for parallelisation. This parallel solution has been benchmarked and results exhibit a high scalability and a run-time reduction by 11% to 42% based on the technology, subscriber density and blocking rate of a given network in comparison with the original version. Further, it is highly essential that the parallel version produces equivalent optimisation quality in terms of identical optimisation outputs.

A clocking technique with power savings in virtex-based pipelined designs

This paper presents the evaluation in power consumption of a clocking technique for pipelined designs. The technique shows a dynamic power consumption saving of around 30% over a conventional global clocking mechanism. The results were obtained from a series of experiments of a systolic circuit implemented in Virtex-II devices. The conversion from a global-clocked pipelined design to the proposed technique is straightforward, preserving the original datapath design. The savings can be used immediately either as a power reduction benefit or to increase the frequency of operation of a design for the same power consumption.

A n-Bit Reconfigurable Scalar Quantiser

A reconfigurable scalar quantiser capable of accepting n-bit input data is presented. The data length n can be varied in the range 1... N-1 under partial-run time reconfiguration, p-RTR. Issues as improvement in throughput using this reconfigurable quantiser of p-RTR against RTR for data of variable length are considered. The quantiser design referred to as the priority quantiser PQ is then compared against a direct design of the quantiser DIQ. It is then evaluated that for practical quantiser sizes, PQ shows better area usage when both are targeted onto the same FPGA. Other benefits are also identified.