Features of wave field, its effect to erosion - deposition processes in the Cua Dai (Hoi An), Cai river mouth (Nha Trang) and Phan Thiet Bay in typical local wind conditions

Based on the hydrodynamic model and Shore Protection Manual (CERC - USA) we have calculated wave field characteristics in the typical wind conditions (wind velocity equal to 13m/s in the high frequency direction of the wind regime). Comparison between measured and calculated wave parameters was presented and these results were corresponded to each other. The following main wave characteristics were calculated: -Pattern of the refraction wave field. -Average wave height field. -Longshore current velocity field in surf zone. From distribution features of wave field characteristics in research areas, it could be summarized as following: - The formation of wave fields in the research areas was unequal because of their local difference of hydrometeorological conditions, river discharge, bottom relief… - At Cuadai (Dai mouth, Hoian) area in the N direction of incident wave field, wave has caused serious variation of the coastline. The coastline in the whole region, especially, at the south of the mouth was eroded and the foreland in the north of the mouth was deposited. - At Cai river mouth (Nhatrang) area in the E direction of incident wave field, wave has effected strongly and directly to the inshore and channel structure. - At Phanthiet bay area in the SW direction of incident wave field, wave has effected strongly to the whole shoreline from Da point to Ne point and caused serious erosion.

Individual grain boundary properties and overall performance of metal-organic-deposition coated conductors

We have investigated single grain boundaries (GBs) isolated in coated conductors produced by Metal-Organic Deposition (MOD). When a magnetic field is swept in the film plane, an angle-dependent crossover from boundary to grain limited critical current density Jc is found. In the force-free orientation, even at fields as high as 8 T, the GBs still limit Jc. We deduce that this effect is a direct consequence of GB meandering. We have employed these single GB results to explain the dependence of Jc of polycrystalline tracks on their width: in-plane measurements become flatter as the tracks are narrowed down. This result is consistent with the stronger GB limitation at field configurations close to force-free found from the isolated boundaries. Our study shows that for certain geometries even at high fields the effect of GBs cannot be neglected.

Gas-phase production of multifunctional composite nanoparticles by photoinduced chemical vapor deposition

As these results indicate, photo-CVD coating is a robust process that allows for the creation of core-shell nanoparticles. In the present work we demonstrated that photo-CVD can effectively coat Fe2O3 particles with silica for purposes of biological applications. TDMA results combined with TEM images indicate that all particles are effectively coated and that particle coating thicknesses can be tuned to desired thickness depending on the application. In addition, the ability to vary coating properties and to coat high concentrations of particles makes this technique of interest for industrial production where uniform properties are needed for large quantities of particles [2]. Copyright © 2010 by ASME.

Properties of tetrahedral amorphous carbon prepared by vacuum arc deposition

The structural, optical, electrical and physical properties of amorphous carbon deposited from the filtered plasma stream of a vacuum arc were investigated. The structure was determined by electron diffraction, neutron diffraction and energy loss spectroscopy and the tetrahedral coordination of the material was confirmed. The measurements gave a nearest neighbour distance of 1.53 Å, a bond angle of 110 and a coordination number of four. A model is proposed in which the compressive stress generated in the film by energetic ion impact produces pressure and temperature conditions lying well inside the region of the carbon phase diagram within which diamond is stable. The model is confirmed by measurements of stress and plasmon energy as a function of ion energy. The model also predicts the formation of sp2-rich materials on the surface owing to stress relaxation and this is confirmed by a study of the surface plasmon energy. Some nuclear magnetic resonance, infrared and optical properties are reported and the behaviour of diodes using tetrahedral amorphous carbon is discussed. © 1991.

SoC energy savings = reduce+reuse+recycle: A case study using a 660MHz DC-DC converter with integrated output filter

This paper advocates 'reduce, reuse, recycle' as a complete energy savings strategy. While reduction has been common to date, there is growing need to emphasize reuse and recycling as well. We design a DC-DC buck converter to demonstrate the 3 techniques: reduce with low-swing and zero voltage switching (ZVS), reuse with supply stacking, and recycle with regulated delivery of excess energy to the output load. The efficiency gained from these 3 techniques helps offset the loss of operating drivers at very high switching frequencies which are needed to move the output filter completely on-chip. A prototype was fabricated in 0.18μm CMOS, operates at 660MHz, and converts 2.2V to 0.75-1.0V at ∼50mA.1 © 2008 IEEE.

Energy recovery from high-frequency clocks using DC-DC converters

Large digital chips use a significant amount of energy to distribute a multi-GHz clock. By discharging the clock network to ground every cycle, the energy stored in this large capacitor is wasted. Instead, the energy can be recovered using an on-chip DC-DC converter. This paper investigates the integration of two DC-DC converter topologies, boost and buck-boost, with a high-speed clock driver. The high operating frequency significantly shrinks the required size of the L and C components so they can be placed on-chip; typical converters place them off-chip. The clock driver and DC-DC converter are able to share the entire tapered buffer chain, including the widest drive transistors in the final stage. To achieve voltage regulation, the clock duty cycle must be modulated; implying only single-edge-triggered flops should be used. However, this minor drawback is eclipsed by the benefits: by recovering energy from the clock, the output power can actually exceed the additional power needed to operate the converter circuitry, resulting in an effective efficiency greater than 100%. Furthermore, the converter output can be used to operate additional power-saving features like low-voltage islands or body bias voltages. ©2008 IEEE.

A 660MHz ZVS DC-DC converter using gate-driver charge-recycling in 0.18μm CMOS with an integrated output filter

The design and manufacture of a prototype chip level power supply is described, with both simulated and experimental results. Of particular interest is the inclusion of a fully integrated on-chip LC filter. A high switching frequency of 660MHz and the design of a device drive circuit reduce losses by supply stacking, low-swing signaling and charge recycling. The paper demonstrates that a chip level converter operating at high frequency can be built and shows how this can be achieved, using zero voltage switching techniques similar to those commonly used in larger converters. Both simulations and experimental data from a fabricated circuit in 0.18μm CMOS are included. The circuit converts 2.2V to 0.75∼1.0V at ∼55mA. ©2008 IEEE.