Properties of seawater and particulate matter from a FRRF instrument, operating in a flow-through mode on the continuous surface water sampling system during the Tara Oceans expedition 2009-2013

The Tara Oceans Expedition (2009-2013) sampled the world oceans on board a 36 m long schooner, collecting environmental data and organisms from viruses to planktonic metazoans for later analyses using modern sequencing and state-of-the-art imaging technologies. Tara Oceans Data are particularly suited to study the genetic, morphological and functional diversity of plankton. The present data set provides continuous measurements made with a FRRF instrument, operating in a flow-through mode during the 2009-2012 part of the expedition. It operates by exciting chlorophyll fluorescence using a series of short flashes of controlled energy and time intervals (Kolber et al, 1998). The fluorescence transients produced by this excitation signal were analysed in real-time to provide estimates of abundance of photosynthetic pigments, the photosynthetic yields (Fv/Fm), the functional absorption cross section (a proxy for efficiency of photosynthetic energy acquisition), the kinetics of photosynthetic electron transport between Photosystem II and Photosystem I, and the size of the PQ pool. These parameters were measured at excitation wavelength of 445 nm, 470nm, 505 nm, and 535 nm, allowing to assess the presence and the photosynthetic performance of different phytoplankton taxa based on the spectral composition of their light harvesting pigments. The FRRF-derived photosynthetic characteristics were used to calculate the initial slope, the half saturation, and the maximum level of Photosynthesis vs Irradiance relationship. FRRF data were acquired continuously, at 1-minute time intervals.

Offspring sensitivity to ocean acidification changes seasonally in a coastal marine fish

Experimental assessments of species vulnerabilities to ocean acidification are rapidly increasing in number, yet the potential for short- and long-term adaptation to high CO2 by contemporary marine organisms remains poorly understood. We used a novel experimental approach that combined bi-weekly sampling of a wild, spawning fish population (Atlantic silverside Menidia menidia) with standardized offspring CO2 exposure experiments and parallel pH monitoring of a coastal ecosystem. We assessed whether offspring produced at different times of the spawning season (April to July) would be similarly susceptible to elevated (1100 µatm, pHNIST = 7.77) and high CO2 levels (2300 µatm, pHNIST = 7.47). Early in the season (April), high CO2 levels significantly (p < 0.05) reduced fish survival by 54% (2012) and 33% (2013) and reduced 1 to 10 d post-hatch growth by 17% relative to ambient conditions. However, offspring from parents collected later in the season became increasingly CO2-tolerant until, by mid-May, offspring survival was equally high at all CO2 levels. This interannually consistent plasticity coincided with the rapid annual pH decline in the species' spawning habitat (mean pH: 1 April/31 May = 8.05/7.67). It suggests that parents can condition their offspring to seasonally acidifying environments, either via changes in maternal provisioning and/or epigenetic transgenerational plasticity (TGP). TGP to increasing CO2 has been shown in the laboratory but never before in a wild population. Our novel findings of direct CO2-related survival reductions in wild fish offspring and seasonally plastic responses imply that realistic assessments of species CO2-sensitivities must control for parental environments that are seasonally variable in coastal habitats.

Sampling strategies using the "accumulation chamber" for monitoring geological

Fundación Ciudad de la Energía (CIUDEN) is carrying out a project of geological storage of CO2, where CO2 injection tests are planned in saline aquifers at a depth of 1500 m for scientific objectives and project demonstration. Before any CO2 is stored, it is necessary to determine the baseline flux of CO2 in order to detect potential leakage during injection and post-injection monitoring. In November 2009 diffuse flux measurements of CO2 using an accumulationchamber were made in the area selected by CIUDEN for geological storage, located in Hontomin province of Burgos (Spain). This paper presents the tests carried out in order to establish the optimum sampling methodology and the geostatistical analyses performed to determine the range, with which future field campaigns will be planned.

Digital Control Implementation to Reduce the Cost and Improve the Performance of the Control Stage of an Industrial Switched-Mode Power Supply

The main objective of this work is the design and implementation of the digital control stage of a 280W AC/DC industrial power supply in a single low-cost microcontroller to replace the analog control stage. The switch-mode power supply (SMPS) consists of a PFC boost converter with fixed frequency operation and a variable frequency LLC series resonant DC/DC converter. Input voltage range is 85VRMS-550VRMS and the output voltage range is 24V-28V. A digital controller is especially suitable for this kind of SMPS to implement its multiple functionalities and to keep the efficiency and the performance high over the wide range of input voltages. Additional advantages of the digital control are reliability and size. The optimized design and implementation of the digital control stage it is presented. Experimental results show the stable operation of the controlled system and an estimation of the cost reduction achieved with the digital control stage.

PWM Control of a Buck Converter with an Amorphous Core Coil

Pulse-width modulation is widely used to control electronic converters. One of the most topologies used for high DC voltage/low DC voltage conversion is the Buck converter. It is obtained as a second order system with a LC filter between the switching subsystem and the load. The use of a coil with an amorphous magnetic material core instead of air core lets design converters with smaller size. If high switching frequencies are used for obtaining high quality voltage output, the value of the auto inductance L is reduced throughout the time. Then, robust controllers are needed if the accuracy of the converter response must not be affected by auto inductance and load variations. This paper presents a robust controller for a Buck converter based on a state space feedback control system combined with an additional virtual space variable which minimizes the effects of the inductance and load variations when a not-toohigh switching frequency is applied. The system exhibits a null steady-state average error response for the entire range of parameter variations. Simulation results are presented.

Combining series elastic actuation and magneto-rheological damping for the control of agile locomotion

All-terrain robot locomotion is an active topic of research. Search and rescue maneuvers and exploratory missions could benefit from robots with the abilities of real animals. However, technological barriers exist to ultimately achieving the actuation system, which is able to meet the exigent requirements of these robots. This paper describes the locomotioncontrol of a leg prototype, designed and developed to make a quadruped walk dynamically while exhibiting compliant interaction with the environment. The actuation system of the leg is based on the hybrid use of series elasticity and magneto-rheological dampers, which provide variable compliance for natural-looking motion and improved interaction with the ground. The locomotioncontrol architecture has been proposed to exploit natural leg dynamics in order to improve energy efficiency. Results show that the controller achieves a significant reduction in energy consumption during the leg swing phase thanks to the exploitation of inherent leg dynamics. Added to this, experiments with the real leg prototype show that the combined use of series elasticity and magneto-rheologicaldamping at the knee provide a 20 % reduction in the energy wasted in braking the knee during its extension in the leg stance phase.

Diseño de la metodología para el control de la calidad de la exactitud posicional de la serie L del Centro geográfico del Ejército de Tierra (CEGET).

En este trabajo se ha evaluado la hoja correspondiente a la 1074 del Mapa Topográfico Nacional (Tahivilla) o 13-47 de la “serie L” (1:50.000) según la denominación del Centro Geográfico del Ejército de Tierra en tres formatos distintos; formato en impreso en papel, formato raster, y formato vectorial. Con este Proyecto Fin de Carrera se pretende desarrollar una metodología adecuada para el control de calidad en la exactitud posicional de la serie L del Centro Geográfico del Ejército de Tierra (C.E.G.E.T.), así como aplicar, ampliar y afianzar los conocimientos adquiridos a lo largo de los cursos de la titulación de Ingeniero Técnico en Topografía. Se debe mencionar la necesidad de realizar este tipo de controles a la cartografía editada en los distintos formatos, ya que se pueden obtener enseñanzas que afecten al flujo de producción, además de cumplir los estándares marcados por la alianza para los centros productores de cartografía de los países miembros de la OTAN. Según el estudio expuesto en este proyecto, se puede afirmar que el control de calidad de la exactitud posicional según lo recogido en el STANAG 2215, “Evaluation of land maps, aeronautical charts and digital topographic data”, la clasificación OTAN para dicha serie, es AA-M10. La hoja de “Tahivilla” se eligió por se una de las últimas editadas por el CEGET, y por responder a unas características generales representaticas de la serie L. El Proyecto Fin de Carrera, está dirigido a todos los expertos en la materia, personal docente y alumnos de Ingeniería Técnica en Topografía y alumnos de Grado en Ingeniería Geomática y Topografía. Este proyecto se realiza como parte del control de calidad que el CEGET realiza a la serie L. En concreto de la última edición publicada en el año 2010. Además, la Escuela Técnica Superior de Ingenieros en Topografía Geodesia y Cartografía mediante el convenio firmado con el CEGET, se compromete a colaborar activamente con dicho Centro en las necesidades que cada Proyecto Fin de Carrera surja de este convenio.

On-Chip Thermal Monitoring: Design, Placement and Interconnection of Temperature Sensors

La temperatura es una preocupación que juega un papel protagonista en el diseño de circuitos integrados modernos. El importante aumento de las densidades de potencia que conllevan las últimas generaciones tecnológicas ha producido la aparición de gradientes térmicos y puntos calientes durante el funcionamiento normal de los chips. La temperatura tiene un impacto negativo en varios parámetros del circuito integrado como el retardo de las puertas, los gastos de disipación de calor, la fiabilidad, el consumo de energía, etc. Con el fin de luchar contra estos efectos nocivos, la técnicas de gestión dinámica de la temperatura (DTM) adaptan el comportamiento del chip en función en la información que proporciona un sistema de monitorización que mide en tiempo de ejecución la información térmica de la superficie del dado. El campo de la monitorización de la temperatura en el chip ha llamado la atención de la comunidad científica en los últimos años y es el objeto de estudio de esta tesis. Esta tesis aborda la temática de control de la temperatura en el chip desde diferentes perspectivas y niveles, ofreciendo soluciones a algunos de los temas más importantes. Los niveles físico y circuital se cubren con el diseño y la caracterización de dos nuevos sensores de temperatura especialmente diseñados para los propósitos de las técnicas DTM. El primer sensor está basado en un mecanismo que obtiene un pulso de anchura variable dependiente de la relación de las corrientes de fuga con la temperatura. De manera resumida, se carga un nodo del circuito y posteriormente se deja flotando de tal manera que se descarga a través de las corrientes de fugas de un transistor; el tiempo de descarga del nodo es la anchura del pulso. Dado que la anchura del pulso muestra una dependencia exponencial con la temperatura, la conversión a una palabra digital se realiza por medio de un contador logarítmico que realiza tanto la conversión tiempo a digital como la linealización de la salida. La estructura resultante de esta combinación de elementos se implementa en una tecnología de 0,35 _m. El sensor ocupa un área muy reducida, 10.250 nm2, y consume muy poca energía, 1.05-65.5nW a 5 muestras/s, estas cifras superaron todos los trabajos previos en el momento en que se publicó por primera vez y en el momento de la publicación de esta tesis, superan a todas las implementaciones anteriores fabricadas en el mismo nodo tecnológico. En cuanto a la precisión, el sensor ofrece una buena linealidad, incluso sin calibrar; se obtiene un error 3_ de 1,97oC, adecuado para tratar con las aplicaciones de DTM. Como se ha explicado, el sensor es completamente compatible con los procesos de fabricación CMOS, este hecho, junto con sus valores reducidos de área y consumo, lo hacen especialmente adecuado para la integración en un sistema de monitorización de DTM con un conjunto de monitores empotrados distribuidos a través del chip. Las crecientes incertidumbres de proceso asociadas a los últimos nodos tecnológicos comprometen las características de linealidad de nuestra primera propuesta de sensor. Con el objetivo de superar estos problemas, proponemos una nueva técnica para obtener la temperatura. La nueva técnica también está basada en las dependencias térmicas de las corrientes de fuga que se utilizan para descargar un nodo flotante. La novedad es que ahora la medida viene dada por el cociente de dos medidas diferentes, en una de las cuales se altera una característica del transistor de descarga |la tensión de puerta. Este cociente resulta ser muy robusto frente a variaciones de proceso y, además, la linealidad obtenida cumple ampliamente los requisitos impuestos por las políticas DTM |error 3_ de 1,17oC considerando variaciones del proceso y calibrando en dos puntos. La implementación de la parte sensora de esta nueva técnica implica varias consideraciones de diseño, tales como la generación de una referencia de tensión independiente de variaciones de proceso, que se analizan en profundidad en la tesis. Para la conversión tiempo-a-digital, se emplea la misma estructura de digitalización que en el primer sensor. Para la implementación física de la parte de digitalización, se ha construido una biblioteca de células estándar completamente nueva orientada a la reducción de área y consumo. El sensor resultante de la unión de todos los bloques se caracteriza por una energía por muestra ultra baja (48-640 pJ) y un área diminuta de 0,0016 mm2, esta cifra mejora todos los trabajos previos. Para probar esta afirmación, se realiza una comparación exhaustiva con más de 40 propuestas de sensores en la literatura científica. Subiendo el nivel de abstracción al sistema, la tercera contribución se centra en el modelado de un sistema de monitorización que consiste de un conjunto de sensores distribuidos por la superficie del chip. Todos los trabajos anteriores de la literatura tienen como objetivo maximizar la precisión del sistema con el mínimo número de monitores. Como novedad, en nuestra propuesta se introducen nuevos parámetros de calidad aparte del número de sensores, también se considera el consumo de energía, la frecuencia de muestreo, los costes de interconexión y la posibilidad de elegir diferentes tipos de monitores. El modelo se introduce en un algoritmo de recocido simulado que recibe la información térmica de un sistema, sus propiedades físicas, limitaciones de área, potencia e interconexión y una colección de tipos de monitor; el algoritmo proporciona el tipo seleccionado de monitor, el número de monitores, su posición y la velocidad de muestreo _optima. Para probar la validez del algoritmo, se presentan varios casos de estudio para el procesador Alpha 21364 considerando distintas restricciones. En comparación con otros trabajos previos en la literatura, el modelo que aquí se presenta es el más completo. Finalmente, la última contribución se dirige al nivel de red, partiendo de un conjunto de monitores de temperatura de posiciones conocidas, nos concentramos en resolver el problema de la conexión de los sensores de una forma eficiente en área y consumo. Nuestra primera propuesta en este campo es la introducción de un nuevo nivel en la jerarquía de interconexión, el nivel de trillado (o threshing en inglés), entre los monitores y los buses tradicionales de periféricos. En este nuevo nivel se aplica selectividad de datos para reducir la cantidad de información que se envía al controlador central. La idea detrás de este nuevo nivel es que en este tipo de redes la mayoría de los datos es inútil, porque desde el punto de vista del controlador sólo una pequeña cantidad de datos |normalmente sólo los valores extremos| es de interés. Para cubrir el nuevo nivel, proponemos una red de monitorización mono-conexión que se basa en un esquema de señalización en el dominio de tiempo. Este esquema reduce significativamente tanto la actividad de conmutación sobre la conexión como el consumo de energía de la red. Otra ventaja de este esquema es que los datos de los monitores llegan directamente ordenados al controlador. Si este tipo de señalización se aplica a sensores que realizan conversión tiempo-a-digital, se puede obtener compartición de recursos de digitalización tanto en tiempo como en espacio, lo que supone un importante ahorro de área y consumo. Finalmente, se presentan dos prototipos de sistemas de monitorización completos que de manera significativa superan la características de trabajos anteriores en términos de área y, especialmente, consumo de energía. Abstract Temperature is a first class design concern in modern integrated circuits. The important increase in power densities associated to recent technology evolutions has lead to the apparition of thermal gradients and hot spots during run time operation. Temperature impacts several circuit parameters such as speed, cooling budgets, reliability, power consumption, etc. In order to fight against these negative effects, dynamic thermal management (DTM) techniques adapt the behavior of the chip relying on the information of a monitoring system that provides run-time thermal information of the die surface. The field of on-chip temperature monitoring has drawn the attention of the scientific community in the recent years and is the object of study of this thesis. This thesis approaches the matter of on-chip temperature monitoring from different perspectives and levels, providing solutions to some of the most important issues. The physical and circuital levels are covered with the design and characterization of two novel temperature sensors specially tailored for DTM purposes. The first sensor is based upon a mechanism that obtains a pulse with a varying width based on the variations of the leakage currents on the temperature. In a nutshell, a circuit node is charged and subsequently left floating so that it discharges away through the subthreshold currents of a transistor; the time the node takes to discharge is the width of the pulse. Since the width of the pulse displays an exponential dependence on the temperature, the conversion into a digital word is realized by means of a logarithmic counter that performs both the timeto- digital conversion and the linearization of the output. The structure resulting from this combination of elements is implemented in a 0.35_m technology and is characterized by very reduced area, 10250 nm2, and power consumption, 1.05-65.5 nW at 5 samples/s, these figures outperformed all previous works by the time it was first published and still, by the time of the publication of this thesis, they outnumber all previous implementations in the same technology node. Concerning the accuracy, the sensor exhibits good linearity, even without calibration it displays a 3_ error of 1.97oC, appropriate to deal with DTM applications. As explained, the sensor is completely compatible with standard CMOS processes, this fact, along with its tiny area and power overhead, makes it specially suitable for the integration in a DTM monitoring system with a collection of on-chip monitors distributed across the chip. The exacerbated process fluctuations carried along with recent technology nodes jeop-ardize the linearity characteristics of the first sensor. In order to overcome these problems, a new temperature inferring technique is proposed. In this case, we also rely on the thermal dependencies of leakage currents that are used to discharge a floating node, but now, the result comes from the ratio of two different measures, in one of which we alter a characteristic of the discharging transistor |the gate voltage. This ratio proves to be very robust against process variations and displays a more than suficient linearity on the temperature |1.17oC 3_ error considering process variations and performing two-point calibration. The implementation of the sensing part based on this new technique implies several issues, such as the generation of process variations independent voltage reference, that are analyzed in depth in the thesis. In order to perform the time-to-digital conversion, we employ the same digitization structure the former sensor used. A completely new standard cell library targeting low area and power overhead is built from scratch to implement the digitization part. Putting all the pieces together, we achieve a complete sensor system that is characterized by ultra low energy per conversion of 48-640pJ and area of 0.0016mm2, this figure outperforms all previous works. To prove this statement, we perform a thorough comparison with over 40 works from the scientific literature. Moving up to the system level, the third contribution is centered on the modeling of a monitoring system consisting of set of thermal sensors distributed across the chip. All previous works from the literature target maximizing the accuracy of the system with the minimum number of monitors. In contrast, we introduce new metrics of quality apart form just the number of sensors; we consider the power consumption, the sampling frequency, the possibility to consider different types of monitors and the interconnection costs. The model is introduced in a simulated annealing algorithm that receives the thermal information of a system, its physical properties, area, power and interconnection constraints and a collection of monitor types; the algorithm yields the selected type of monitor, the number of monitors, their position and the optimum sampling rate. We test the algorithm with the Alpha 21364 processor under several constraint configurations to prove its validity. When compared to other previous works in the literature, the modeling presented here is the most complete. Finally, the last contribution targets the networking level, given an allocated set of temperature monitors, we focused on solving the problem of connecting them in an efficient way from the area and power perspectives. Our first proposal in this area is the introduction of a new interconnection hierarchy level, the threshing level, in between the monitors and the traditional peripheral buses that applies data selectivity to reduce the amount of information that is sent to the central controller. The idea behind this new level is that in this kind of networks most data are useless because from the controller viewpoint just a small amount of data |normally extreme values| is of interest. To cover the new interconnection level, we propose a single-wire monitoring network based on a time-domain signaling scheme that significantly reduces both the switching activity over the wire and the power consumption of the network. This scheme codes the information in the time domain and allows a straightforward obtention of an ordered list of values from the maximum to the minimum. If the scheme is applied to monitors that employ TDC, digitization resource sharing is achieved, producing an important saving in area and power consumption. Two prototypes of complete monitoring systems are presented, they significantly overcome previous works in terms of area and, specially, power consumption.

Performance of pressure control valves and flow meters precision in operational irrigation-water balance accuracy

In pressure irrigation-water distribution networks, pressure regulating devices for controlling the discharged flow rate by irrigation units are needed due to the variability of flow rate. In addition, applied water volume is used controlled operating the valve during a calculated time interval, and assuming constant flow rate. In general, a pressure regulating valve PRV is the commonly used pressure regulating device in a hydrant, which, also, executes the open and close function. A hydrant feeds several irrigation units, requiring a wide range in flow rate. In addition, some flow meters are also available, one as a component of the hydrant and the rest are placed downstream. Every land owner has one flow meter for each group of field plots downstream the hydrant. Its lecture could be used for refining the water balance but its accuracy must be taken into account. Ideal PRV performance would maintain a constant downstream pressure. However, the true performance depends on both upstream pressure and the discharged flow rate. The objective of this work is to asses the influence of the performance on the applied volume during the whole irrigation events in a year. The results of the study have been obtained introducing the flow rate into a PRV model. Variations on flow rate are simulated by taking into account the consequences of variations on climate conditions and also decisions in irrigation operation, such us duration and frequency application. The model comprises continuity, dynamic and energy equations of the components of the PRV.