Aprender a escribir en los niveles iniciales de ELE : Un análisis de manuales del nivel A2 para el diseño de una propuesta didáctica

La presente investigación tiene como objetivo analizar la presencia que tiene la destreza de la expresión escrita en los manuales de español como lengua extranjera destinados a un público adulto de nivel básico, más concretamente de nivel A2. Asimismo, pretende observar qué tratamiento se hace de dos aspectos relacionados con la composición escrita: los géneros discursivos y los procesos de escritura. Para ello, recogemos datos a partir de una plantilla de análisis que aplicamos a cinco manuales de diferentes editoriales españolas publicados después de 2006. En esta recogida de datos destaca de la alta presencia de actividades de expresión escrita en los manuales. En relación a los géneros discursivos, los manuales dan importancia al trabajo explícito de los aspectos analizados para el presente trabajo: contexto comunicativo, destinatario y propósito. Sin embargo, notamos una presencia baja de textos que sirvan como modelo a los estudiantes a la hora de realizar sus producciones textuales y es prácticamente inexistente la reflexión acerca de la estructura y características de los modelos. En cuanto a los procesos de escritura, el proceso de textualización es el que tiene más presencia en los cinco manuales analizados, mientras que la planificación y la revisión quedan relegadas a un segundo plano con una ocurrencia más baja. En la misma línea, destacamos la poca relevancia dada a la revisión, especialmente la retroalimentación entre pares. A partir de los resultados obtenidos y basada en un enfoque ecléctico de la didáctica de la expresión escrita, presentamos una propuesta didáctica pensada para el nivel A2 en la que se combina el trabajo explícito del género discursivo con los procesos de escritura, así como fomenta la escritura colaborativa.

Kwantyfikacja wybranych świadczeń ekosystemów na poziomie lokalnym. Przykład gminy Krajenka

Wydział Nauk Geograficznych i Geologicznych

El centroamericano errante: nacionalismo y modernismo en la época liberal

ResumenEste artículo se refiere a los tipos de discursos que se gestaron en Centroamérica a fines del siglo pasado: el discurso modernista, de carácter principalmente literario y artístico, y el discurso nacional, de carácter más ideológico. Hace mención de la vida errante que llevaron muchos intelectuales centroamericanos.AbstractThis article refers to two types of discourse in late nineteenth century Central America: that of modernism, primarily literary and artistic, and national discourse, more ideological nature. The author also discusses the geographically mobile life of many Central American intellectuals.

An investigation into formal and functional characteristics of qualifications in legislative writing and its application to English for academic legal purposes.

The present investigation is based on a linguistic analysis of the 'Housing Act 1980' and attempts to examine the role of qualifications in the structuring of the legislative statement. The introductory chapter isolates legislative writing as a "sub-variety “of legal language and provides an overview of the controversies surrounding the way it is written and the problems it poses to its readers. Chapter two emphasizes the limitations of the available work on the description of language-varieties for the analysis of legislative writing and outlines the approach adopted for the present analysis. This chapter also gives some idea of the information-structuring of legislative provisions and establishes qualification as a key element in their textualisation. The next three chapters offer a detailed account of the ten major qualification-types identified in the corpus, concentrating on the surface form they take, the features of legislative statements they textualize and the syntactic positions to which they are generally assigned in the statement of legislative provisions. The emerging hypotheses in these chapters have often been verified through a specialist reaction from a Parliamentary Counsel, largely responsible for the writing of the ‘Housing Act 1980’• The findings suggest useful correlations between a number of qualificational initiators and the various aspects of the legislative statement. They also reveal that many of these qualifications typically occur in those clause-medial syntactic positions which are sparingly used in other specialist discourse, thus creating syntactic discontinuity in the legislative sentence. Such syntactic discontinuities, on the evidence from psycholinguistic experiments reported in chapter six, create special problems in the processing and comprehension of legislative statements. The final chapter converts the main linguistic findings into a series of pedagogical generalizations, offers indications of how this may be applied in EALP situations and concludes with other considerations of possible applications.

On the development of textual competence in primary education

The aim of this article is to present the results of an action research project, which has been put into practice in Primary Education. This project was intended to develop students’ textual competence, considering both comprehension and textual production. Our starting hypothesis was that teaching the schematisation of text types, focusing on linguistic devices that underlie text production, would promote the development of textual competence, leading to the production of more coherent and cohesive texts. In order to test this hypothesis we implemented the project in three phases. First, before the intervention, we collected texts produced by the students. Secondly, we implemented a didactic program designed to develop students’ textual competence. Lastly, after the intervention, we collected students’ texts once again. Data was analyzed according to categories that confer cohesion and coherence to different types of texts. Narrative, descriptive, and explanatory texts were assessed in terms of 1) building an autonomous text; 2) hierarchisation of information, and 3) textual organisation. Overall, results indicate that students developed their text conceptualisations, their understanding of the different structures of texts, and produced better writing. Indeed, their written work shows a marked progression from the beginning of the intervention program to the end of the program.

Comparing ESL electronic and face-to-face pre-writing conferences and first drafts : discourse, participation, and idea transfer /

This study was a comparative investigation of face-toface (i.e., proximate) and computer-mediated written (i.e., graphic) pre-writing conferences. The participants in this study were advanced English as a second language students. The 2 types of conferences were compared in terms of textual features, participation, and the . degree to which they were on topic. Moreover, drafts written after the 2 types of conferences were compared in terms of textual features, and the degree to which they were related to the conferences. Students produced an equivalent amount of discourse in an equivalent amount of time in the 2 types of conferences. The discourse in graphic conferences displayed greater lexical range, and some evidence suggests that it was less on-topic. Both these results likely occurred because the graphic conferences contained more discourse demonstrating interactive competence. Participation in graphic conferences was found to be as balanced or more balanced among students, and among students and the group leader combined. Overall, the drafts produced after the 2 types of conferences were of equivalent length and topical range, but some evidence suggests that drafts written after proximate conferences were more related to the conferences.

The role of the dopaminergic system in the production of ultrasonic calls in adult rats /

Ultrasonic vocalizations (USV) are emitted by rats in a number of social situations such as aggressive encounters, during sexual behavior, and during play in young rats, situations which are predominantly associated with strong emotional responses. These USV typically involve two distinct types of calls: 22 kHz calls, which are emitted in aversive situations and 50 kHz calls, which are emitted in non-aversive, appetitive situation. The 50 kHz calls are the focus of the present study and to date both the glutamatergic and the dopaminergic systems have been independently implicated in the production of these 50 kHz calls. The present study was conducted to examine a possible relationship between glutamate (GLU) and dopamine (DA) in mediating 50 kHz calls. It was hypothesized that the dopaminergic system plays a mediating role in 50 kHz calls induced by injections ofGLU into the anterior hypothalamic/preoptic area (AHPOA) in adult rats. A total of 68 adult male rats were used in this study. Rats' USV were recorded and analyzed in five experiments that were designed to test the hypothesis: in experiment 1, rats were treated with systemic amphetamine (AMPH) alone; in experiment 2, intra- AHPOA GLU was pretreated with systemic AMPH; in experiment 3, intra-AHPOA GLU was pretreated with intra-AHPOA AMPH; in experiment 4, rats were treated with high and low doses of intra-AHPOA AMPH only; in experiment 5, rats were treated with systemic haloperidol (HAL) as a pretreatment for intra-AHPOA GLU. Analysis of the results indicated that AMPH has a facilitatory effect on 50 kHz USV and that a relationship between DA and GLU in inducing 50 kHz calls does exist. The effect, however, was only observed when DA receptors were antagonized with HAL and was not seen with systemic AMPH pretreatments of intra-AHPOA GLU. The DAGLU relationship at the AHPOA was unclear.

Interactions between the cholinergic and dopaminergic systems during the production of ultrasonic vocalizations in rats

Rats produce ultrasonic vocalizations that can be categorized into two types of ultrasonic calls based on their sonographic structure. One group contains 22-kHz ultrasonic vocalization (USVs), characterized by relatively constant (flat) frequency with peak frequency ranging from 19 to 28-kHz, and a call duration ranging between 100 – 3000 ms. These vocalization can be induced by cholinomimetic agents injected into the ascending mesolimbic cholinergic system that terminates in the anterior hypothalamic-preoptic area (AH-MPO) and lateral septum (LS). The other group of USVs contains 50-kHz USVs, characterized by high peak frequency, ranging from 39 to 90-kHz, short duration ranging from 10-90 ms, and varying frequency and complex sonographic morphology. These vocalizations can be induced by dopaminergic agents injected into the nucleus accumbens, the target area for the mesolimbic dopaminergic system. 22-kHz USVs are emitted in situations that are highly aversive, such as proximity of a predator or anticipation of a foot shock, while 50 kHz USVs are emitted in rewarding and appetitive situations, such as juvenile play behaviour or anticipation of rewarding electrical brain stimulation. The activities of these two mesolimbic systems were postulated to be antagonistic to each other. The current thesis is focused on the interaction of these systems indexed by emission of relevant USVs. It was hypothesized that emission of 22 kHz USVs will be antagonized by prior activation of the dopaminergic system while emission of 50 kHz will be antagonized by prior activation of the cholinergic system. It was found that injection of apomorphine into the shell of the nucleus accumbens significantly decreased the number of carbachol-induced 22 kHz USVs from both AH-MPO and LS. Injection of carbachol into the LS significantly decreased the number of apomorphine-induced 50 kHz USVs from the shell of the nucleus accumbens. The results of the study supported the main hypotheses that the mesolimbic dopaminergic and cholinergic systems function in antagonism to each other.

Interactions between the cholinergic and dopaminergic system during the production of ultrasonic vocalizations in rats

Rats produce ultrasonic vocalizations that can be categorized into two types of ultrasonic calls based on their sonographic structure. One group contains 22-kHz ultrasonic vocalization (USVs), characterized by relatively constant (flat) frequency with peak frequency ranging from 19 to 28-kHz, and a call duration ranging between 100 – 3000 ms. These vocalization can be induced by cholinomimetic agents injected into the ascending mesolimbic cholinergic system that terminates in the anterior hypothalamic-preoptic area (AH-MPO) and lateral septum (LS). The other group of USVs contains 50-kHz USVs, characterized by high peak frequency, ranging from 39 to 90-kHz, short duration ranging from 10-90 ms, and varying frequency and complex sonographic morphology. These vocalizations can be induced by dopaminergic agents injected into the nucleus accumbens, the target area for the mesolimbic dopaminergic system. 22-kHz USVs are emitted in situations that are highly aversive, such as proximity of a predator or anticipation of a foot shock, while 50 kHz USVs are emitted in rewarding and appetitive situations, such as juvenile play behaviour or anticipation of rewarding electrical brain stimulation. The activities of these two mesolimbic systems were postulated to be antagonistic to each other. The current thesis is focused on the interaction of these systems indexed by emission of relevant USVs. It was hypothesized that emission of 22 kHz USVs will be antagonized by prior activation of the dopaminergic system while emission of 50 kHz will be antagonized by prior activation of the cholinergic system. It was found that injection of apomorphine into the shell of the nucleus accumbens significantly decreased the number of carbachol-induced 22 kHz USVs from both AH-MPO and LS. Injection of carbachol into the LS significantly decreased the number of apomorphine-induced 50 kHz USVs from the shell of the nucleus accumbens. The results of the study supported the main hypotheses that the mesolimbic dopaminergic and cholinergic systems function in antagonism to each other.

Uma ação reflexiva sobre o processo de (re)escrita de textos: a prática pedagógica da professora Maria

T he reflexive action on the process of texts (re)writing, central topic of this study, is still a challenge within the elementary school. What made this issue a special theme of study was the fact that the chosen focus is based on a lived experiences with (re) writing activities where the uniqueness of the professional practice would be transformed into a place of knowledge production, offering theoretical and a practical support to a teacher, in order to understand the interactive nature of language as a space for recovery of the individual (as a historical, social, and cultural being). The empirical field research, structured in the light of assumptions of qualitative research into the action research format, was a public school in Bahia, in a third grade classroom. The instruments of data collection were open questionnaire, semistructured interviews, observations with video recording, documentary analysis of texts produced by students, and reflective sessions. The objectives that supported the research study were: 1) Investigate, in the pedagogical action of teacher Maria, activities on the writing process, 2) Interact with the teacher, in the form of action inquiry to: a) reflect on the procedures for theoretical and methodological development of reflective practice on the process of the (re) writing of the text, b) intervene in the construction of didactic situations that enable the learning and the development of reflexive actions in the (re) writing of texts. To accomplish these goals, it was established as a commitment a dialogic communication with the protagonist, providing reflection sessions so she could examine her teaching practices. The most relevant theoretical arguments to the establishment of this research came from the theoretical and methodological approaches of Bakhtin s theory of enunciation-discourse (2003, 2004) and Vygotsky s socio-interactionist theory (1989, 1998), as it is believed that both theories, through a paradigm shift, in which the constitution of the individual and the participation of others in the actions of analysis and reflection on the language, would give opportunities for internalization and construction of knowledge. The systematic and critical pondering led the participating teacher into reviewing her teaching praxis, compelling her to promote a more insightful understanding of the writing process of her students. That experirence brought into evidence three categories of actions: 1) actions that reflect the technical rationalism, 2) actions that reflect an emancipatory metamorphosis, and 3) actions that reflect empowerment and awareness. The results confirm that the action / reflection on the process of the (re) writing of a text has a dimension of increasing levels of awareness and self criticism, reproducing other meanings for teaching praxis

Chinese Internet language: A sociolinguistic analysis of adaptations of the Chinese writing system

This paper examines the adaptations of the writing system in Internet language in mainland China from a sociolinguistic perspective. A comparison is also made of the adaptations in mainland China with those that Su (2003) found in Taiwan. In Computer-Mediated Communication (CMC), writing systems are often adapted to compensate for their inherent inadequacies (such as difficulty in input). Su (2003) investigates the creative uses of the writing system on the electronic bulletin boards (BBS) of two college student organizations in Taipei, Taiwan, and identifies four popular and creative uses of the Chinese writing system: stylized English, stylized Taiwanese-accented Mandarin, stylized Taiwanese, and the recycling of a transliteration alphabet used in elementary education. According to Coupland (2001; cited in Su 2003), stylization is “the knowing deployment of culturally familiar styles and identities that are marked as deviating from those predictably associated with the current speaking context”. Within this framework and drawing on the data in previous publications on Internet language and online sources, this study identifies five types of adaptations in mainland China’s Internet language: stylized Mandarin (e.g., 漂漂 piāopiāo for 漂亮 ‘beautiful’), stylized dialect-accented Mandarin (e.g., 灰常 huīcháng for 非常 ‘very much’), stylized English (e.g., 伊妹儿 yīmèier for ‘email’), stylized initials (e.g., bt 变态 biàntài for ‘abnormal’; pk, short form for ‘player kill’), and stylized numbers (e.g., 9494 jiùshi jiùshi 就是就是 ‘that is it’). The Internet community is composed of highly mobile individuals and thus forms a weak-tie social network. According to Milroy and Milroy (1992), a social network with weak ties is often where language innovation takes place. Adaptations of the Chinese writing system in Internet language provide interesting evidence for the innovations within a weak-tie social network. Our comparison of adaptations in mainland China and Taiwan shows that, in maximizing the effectiveness and functionality of their communication, participants of Internet communication are confronted with different language resources and situations, including differences in Romanization systems, English proficiency level, and attitudes towards English usage. As argued by Milroy and Milroy (1992), a weak-tie social network model can bridge the social class and social network. In the Internet community, the degree of diversity of the stylized linguistic varieties indexes the virtual and/or social status of its participants: the more diversified one’s Internet language is, the higher is his/her virtual and/or social status.

Parametric and structural self-adaptation of embedded systems using evolvable hardware

Los sistemas empotrados han sido concebidos tradicionalmente como sistemas de procesamiento específicos que realizan una tarea fija durante toda su vida útil. Para cumplir con requisitos estrictos de coste, tamaño y peso, el equipo de diseño debe optimizar su funcionamiento para condiciones muy específicas. Sin embargo, la demanda de mayor versatilidad, un funcionamiento más inteligente y, en definitiva, una mayor capacidad de procesamiento comenzaron a chocar con estas limitaciones, agravado por la incertidumbre asociada a entornos de operación cada vez más dinámicos donde comenzaban a ser desplegados progresivamente. Esto trajo como resultado una necesidad creciente de que los sistemas pudieran responder por si solos a eventos inesperados en tiempo diseño tales como: cambios en las características de los datos de entrada y el entorno del sistema en general; cambios en la propia plataforma de cómputo, por ejemplo debido a fallos o defectos de fabricación; y cambios en las propias especificaciones funcionales causados por unos objetivos del sistema dinámicos y cambiantes. Como consecuencia, la complejidad del sistema aumenta, pero a cambio se habilita progresivamente una capacidad de adaptación autónoma sin intervención humana a lo largo de la vida útil, permitiendo que tomen sus propias decisiones en tiempo de ejecución. Éstos sistemas se conocen, en general, como sistemas auto-adaptativos y tienen, entre otras características, las de auto-configuración, auto-optimización y auto-reparación. Típicamente, la parte soft de un sistema es mayoritariamente la única utilizada para proporcionar algunas capacidades de adaptación a un sistema. Sin embargo, la proporción rendimiento/potencia en dispositivos software como microprocesadores en muchas ocasiones no es adecuada para sistemas empotrados. En este escenario, el aumento resultante en la complejidad de las aplicaciones está siendo abordado parcialmente mediante un aumento en la complejidad de los dispositivos en forma de multi/many-cores; pero desafortunadamente, esto hace que el consumo de potencia también aumente. Además, la mejora en metodologías de diseño no ha sido acorde como para poder utilizar toda la capacidad de cómputo disponible proporcionada por los núcleos. Por todo ello, no se están satisfaciendo adecuadamente las demandas de cómputo que imponen las nuevas aplicaciones. La solución tradicional para mejorar la proporción rendimiento/potencia ha sido el cambio a unas especificaciones hardware, principalmente usando ASICs. Sin embargo, los costes de un ASIC son altamente prohibitivos excepto en algunos casos de producción en masa y además la naturaleza estática de su estructura complica la solución a las necesidades de adaptación. Los avances en tecnologías de fabricación han hecho que la FPGA, una vez lenta y pequeña, usada como glue logic en sistemas mayores, haya crecido hasta convertirse en un dispositivo de cómputo reconfigurable de gran potencia, con una cantidad enorme de recursos lógicos computacionales y cores hardware empotrados de procesamiento de señal y de propósito general. Sus capacidades de reconfiguración han permitido combinar la flexibilidad propia del software con el rendimiento del procesamiento en hardware, lo que tiene la potencialidad de provocar un cambio de paradigma en arquitectura de computadores, pues el hardware no puede ya ser considerado más como estático. El motivo es que como en el caso de las FPGAs basadas en tecnología SRAM, la reconfiguración parcial dinámica (DPR, Dynamic Partial Reconfiguration) es posible. Esto significa que se puede modificar (reconfigurar) un subconjunto de los recursos computacionales en tiempo de ejecución mientras el resto permanecen activos. Además, este proceso de reconfiguración puede ser ejecutado internamente por el propio dispositivo. El avance tecnológico en dispositivos hardware reconfigurables se encuentra recogido bajo el campo conocido como Computación Reconfigurable (RC, Reconfigurable Computing). Uno de los campos de aplicación más exóticos y menos convencionales que ha posibilitado la computación reconfigurable es el conocido como Hardware Evolutivo (EHW, Evolvable Hardware), en el cual se encuentra enmarcada esta tesis. La idea principal del concepto consiste en convertir hardware que es adaptable a través de reconfiguración en una entidad evolutiva sujeta a las fuerzas de un proceso evolutivo inspirado en el de las especies biológicas naturales, que guía la dirección del cambio. Es una aplicación más del campo de la Computación Evolutiva (EC, Evolutionary Computation), que comprende una serie de algoritmos de optimización global conocidos como Algoritmos Evolutivos (EA, Evolutionary Algorithms), y que son considerados como algoritmos universales de resolución de problemas. En analogía al proceso biológico de la evolución, en el hardware evolutivo el sujeto de la evolución es una población de circuitos que intenta adaptarse a su entorno mediante una adecuación progresiva generación tras generación. Los individuos pasan a ser configuraciones de circuitos en forma de bitstreams caracterizados por descripciones de circuitos reconfigurables. Seleccionando aquellos que se comportan mejor, es decir, que tienen una mejor adecuación (o fitness) después de ser evaluados, y usándolos como padres de la siguiente generación, el algoritmo evolutivo crea una nueva población hija usando operadores genéticos como la mutación y la recombinación. Según se van sucediendo generaciones, se espera que la población en conjunto se aproxime a la solución óptima al problema de encontrar una configuración del circuito adecuada que satisfaga las especificaciones. El estado de la tecnología de reconfiguración después de que la familia de FPGAs XC6200 de Xilinx fuera retirada y reemplazada por las familias Virtex a finales de los 90, supuso un gran obstáculo para el avance en hardware evolutivo; formatos de bitstream cerrados (no conocidos públicamente); dependencia de herramientas del fabricante con soporte limitado de DPR; una velocidad de reconfiguración lenta; y el hecho de que modificaciones aleatorias del bitstream pudieran resultar peligrosas para la integridad del dispositivo, son algunas de estas razones. Sin embargo, una propuesta a principios de los años 2000 permitió mantener la investigación en el campo mientras la tecnología de DPR continuaba madurando, el Circuito Virtual Reconfigurable (VRC, Virtual Reconfigurable Circuit). En esencia, un VRC en una FPGA es una capa virtual que actúa como un circuito reconfigurable de aplicación específica sobre la estructura nativa de la FPGA que reduce la complejidad del proceso reconfiguración y aumenta su velocidad (comparada con la reconfiguración nativa). Es un array de nodos computacionales especificados usando descripciones HDL estándar que define recursos reconfigurables ad-hoc: multiplexores de rutado y un conjunto de elementos de procesamiento configurables, cada uno de los cuales tiene implementadas todas las funciones requeridas, que pueden seleccionarse a través de multiplexores tal y como ocurre en una ALU de un microprocesador. Un registro grande actúa como memoria de configuración, por lo que la reconfiguración del VRC es muy rápida ya que tan sólo implica la escritura de este registro, el cual controla las señales de selección del conjunto de multiplexores. Sin embargo, esta capa virtual provoca: un incremento de área debido a la implementación simultánea de cada función en cada nodo del array más los multiplexores y un aumento del retardo debido a los multiplexores, reduciendo la frecuencia de funcionamiento máxima. La naturaleza del hardware evolutivo, capaz de optimizar su propio comportamiento computacional, le convierten en un buen candidato para avanzar en la investigación sobre sistemas auto-adaptativos. Combinar un sustrato de cómputo auto-reconfigurable capaz de ser modificado dinámicamente en tiempo de ejecución con un algoritmo empotrado que proporcione una dirección de cambio, puede ayudar a satisfacer los requisitos de adaptación autónoma de sistemas empotrados basados en FPGA. La propuesta principal de esta tesis está por tanto dirigida a contribuir a la auto-adaptación del hardware de procesamiento de sistemas empotrados basados en FPGA mediante hardware evolutivo. Esto se ha abordado considerando que el comportamiento computacional de un sistema puede ser modificado cambiando cualquiera de sus dos partes constitutivas: una estructura hard subyacente y un conjunto de parámetros soft. De esta distinción, se derivan dos lineas de trabajo. Por un lado, auto-adaptación paramétrica, y por otro auto-adaptación estructural. El objetivo perseguido en el caso de la auto-adaptación paramétrica es la implementación de técnicas de optimización evolutiva complejas en sistemas empotrados con recursos limitados para la adaptación paramétrica online de circuitos de procesamiento de señal. La aplicación seleccionada como prueba de concepto es la optimización para tipos muy específicos de imágenes de los coeficientes de los filtros de transformadas wavelet discretas (DWT, DiscreteWavelet Transform), orientada a la compresión de imágenes. Por tanto, el objetivo requerido de la evolución es una compresión adaptativa y más eficiente comparada con los procedimientos estándar. El principal reto radica en reducir la necesidad de recursos de supercomputación para el proceso de optimización propuesto en trabajos previos, de modo que se adecúe para la ejecución en sistemas empotrados. En cuanto a la auto-adaptación estructural, el objetivo de la tesis es la implementación de circuitos auto-adaptativos en sistemas evolutivos basados en FPGA mediante un uso eficiente de sus capacidades de reconfiguración nativas. En este caso, la prueba de concepto es la evolución de tareas de procesamiento de imagen tales como el filtrado de tipos desconocidos y cambiantes de ruido y la detección de bordes en la imagen. En general, el objetivo es la evolución en tiempo de ejecución de tareas de procesamiento de imagen desconocidas en tiempo de diseño (dentro de un cierto grado de complejidad). En este caso, el objetivo de la propuesta es la incorporación de DPR en EHW para evolucionar la arquitectura de un array sistólico adaptable mediante reconfiguración cuya capacidad de evolución no había sido estudiada previamente. Para conseguir los dos objetivos mencionados, esta tesis propone originalmente una plataforma evolutiva que integra un motor de adaptación (AE, Adaptation Engine), un motor de reconfiguración (RE, Reconfiguration Engine) y un motor computacional (CE, Computing Engine) adaptable. El el caso de adaptación paramétrica, la plataforma propuesta está caracterizada por: • un CE caracterizado por un núcleo de procesamiento hardware de DWT adaptable mediante registros reconfigurables que contienen los coeficientes de los filtros wavelet • un algoritmo evolutivo como AE que busca filtros wavelet candidatos a través de un proceso de optimización paramétrica desarrollado específicamente para sistemas caracterizados por recursos de procesamiento limitados • un nuevo operador de mutación simplificado para el algoritmo evolutivo utilizado, que junto con un mecanismo de evaluación rápida de filtros wavelet candidatos derivado de la literatura actual, asegura la viabilidad de la búsqueda evolutiva asociada a la adaptación de wavelets. En el caso de adaptación estructural, la plataforma propuesta toma la forma de: • un CE basado en una plantilla de array sistólico reconfigurable de 2 dimensiones compuesto de nodos de procesamiento reconfigurables • un algoritmo evolutivo como AE que busca configuraciones candidatas del array usando un conjunto de funcionalidades de procesamiento para los nodos disponible en una biblioteca accesible en tiempo de ejecución • un RE hardware que explota la capacidad de reconfiguración nativa de las FPGAs haciendo un uso eficiente de los recursos reconfigurables del dispositivo para cambiar el comportamiento del CE en tiempo de ejecución • una biblioteca de elementos de procesamiento reconfigurables caracterizada por bitstreams parciales independientes de la posición, usados como el conjunto de configuraciones disponibles para los nodos de procesamiento del array Las contribuciones principales de esta tesis se pueden resumir en la siguiente lista: • Una plataforma evolutiva basada en FPGA para la auto-adaptación paramétrica y estructural de sistemas empotrados compuesta por un motor computacional (CE), un motor de adaptación (AE) evolutivo y un motor de reconfiguración (RE). Esta plataforma se ha desarrollado y particularizado para los casos de auto-adaptación paramétrica y estructural. • En cuanto a la auto-adaptación paramétrica, las contribuciones principales son: – Un motor computacional adaptable mediante registros que permite la adaptación paramétrica de los coeficientes de una implementación hardware adaptativa de un núcleo de DWT. – Un motor de adaptación basado en un algoritmo evolutivo desarrollado específicamente para optimización numérica, aplicada a los coeficientes de filtros wavelet en sistemas empotrados con recursos limitados. – Un núcleo IP de DWT auto-adaptativo en tiempo de ejecución para sistemas empotrados que permite la optimización online del rendimiento de la transformada para compresión de imágenes en entornos específicos de despliegue, caracterizados por tipos diferentes de señal de entrada. – Un modelo software y una implementación hardware de una herramienta para la construcción evolutiva automática de transformadas wavelet específicas. • Por último, en cuanto a la auto-adaptación estructural, las contribuciones principales son: – Un motor computacional adaptable mediante reconfiguración nativa de FPGAs caracterizado por una plantilla de array sistólico en dos dimensiones de nodos de procesamiento reconfigurables. Es posible mapear diferentes tareas de cómputo en el array usando una biblioteca de elementos sencillos de procesamiento reconfigurables. – Definición de una biblioteca de elementos de procesamiento apropiada para la síntesis autónoma en tiempo de ejecución de diferentes tareas de procesamiento de imagen. – Incorporación eficiente de la reconfiguración parcial dinámica (DPR) en sistemas de hardware evolutivo, superando los principales inconvenientes de propuestas previas como los circuitos reconfigurables virtuales (VRCs). En este trabajo también se comparan originalmente los detalles de implementación de ambas propuestas. – Una plataforma tolerante a fallos, auto-curativa, que permite la recuperación funcional online en entornos peligrosos. La plataforma ha sido caracterizada desde una perspectiva de tolerancia a fallos: se proponen modelos de fallo a nivel de CLB y de elemento de procesamiento, y usando el motor de reconfiguración, se hace un análisis sistemático de fallos para un fallo en cada elemento de procesamiento y para dos fallos acumulados. – Una plataforma con calidad de filtrado dinámica que permite la adaptación online a tipos de ruido diferentes y diferentes comportamientos computacionales teniendo en cuenta los recursos de procesamiento disponibles. Por un lado, se evolucionan filtros con comportamientos no destructivos, que permiten esquemas de filtrado en cascada escalables; y por otro, también se evolucionan filtros escalables teniendo en cuenta requisitos computacionales de filtrado cambiantes dinámicamente. Este documento está organizado en cuatro partes y nueve capítulos. La primera parte contiene el capítulo 1, una introducción y motivación sobre este trabajo de tesis. A continuación, el marco de referencia en el que se enmarca esta tesis se analiza en la segunda parte: el capítulo 2 contiene una introducción a los conceptos de auto-adaptación y computación autonómica (autonomic computing) como un campo de investigación más general que el muy específico de este trabajo; el capítulo 3 introduce la computación evolutiva como la técnica para dirigir la adaptación; el capítulo 4 analiza las plataformas de computación reconfigurables como la tecnología para albergar hardware auto-adaptativo; y finalmente, el capítulo 5 define, clasifica y hace un sondeo del campo del hardware evolutivo. Seguidamente, la tercera parte de este trabajo contiene la propuesta, desarrollo y resultados obtenidos: mientras que el capítulo 6 contiene una declaración de los objetivos de la tesis y la descripción de la propuesta en su conjunto, los capítulos 7 y 8 abordan la auto-adaptación paramétrica y estructural, respectivamente. Finalmente, el capítulo 9 de la parte 4 concluye el trabajo y describe caminos de investigación futuros. ABSTRACT Embedded systems have traditionally been conceived to be specific-purpose computers with one, fixed computational task for their whole lifetime. Stringent requirements in terms of cost, size and weight forced designers to highly optimise their operation for very specific conditions. However, demands for versatility, more intelligent behaviour and, in summary, an increased computing capability began to clash with these limitations, intensified by the uncertainty associated to the more dynamic operating environments where they were progressively being deployed. This brought as a result an increasing need for systems to respond by themselves to unexpected events at design time, such as: changes in input data characteristics and system environment in general; changes in the computing platform itself, e.g., due to faults and fabrication defects; and changes in functional specifications caused by dynamically changing system objectives. As a consequence, systems complexity is increasing, but in turn, autonomous lifetime adaptation without human intervention is being progressively enabled, allowing them to take their own decisions at run-time. This type of systems is known, in general, as selfadaptive, and are able, among others, of self-configuration, self-optimisation and self-repair. Traditionally, the soft part of a system has mostly been so far the only place to provide systems with some degree of adaptation capabilities. However, the performance to power ratios of software driven devices like microprocessors are not adequate for embedded systems in many situations. In this scenario, the resulting rise in applications complexity is being partly addressed by rising devices complexity in the form of multi and many core devices; but sadly, this keeps on increasing power consumption. Besides, design methodologies have not been improved accordingly to completely leverage the available computational power from all these cores. Altogether, these factors make that the computing demands new applications pose are not being wholly satisfied. The traditional solution to improve performance to power ratios has been the switch to hardware driven specifications, mainly using ASICs. However, their costs are highly prohibitive except for some mass production cases and besidesthe static nature of its structure complicates the solution to the adaptation needs. The advancements in fabrication technologies have made that the once slow, small FPGA used as glue logic in bigger systems, had grown to be a very powerful, reconfigurable computing device with a vast amount of computational logic resources and embedded, hardened signal and general purpose processing cores. Its reconfiguration capabilities have enabled software-like flexibility to be combined with hardware-like computing performance, which has the potential to cause a paradigm shift in computer architecture since hardware cannot be considered as static anymore. This is so, since, as is the case with SRAMbased FPGAs, Dynamic Partial Reconfiguration (DPR) is possible. This means that subsets of the FPGA computational resources can now be changed (reconfigured) at run-time while the rest remains active. Besides, this reconfiguration process can be triggered internally by the device itself. This technological boost in reconfigurable hardware devices is actually covered under the field known as Reconfigurable Computing. One of the most exotic fields of application that Reconfigurable Computing has enabled is the known as Evolvable Hardware (EHW), in which this dissertation is framed. The main idea behind the concept is turning hardware that is adaptable through reconfiguration into an evolvable entity subject to the forces of an evolutionary process, inspired by that of natural, biological species, that guides the direction of change. It is yet another application of the field of Evolutionary Computation (EC), which comprises a set of global optimisation algorithms known as Evolutionary Algorithms (EAs), considered as universal problem solvers. In analogy to the biological process of evolution, in EHW the subject of evolution is a population of circuits that tries to get adapted to its surrounding environment by progressively getting better fitted to it generation after generation. Individuals become circuit configurations representing bitstreams that feature reconfigurable circuit descriptions. By selecting those that behave better, i.e., with a higher fitness value after being evaluated, and using them as parents of the following generation, the EA creates a new offspring population by using so called genetic operators like mutation and recombination. As generations succeed one another, the whole population is expected to approach to the optimum solution to the problem of finding an adequate circuit configuration that fulfils system objectives. The state of reconfiguration technology after Xilinx XC6200 FPGA family was discontinued and replaced by Virtex families in the late 90s, was a major obstacle for advancements in EHW; closed (non publicly known) bitstream formats; dependence on manufacturer tools with highly limiting support of DPR; slow speed of reconfiguration; and random bitstream modifications being potentially hazardous for device integrity, are some of these reasons. However, a proposal in the first 2000s allowed to keep investigating in this field while DPR technology kept maturing, the Virtual Reconfigurable Circuit (VRC). In essence, a VRC in an FPGA is a virtual layer acting as an application specific reconfigurable circuit on top of an FPGA fabric that reduces the complexity of the reconfiguration process and increases its speed (compared to native reconfiguration). It is an array of computational nodes specified using standard HDL descriptions that define ad-hoc reconfigurable resources; routing multiplexers and a set of configurable processing elements, each one containing all the required functions, which are selectable through functionality multiplexers as in microprocessor ALUs. A large register acts as configuration memory, so VRC reconfiguration is very fast given it only involves writing this register, which drives the selection signals of the set of multiplexers. However, large overheads are introduced by this virtual layer; an area overhead due to the simultaneous implementation of every function in every node of the array plus the multiplexers, and a delay overhead due to the multiplexers, which also reduces maximum frequency of operation. The very nature of Evolvable Hardware, able to optimise its own computational behaviour, makes it a good candidate to advance research in self-adaptive systems. Combining a selfreconfigurable computing substrate able to be dynamically changed at run-time with an embedded algorithm that provides a direction for change, can help fulfilling requirements for autonomous lifetime adaptation of FPGA-based embedded systems. The main proposal of this thesis is hence directed to contribute to autonomous self-adaptation of the underlying computational hardware of FPGA-based embedded systems by means of Evolvable Hardware. This is tackled by considering that the computational behaviour of a system can be modified by changing any of its two constituent parts: an underlying hard structure and a set of soft parameters. Two main lines of work derive from this distinction. On one side, parametric self-adaptation and, on the other side, structural self-adaptation. The goal pursued in the case of parametric self-adaptation is the implementation of complex evolutionary optimisation techniques in resource constrained embedded systems for online parameter adaptation of signal processing circuits. The application selected as proof of concept is the optimisation of Discrete Wavelet Transforms (DWT) filters coefficients for very specific types of images, oriented to image compression. Hence, adaptive and improved compression efficiency, as compared to standard techniques, is the required goal of evolution. The main quest lies in reducing the supercomputing resources reported in previous works for the optimisation process in order to make it suitable for embedded systems. Regarding structural self-adaptation, the thesis goal is the implementation of self-adaptive circuits in FPGA-based evolvable systems through an efficient use of native reconfiguration capabilities. In this case, evolution of image processing tasks such as filtering of unknown and changing types of noise and edge detection are the selected proofs of concept. In general, evolving unknown image processing behaviours (within a certain complexity range) at design time is the required goal. In this case, the mission of the proposal is the incorporation of DPR in EHW to evolve a systolic array architecture adaptable through reconfiguration whose evolvability had not been previously checked. In order to achieve the two stated goals, this thesis originally proposes an evolvable platform that integrates an Adaptation Engine (AE), a Reconfiguration Engine (RE) and an adaptable Computing Engine (CE). In the case of parametric adaptation, the proposed platform is characterised by: • a CE featuring a DWT hardware processing core adaptable through reconfigurable registers that holds wavelet filters coefficients • an evolutionary algorithm as AE that searches for candidate wavelet filters through a parametric optimisation process specifically developed for systems featured by scarce computing resources • a new, simplified mutation operator for the selected EA, that together with a fast evaluation mechanism of candidate wavelet filters derived from existing literature, assures the feasibility of the evolutionary search involved in wavelets adaptation In the case of structural adaptation, the platform proposal takes the form of: • a CE based on a reconfigurable 2D systolic array template composed of reconfigurable processing nodes • an evolutionary algorithm as AE that searches for candidate configurations of the array using a set of computational functionalities for the nodes available in a run time accessible library • a hardware RE that exploits native DPR capabilities of FPGAs and makes an efficient use of the available reconfigurable resources of the device to change the behaviour of the CE at run time • a library of reconfigurable processing elements featured by position-independent partial bitstreams used as the set of available configurations for the processing nodes of the array Main contributions of this thesis can be summarised in the following list. • An FPGA-based evolvable platform for parametric and structural self-adaptation of embedded systems composed of a Computing Engine, an evolutionary Adaptation Engine and a Reconfiguration Engine. This platform is further developed and tailored for both parametric and structural self-adaptation. • Regarding parametric self-adaptation, main contributions are: – A CE adaptable through reconfigurable registers that enables parametric adaptation of the coefficients of an adaptive hardware implementation of a DWT core. – An AE based on an Evolutionary Algorithm specifically developed for numerical optimisation applied to wavelet filter coefficients in resource constrained embedded systems. – A run-time self-adaptive DWT IP core for embedded systems that allows for online optimisation of transform performance for image compression for specific deployment environments characterised by different types of input signals. – A software model and hardware implementation of a tool for the automatic, evolutionary construction of custom wavelet transforms. • Lastly, regarding structural self-adaptation, main contributions are: – A CE adaptable through native FPGA fabric reconfiguration featured by a two dimensional systolic array template of reconfigurable processing nodes. Different processing behaviours can be automatically mapped in the array by using a library of simple reconfigurable processing elements. – Definition of a library of such processing elements suited for autonomous runtime synthesis of different image processing tasks. – Efficient incorporation of DPR in EHW systems, overcoming main drawbacks from the previous approach of virtual reconfigurable circuits. Implementation details for both approaches are also originally compared in this work. – A fault tolerant, self-healing platform that enables online functional recovery in hazardous environments. The platform has been characterised from a fault tolerance perspective: fault models at FPGA CLB level and processing elements level are proposed, and using the RE, a systematic fault analysis for one fault in every processing element and for two accumulated faults is done. – A dynamic filtering quality platform that permits on-line adaptation to different types of noise and different computing behaviours considering the available computing resources. On one side, non-destructive filters are evolved, enabling scalable cascaded filtering schemes; and on the other, size-scalable filters are also evolved considering dynamically changing computational filtering requirements. This dissertation is organized in four parts and nine chapters. First part contains chapter 1, the introduction to and motivation of this PhD work. Following, the reference framework in which this dissertation is framed is analysed in the second part: chapter 2 features an introduction to the notions of self-adaptation and autonomic computing as a more general research field to the very specific one of this work; chapter 3 introduces evolutionary computation as the technique to drive adaptation; chapter 4 analyses platforms for reconfigurable computing as the technology to hold self-adaptive hardware; and finally chapter 5 defines, classifies and surveys the field of Evolvable Hardware. Third part of the work follows, which contains the proposal, development and results obtained: while chapter 6 contains an statement of the thesis goals and the description of the proposal as a whole, chapters 7 and 8 address parametric and structural self-adaptation, respectively. Finally, chapter 9 in part 4 concludes the work and describes future research paths.

Relating two simultaneous events in discourse: the role of on-goingness devices in L1 Tunisian Arabic, L1 French and L2 French by Tunisian learners

Our PhD study focuses on the role of aspectual marking in expressing simultaneity of events in Tunisian Arabic as a first language, French as a first language, as well as in French as a second language by Tunisian learners at different acquisitional stages. We examine how the explicit markers of on-goingness qa:’id and «en train de» in Tunisian Arabic and in French respectively are used to express this temporal relation, in competition with the simple forms, the prefixed verb form in Tunisian Arabic and the présent de l’indicatif in French. We use a complex verbal task of retelling simultaneous events sharing an interval on the time axis based on eight videos presenting two situations happening in parallel. Two types of simultaneity are exploited: perfect simultaneity (when the two situations are parallel to each other) and inclusion (one situation is framed by the second one). Our informants in French and in Tunisian Arabic have two profiles, highly educated and low educated speakers. We show that the participants’ response to the retelling task varies according to their profiles, and so does their use of the on-goingness devices in the expression of simultaneity. The differences observed between the two profile groups are explained by the degree to which the speakers have developed a habit of responding to tasks. This is a skill typically acquired during schooling. We notice overall that the use of qa:’id as well as of «en train de» is less frequent in the data than the use of the simple forms. However, qa:’id as well as «en train de» are employed to play discursive roles that go beyond the proposition level. We postulate that despite the shared features between Tunisian Arabic and French regarding marking the concept of on-goingness, namely the presence of explicit lexical, not fully grammaticalised markers competing with other non-marked forms, the way they are used in the discourse of simultaneous events shows clear differences. We explain that «en train de» plays a more contrastive role than qa:’id and its use in discourse obeys a stricter rule. In cases of the inclusion type of simultaneity, it is used to construe the ‘framing’ event that encloses the second event. In construing perfectly simultaneneous events, and when both «en train de» and présent de l’indicatif are used, the proposition with «en train de» generally precedes the proposition with présent de l’indicatif, and not the other way around. qa:id obeys, but to a less strict rule as it can be used interchangeably with the simple form regardless of the order of propositions. The contrastive analysis of French L1 and L2 reveals learners’ deviations from natives’ use of on-goingness devices. They generalise the use of «en train de» and apply different rules to the interaction of the different marked and unmarked forms in discourse. Learners do not master its role in discourse even at advanced stages of acquisition despite its possible emergence around the basic and intermediate varieties. We conclude that the native speakers’ use of «en train de» involves mastering its role at the macro-structure level. This feature, not explicitly available to learners in the input, might persistently present a challenge to L2 acquisition of the periphrasis.

Outsourcing decisions:the case of parallel production

Purpose – The purpose of this paper is to investigate an underexplored aspect of outsourcing involving a mixed strategy in which parallel production is continued in-house at the same time as outsourcing occurs. Design/methodology/approach – The study applied a multiple case study approach and drew on qualitative data collected through in-depth interviews with wood product manufacturing companies. Findings – The paper posits that there should be a variety of mixed strategies between the two governance forms of “make” or “buy.” In order to address how companies should consider the extent to which they outsource, the analysis was structured around two ends of a continuum: in-house dominance or outsourcing dominance. With an in-house-dominant strategy, outsourcing complements an organization's own production to optimize capacity utilization and outsource less cost-efficient production, or is used as a tool to learn how to outsource. With an outsourcing-dominant strategy, in-house production helps maintain complementary competencies and avoids lock-in risk. Research limitations/implications – This paper takes initial steps toward an exploration of different mixed strategies. Additional research is required to understand the costs of different mixed strategies compared with insourcing and outsourcing, and to study parallel production from a supplier viewpoint. Practical implications – This paper suggests that managers should think twice before rushing to a “me too” outsourcing strategy in which in-house capacities are completely closed. It is important to take a dynamic view of outsourcing that maintains a mixed strategy as an option, particularly in situations that involve an underdeveloped supplier market and/or as a way to develop resources over the long term. Originality/value – The concept of combining both “make” and “buy” is not new. However, little if any research has focussed explicitly on exploring the variety of different types of mixed strategies that exist on the continuum between insourcing and outsourcing.

Production, characterization and application of activated carbon from brewer`s spent grain lignin

Different types of activated carbon were prepared by chemical activation of brewer`s spent grain (BSG) lignin using H(3)PO(4) at various acid/lignin ratios (1, 2, or 3 g/g) and carbonization temperatures (300, 450, or 600 degrees C), according to a 2(2) full-factorial design. The resulting materials were characterized with regard to their surface area, pore volume, and pore size distribution, and used for detoxification of BSG hemicellulosic hydrolysate (a mixture of sugars, phenolic compounds, metallic ions, among other compounds). BSG carbons presented BET surface areas between 33 and 692 m(2)/g, and micro- and mesopores with volumes between 0.058 and 0.453 cm(3)/g. The carbons showed high capacity for adsorption of metallic ions, mainly nickel, iron, chromium, and silicon. The concentration of phenolic compounds and color were also reduced by these sorbents. These results suggest that activated carbons with characteristics similar to those commercially found and high adsorption capacity can be produced from BSG lignin. (C) 2009 Elsevier Ltd. All rights reserved.