Amorphous carbon for use in thin film transistors

Tetrahedrally bonded amorphous carbon (ta-C) is a new type of semiconducting thin film material. It can be produced at room temperature using the Filtered Cathodic Vacuum Arc technique. The as-grown undoped ta-C is p-type in nature but it can be n-doped by the addition of nitrogen during deposition. This paper will describe thin film transistor design and fabrication using ta-C as the active channel layer.

Carbon based bottom gate thin film transistor

This paper describes the fabrication and characterization of a carbon based, bottom gate, thin film transistor (TFT). The active layer is formed from highly sp2 bonded nitrogenated amorphous carbon (a-C:N) which is deposited at room temperature using a filtered cathodic vacuum arc technique. The TFT shows p-channel operation. The device exhibits a threshold voltage of 15 V and a field effect mobility of 10-4 cm2 V-1 s-1 . The valence band tail of a-C:N is observed to be much shallower than that of a-Si:H, but does not appear to severely impede the shift of the Fermi level. This may indicate that a significant proportion of the a-C tail states can still contribute to conduction.

Influence of the state of the inlet endwall boundary layer on the interaction between pressure surface separation and endwall flows

This paper describes the effect of the state of the inlet boundary layer (laminar or turbulent) on the structure of the endwall flow on two different profiles of low-pressure (LP) turbine blades (solid thin and hollow thick). At present the state of the endwall boundary layer at the inlet of a real LP turbine is not known. The intention of this paper is to show that, for different designs of LP turbine, the state of the inlet boundary layer affects the performance of the blade in very different ways. The testing was completed at low speed in a linear cascade using area traversing, flow visualization and static pressure measurements. The paper shows that, for a laminar inlet boundary layer, the two profiles have a similar loss distribution and structure of endwall flow. However, for a turbulent inlet boundary layer the two profiles are shown to differ significantly in both the total loss and endwall flow structure. The pressure side separation bubble on the solid thin profile is shown to interact with the passage vortex, causing a higher endwall loss than that measured on the hollow thick profile.

Characterization of defect removal in hydrogenated and deuterated amorphous silicon thin film transistors

Thin film transistors (TFTs) utilizing an hydrogenated amorphous silicon (a-Si:H) channel layer exhibit a shift in the threshold voltage with time under the application of a gate bias voltage due to the creation of metastable defects. These defects are removed by annealing the device with zero gate bias applied. The defect removal process can be characterized by a thermalization energy which is, in turn, dependent upon an attempt-to-escape frequency for defect removal. The threshold voltage of both hydrogenated and deuterated amorphous silicon (a-Si:D) TFTs has been measured as a function of annealing time and temperature. Using a molecular dynamics simulation of hydrogen and deuterium in a silicon network in the H2 * configuration, it is shown that the experimental results are consistent with an attempt-to-escape frequency of (4.4 ± 0.3) × 1013 Hz and (5.7 ± 0.3) × 1013 Hz for a-Si:H and a-Si:D respectively which is attributed to the oscillation of the Si-H and Si-D bonds. Using this approach, it becomes possible to describe defect removal in hydrogenated and deuterated material by the thermalization energies of (1.552 ± 0.003) eV and (1.559 ± 0.003) eV respectively. This correlates with the energy per atom of the Si-H and Si-D bonds. © 2006 Elsevier B.V. All rights reserved.

How to achieve high mobility thin film transistors by direct deposition of silicon using 13.56 MHz RF PECVD?

CMOS nanocrystalline silicon thin film transistors with high field effect mobility are reported. The transistors were directly deposited by radio-frequency plasma enhanced chemical vapor deposition at 150°C The transistors show maximum field effect mobility of 450 cm2/V-s for electrons and 100 cm2/V-s for holes at room temperature. We attribute the high mobilities to a reduction of the oxygen content, which acts as an accidental donor. Indeed, secondary ion mass spectrometry measurements show that the impurity concentration in the nanocrystalline Si layer is comparable to, or lower than, the defect density in the material, which is already low thanks to hydrogen passivation.

Metastability mechanisms in thin film transistors quantitatively resolved using post-stress relaxation of threshold voltage

A new approach is presented to resolve bias-induced metastability mechanisms in hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs). The post stress relaxation of threshold voltage (V(T)) was employed to quantitatively distinguish between the charge trapping process in gate dielectric and defect state creation in active layer of transistor. The kinetics of the charge de-trapping from the SiN traps is analytically modeled and a Gaussian distribution of gap states is extracted for the SiN. Indeed, the relaxation in V(T) is in good agreement with the theory underlying the kinetics of charge de-trapping from gate dielectric. For the TFTs used in this work, the charge trapping in the SiN gate dielectric is shown to be the dominant metastability mechanism even at bias stress levels as low as 10 V.

Dual gate photo-thin film transistor with high photoconductive gain for high reliability, and low noise flat panel transparent imager

In this presentation, we report excellent electrical and optical characteristics of a dual gate photo thin film transistor (TFT) with bi-layer oxide channel, which was designed to provide virgin threshold voltage (V T) control, improve the negative bias illumination temperature stress (NBITS) reliability, and offer high photoconductive gain. In order to address the photo-sensitivity of phototransistor for the incoming light, top transparent InZnO (IZO) gate was employed, which enables the independent gate control of dual gate photo-TFT without having any degradation of its photosensitivity. Considering optimum initial V T and NBITS reliability for the device operation, the top gate bias was judiciously chosen. In addition, the speed and noise performance of the photo-TFT is competitive with silicon photo-transistors, and more importantly, its superiority lies in optical transparency. © 2011 IEEE.

Tests for conceptual design of 6.6 kV class superconducting fault current limiter with YBCO thin film elements

A superconducting fault current limiter (SFCL) for 6.6 kV and 400 A installed in a cubicle for a distribution network substation was conceptually designed. The SFCL consists of parallel- and series-connected superconducting YBCO elements and a limiting resistor. Before designing the SFCL, some tests were carried out. The width and length of each element used in the tests are 30 mm and 210 mm, respectively. The element consists of YBCO thin film of about 200 nm in thickness on cerium dioxide (CeO2) as a cap-layer on a sapphire substrate by metal-organic deposition with a protective metal coat. In the tests, characteristics of each element, such as over-current, withstand-voltage, and so on, were obtained. From these characteristics, series and parallel connections of the elements, called units, were considered. The characteristics of the units were obtained by tests. From the test results, a single phase prototype SFCL was manufactured and tested. Thus, an SFCL rated at 6.6 kV and 400 A can be designed. © 2009 IEEE.

On optical reflection at heterojunction interface of thin film solar cells

Heterojunction is an important structure for the development of photovoltaic solar cells. In contrast to homojunction structures, heterojunction solar cells have internal crystalline interfaces, which will reflect part of the incident light, and this has not been considered carefully before though many heterostructure solar cells have been commercialized. This paper discusses the internal reflection for various material systems used for the development of heterostructure-based solar cells. It has been found that the most common heterostructure solar cells have internal reflection less than 2%, while some potential heterojunction solar cells such as ITO/GaAs, ITO/InP, Si/Ge, polymer/semiconductors and oxide semiconductors may have internal reflection as high as 20%. Also it is worse to have a window layer with a lower refractive index than the absorption layer for solar cells. Ignoring this strong internal reflection will lead to severe deterioration and reduction of conversion efficiency; therefore measures have to be taken to minimize or prevent this internal reflection. © 2013 Elsevier B.V.

Concentration dependence of the Er3+ visible and infrared luminescence in Y2-x Erx O3 thin films on Si

Y2-x Erx O3 thin films, with x varying between 0 and 0.72, have been successfully grown on crystalline silicon (c-Si) substrates by radio-frequency magnetron cosputtering of Y2 O 3 and Er2 O3 targets. As-deposited films are polycrystalline, showing the body-centered cubic structure of Y2 O3, and show only a slight lattice parameter contraction when x is increased, owing to the insertion of Er ions. All the films exhibit intense Er-related optical emission at room temperature both in the visible and infrared regions. By studying the optical properties for different excitation conditions and for different Er contents, all the mechanisms (i.e., cross relaxations, up-conversions, and energy transfers to impurities) responsible for the photoluminescence (PL) emission have been identified, and the existence of two different well-defined Er concentration regimes has been demonstrated. In the low concentration regime (x up to 0.05, Er-doped regime), the visible PL emission reaches its highest intensity, owing to the influence of up-conversions, thus giving the possibility of using Y2-x Er x O3 films as an up-converting layer in the rear of silicon solar cells. However, most of the excited Er ions populate the first two excited levels 4I11/2 and 4I13/2, and above a certain excitation flux a population inversion condition between the former and the latter is achieved, opening the route for the realization of amplifiers at 2.75 μm. Instead, in the high concentration regime (Er-compound regime), an increase in the nonradiative decay rates is observed, owing to the occurrence of cross relaxations or energy transfers to impurities. As a consequence, the PL emission at 1.54 μm becomes the most intense, thus determining possible applications for Y2-x Erx O 3 as an infrared emitting material. © 2009 American Institute of Physics.

Thin film coil design considerations for wireless power transfer in flat panel display

Wireless power transfer is experimentally demonstrated by transmission between an AC power transmitter and receiver, both realised using thin film technology. The transmitter and receiver thin film coils are chosen to be identical in order to promote resonant coupling. Planar spiral coils are used because of the ease of fabrication and to reduce the metal layer thickness. The energy transfer efficiency as a function of transfer distance is analysed along with a comparison between the theoretical and the experimental results. © 2012 Materials Research Society.

Vertically oriented epitaxial germanium nanowires on silicon substrates using thin germanium buffer layers.

We demonstrate a method to realize vertically oriented Ge nanowires on Si(111) substrates. Ge nanowires were grown by chemical vapor deposition using Au nanoparticles to seed nanowire growth via a vapor-liquid-solid growth mechanism. Rapid oxidation of Si during Au nanoparticle application inhibits the growth of vertically oriented Ge nanowires directly on Si. The present method employs thin Ge buffer layers grown at low temperature less than 600 degrees C to circumvent the oxidation problem. By using a thin Ge buffer layer with root-mean-square roughness of approximately 2 nm, the yield of vertically oriented Ge nanowires is as high as 96.3%. This yield is comparable to that of homoepitaxial Ge nanowires. Furthermore, branched Ge nanowires could be successfully grown on these vertically oriented Ge nanowires by a secondary seeding technique. Since the buffer layers are grown under moderate conditions without any high temperature processing steps, this method has a wide process window highly suitable for Si-based microelectronics.

Electrical detection of trapped charge displacements using an ultra-thin SOI percolation transistor

Electrical detection of solid-state charge qubits requires ultrasensitive charge measurement, typically using a quantum point contact or single-electron-transistor, which imposes strict limits on operating temperature, voltage and current. A conventional FET offers relaxed operating conditions, but the back-action of the channel charge is a problem for such small quantum systems. Here, we discuss the use of a percolation transistor as a measurement device, with regard to charge sensing and backaction. The transistor is based on a 10nm thick SOI channel layer and is designed to measure the displacement of trapped charges in a nearby dielectric. At cryogenic temperatures, the trapped charges result in strong disorder in the channel layer, so that current is constrained to a percolation pathway in sub-threshold conditions. A microwave driven spatial Rabi oscillation of the trapped charge causes a change in the percolation pathway, which results in a measurable change in channel current. © The Electrochemical Society.

Effect of process parameters on the morphology and nanostructure of roll-to-roll printed P3HT:PCBM thin films for organic photovoltaics

Roll-to-roll (R2R) gravure exhibits significant advantages such as high precision and throughput for the printing of photoactive and conductive materials and the fabrication of flexible organic electronics such as organic photovoltaics (OPVs). Since the photoactive layer is the core of the OPV, it is important to investigate and finally control the process parameters and mechanisms that define the film morphology in a R2R process. The scope of this work is to study the effect of the R2R gravure printing and drying process on the nanomorphology and nanostructure of the photoactive P3HT:PCBM thin films printed on PEDOT:PSS electrodes towards the fabrication of indium tin oxide (ITO)-free flexible OPVs. In order to achieve this, P3HT:PCBM blends of different concentration were R2R printed under various speeds on the PEDOT:PSS layers. Due to the limited drying time during the rolling, an amount of solvent remains in the P3HT:PCBM films and the slow-drying process takes place which leads to the vertical and lateral phase separation, according to the Spectroscopic Ellipsometry and Atomic Force Microscopy analysis. The enhanced slow-drying leads to stronger phase separation, larger P3HT crystallites according to the Grazing Incidence X-Ray Diffraction data and to weaker mechanical response as it was shown by the nanoindentation creep. However, in the surface of the films the P3HT crystallization is controlled by the impinged hot air during the drying, where the more the drying time the larger the surface P3HT crystallites. The integration of the printed P3HT:PCBM and PEDOT:PSS layers in an OPV device underlined the feasibility of fabricating ITO-free flexible OPVs by R2R gravure processes. © 2013 Elsevier B.V.

Amorphous silicon thin film transistor biosensing system

Electronic systems are a very good platform for sensing biological signals for fast point-of-care diagnostics or threat detection. One of the solutions is the lab-on-a-chip integrated circuit (IC), which is low cost and high reliability, offering the possibility for label-free detection. In recent years, similar integrated biosensors based on the conventional complementary metal oxide semiconductor (CMOS) technology have been reported. However, post-fabrication processes are essential for all classes of CMOS biochips, requiring biocompatible electrode deposition and circuit encapsulation. In this work, we present an amorphous silicon (a-Si) thin film transistor (TFT) array based sensing approach, which greatly simplifies the fabrication procedures and even decreases the cost of the biosensor. The device contains several identical sensor pixels with amplifiers to boost the sensitivity. Ring oscillator and logic circuits are also integrated to achieve different measurement methodologies, including electro-analytical methods such as amperometric and cyclic voltammetric modes. The system also supports different operational modes. For example, depending on the required detection arrangement, a sample droplet could be placed on the sensing pads or the device could be immersed into the sample solution for real time in-situ measurement. The entire system is designed and fabricated using a low temperature TFT process that is compatible to plastic substrates. No additional processing is required prior to biological measurement. A Cr/Au double layer is used for the biological-electronic interface. The success of the TFT-based system used in this work will open new avenues for flexible label-free or low-cost disposable biosensors. © 2013 Materials Research Society.