Denver - A City Profile

Denver has emerged from the 1990s as a city region experiencing rapid growth. This has been fuelled by a vibrant local economy, which has adjusted itself from dependency on an earlier oil boom to greater reliance on the information and communications technology sector. The current planning and development challenges are dominated by the need to deal with urban sprawl and pressured transportation infrastructure. The contemporary restructuring of the physical fabric of Denver is marked by a progressive downtown revitalisation effort and a number of space extensive brownfield development projects. The interplay of state and local governments with commercial interests and citizens is a powerful dynamic in shaping these negative and positive outcomes.

Application-Specific Instruction Set Processor for SoC implementation of Modern Signal Processing Algorithms

A novel application-specific instruction set processor (ASIP) for use in the construction of modern signal processing systems is presented. This is a flexible device that can be used in the construction of array processor systems for the real-time implementation of functions such as singular-value decomposition (SVD) and QR decomposition (QRD), as well as other important matrix computations. It uses a coordinate rotation digital computer (CORDIC) module to perform arithmetic operations and several approaches are adopted to achieve high performance including pipelining of the micro-rotations, the use of parallel instructions and a dual-bus architecture. In addition, a novel method for scale factor correction is presented which only needs to be applied once at the end of the computation. This also reduces computation time and enhances performance. Methods are described which allow this processor to be used in reduced dimension (i.e., folded) array processor structures that allow tradeoffs between hardware and performance. The net result is a flexible matrix computational processing element (PE) whose functionality can be changed under program control for use in a wider range of scenarios than previous work. Details are presented of the results of a design study, which considers the application of this decomposition PE architecture in a combined SVD/QRD system and demonstrates that a combination of high performance and efficient silicon implementation are achievable. © 2005 IEEE.