959 resultados para Front-end converters
Resumo:
This paper describes a solid state electrical emulator devised for laboratory testing of power conditioning electronics for direct drive linear wave energy converters (DDLWEC). Two rectification strategies are considered; a uni-directional boost topology, and an H-bridge which may be controlled in either uni- or bidirectional modes.
Resumo:
The nuclear RNA binding protein, FCA, promotes Arabidopsis reproductive development. FCA contains a WW protein interaction domain that is essential for FCA function. We have identified FY as a protein partner for this domain. FY belongs to a highly conserved group of eukaryotic proteins represented in Saccharomyces cerevisiae by the RNA 3' end-processing factor, Pfs2p. FY regulates RNA 3' end processing in Arabidopsis as evidenced through its role in FCA regulation. FCA expression is autoregulated through the use of different polyadenylation sites within the FCA pre-mRNA, and the FCA/FY interaction is required for efficient selection of the promoter-proximal polyadenylation site. The FCA/FY interaction is also required for the downregulation of the floral repressor FLC. We propose that FCA controls 3' end formation of specific transcripts and that in higher eukaryotes, proteins homologous to FY may have evolved as sites of association for regulators of RNA 3' end processing.
Resumo:
Women in fishing communities are increasingly moving from traditional, community based occupations to seeking employment in the labour market. While this is an opportunity for women, their employment is also largely in the male dominated fishing industry, where job segregation into ‘less skilled and low paid’ jobs for women define employment opportunities. However, engagement as members in local non-government networks help women to challenge these stereotypes. In South Africa, for instance, the recent legislation promoting opportunity for women in male dominated sectors of employment is an opportunity for women to earn wages equal to those of men.
Resumo:
The fastest ever 11.25Gb/s real-time FPGA-based optical orthogonal frequency division multiplexing (OOFDM) transceivers utilizing 64-QAM encoding/decoding and significantly improved variable power loading are experimentally demonstrated, for the first time, incorporating advanced functionalities of on-line performance monitoring, live system parameter optimization and channel estimation. Real-time end-to-end transmission of an 11.25Gb/s 64-QAM-encoded OOFDM signal with a high electrical spectral efficiency of 5.625bit/s/Hz over 25km of standard and MetroCor single-mode fibres is successfully achieved with respective power penalties of 0.3dB and -0.2dB at a BER of 1.0 x 10(-3) in a directly modulated DFB laser-based intensity modulation and direct detection system without in-line optical amplification and chromatic dispersion compensation. The impacts of variable power loading as well as electrical and optical components on the transmission performance of the demonstrated transceivers are experimentally explored in detail. In addition, numerical simulations also show that variable power loading is an extremely effective means of escalating system performance to its maximum potential.
Resumo:
7.5Gb/s real-time end-to-end optical OFDM (OOFDM) transceivers incorporating variable power loading on each individual subcarrier are demonstrated experimentally, for the first time, using a live-optimized RSOA intensity modulator having a modulation bandwidth as narrow as 1GHz. Colourless real-time 16-QAM-encoded OOFDM signal transmission at 7.5Gb/s over 25km SSMF is achieved across the C-band in simple IMDD systems without in-line optical amplification and dispersion compensation. Copyright © 2010 The authors.
Resumo:
Low-cost, narrow modulation bandwidth, un-cooled VCSELs can be utilized to directly modulate 64-QAM-encoded 11.25Gb/s signals for end-to-end real-time optical OFDM transmission over 25km SSMF IMDD systems with excellent performance robustness. © 2011 Optical Society of America.
Resumo:
Large digital chips use a significant amount of energy to distribute a multi-GHz clock. By discharging the clock network to ground every cycle, the energy stored in this large capacitor is wasted. Instead, the energy can be recovered using an on-chip DC-DC converter. This paper investigates the integration of two DC-DC converter topologies, boost and buck-boost, with a high-speed clock driver. The high operating frequency significantly shrinks the required size of the L and C components so they can be placed on-chip; typical converters place them off-chip. The clock driver and DC-DC converter are able to share the entire tapered buffer chain, including the widest drive transistors in the final stage. To achieve voltage regulation, the clock duty cycle must be modulated; implying only single-edge-triggered flops should be used. However, this minor drawback is eclipsed by the benefits: by recovering energy from the clock, the output power can actually exceed the additional power needed to operate the converter circuitry, resulting in an effective efficiency greater than 100%. Furthermore, the converter output can be used to operate additional power-saving features like low-voltage islands or body bias voltages. ©2008 IEEE.