976 resultados para CMOS transistor


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This work investigates the feasibility of transducing molecular-recognition events into a measurable potentiometric signal. It is shown for the first time that biorecognition of acetylcholine (ACh) can be translated to conformational changes in the enzyme, acetylcholine-esterase (AChE), which in turn induces a measurable change in surface potential. Our results show that a highly sensitive detector for ACh can be obtained by the dilute assembly of AChE on a floating gate derived field effect transistor (FG-FET). A wide concentration range response is observed for ACh (10(-2)-10(-9)M) and for the inhibitor carbamylcholine CCh (10(-6)-10(-11)M). These enhanced sensitivities are modeled theoretically and explained by the combined response of the device to local pH changes and molecular dipole variations due to the enzyme-substrate recognition event.

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We demonstrate an integrated on-chip plasmonic enhanced Schottky detector for telecom wavelengths based on the internal photoemission process. This CMOS compatible device may serve as a promising alternative to the Si-Ge detectors. © 2012 OSA.

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Among the variety of applications for biosensors one of the exciting frontiers is to utilize those devices as post-synaptic sensing elements in chemical coupling between neurons and solid-state systems. The first necessary step to attain this challenge is to realize highly efficient detector for neurotransmitter acetylcholine (ACh). Herein, we demonstrate that the combination of floating gate configuration of ion-sensitive field effect transistor (ISFET) together with diluted covalent anchoring of enzyme acetylcholinesterase (AChE) onto device sensing area reveals a remarkable improvement of a four orders of magnitude in dose response to ACh. This high range sensitivity in addition to the benefits of peculiar microelectronic design show, that the presented hybrid provides a competent platform for assembly of artificial chemical synapse junction. Furthermore, our system exhibits clear response to eserine, a competitive inhibitor of AChE, and therefore it can be implemented as an effective sensor of pharmacological reagents, organophosphates, and nerve gases as well. © 2007 Materials Research Society.

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An 800V rated lateral IGBT for high frequency, low-cost off-line applications has been developed. The LIGBT features a new method of adjusting the bipolar gain, based on a floating N+ stripe in front of the P+ anode/drain region. The floating N+ layer enhances the carrier recombination at the anode/drain side of the drift region resulting in a very significant decrease in the turn-off speed and substantially lower overall losses. Switching speeds as low as 140ns at 25oC and 300ns at 125oC have been achieved with corresponding equivalent Rdson at 125oC below 90mω.cm2. A fully operational AC-DC converter using a controller with an integrated LIGBT+depletion mode MOSFET chip has been designed and qualified in plastic SOP8 packages and used in 5W, 65kHz SMPS applications. The device is fabricated in 0.6μm bulk silicon CMOS technology without any additional masking steps. © 2013 IEEE.

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A 200V lateral insulated gate bipolar transistor (LIGBT) was successfully developed using lateral superjunction (SJ) in 0.18μm partial silicon on insulator (SOI) HV process. The results presented are based on extensive experimental measurements and numerical simulations. For an n-type lateral SJ LIGBT, the p layer in the SJ drift region helps in achieving uniform electric field distribution. Furthermore, the p-pillar contributes to the on-state current. Furthermore, the p-pillar contributes to sweep out holes during the turn-off process, thus leading to faster removal of plasma. To realize this device, one additional mask layer is required in the X-FAB 0.18μm partial SOI HV process. © 2013 IEEE.

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We demonstrate an integrated on-chip plasmonic enhanced Schottky detector for telecom wavelengths based on the internal photoemission process. This CMOS compatible device may serve as a promising alternative to the Si-Ge detectors. © 2011 Optical Society of America.

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A SPICE simulation model of a novel cascode switch that combines a high voltage normally-on silicon carbide (SiC) junction field effect transistor (JFET) with a low voltage enhancement-mode gallium nitride field effect transistor (eGaN FET) has been developed, with the aim of optimising cascode switching performance. The effect of gate resistance on stability and switching losses is investigated and optimum values chosen. The effects of stray inductance on cascode switching performance are considered and the benefits of low inductance packaging discussed. The use of a positive JFET gate bias in a cascode switch is shown to reduce switching losses as well as reducing on-state losses. The findings of the simulation are used to produce a list of priorities for the design and layout of wide-bandgap cascode switches, relevant to both SiC and GaN high voltage devices. © 2013 IEEE.

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Non-dispersive-infra-red (NDIR) sensors are believed to be one of the most selective and robust solutions for CO2 detection, though cost prohibits their broader integration. In this paper we propose a commercially viable silicon-on-insulator (SOI) complementary metal-oxide (CMOS) micro-electro-mechanical (MEMS) technology for an IR thermal emitter. For the first time, vertically aligned multi walled carbon nanotubes (VA-MWCNTs) are suggested as a possible coating for the enhancement of the emission intensity of the optical source of a NDIR system. VA-MWCNTs have been grown in situ by chemical vapour deposition (CVD) exclusively on the heater area. Optical microscopy, scanning electron microscopy and Raman spectroscopy have been used to verify the quality of the VA-MWCNTs growth. The CNT-coated emitter demonstrated an increased response to CO2 of approx. 60%. Furthermore, we show that the VA-MWCNTs are stable up to temperatures of 500°C for up to 100 hours. © 2013 IEEE.

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Herein we report on the transport characteristics of rapid pulsed vacuum-arc thermally annealed, individual and network multi-walled carbon nanotubes. Substantially reduced defect densities (by at least an order of magnitude), measured by micro-Raman spectroscopy, and were achieved by partial reconstruction of the bamboo-type defects during thermal pulsing compared with more traditional single-pulse thermal annealing. Rapid pulsed annealed processed networks and individual multi-walled nanotubes showed a consistent increase in conductivity (of over a factor of five at room temperature), attributed to the reduced number density of resistive axial interfaces and, in the case of network samples, the possible formation of structural bonds between crossed nanotubes. Compared to the highly defective as-grown nanotubes, the pulsed annealed samples exhibited reduced temperature sensitivity in their transport characteristics signifying the dominance of scattering events from structural defects. Transport measurements in the annealed multi-walled nanotubes deviated from linear Ohmic, typically metallic, behavior to an increasingly semiconducting-like behavior attributed to thermally induced axial strains. Rapid pulsed annealed networks had an estimated band gap of 11.26 meV (as-grown; 6.17 meV), and this observed band gap enhancement was inherently more pronounced for individual nanotubes compared with the networks most likely attributed to mechanical pinning effect of the probing electrodes which possibly amplifies the strain induced band gap. In all instances the estimated room temperature band gaps increased by a factor of two. The gating performance of back-gated thin-film transistor structures verified that the observed weak semiconductivity (p-type) inferred from the transport characteristic at room temperature. © 2014 Copyright Taylor & Francis Group, LLC.

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Different FIB-based sample preparation methods for atom probe analysis of transistors have been proposed and discussed. A special procedure, involving device deprocessing, has been used to analyze by APT a sub-30 nm transistor extracted from a SRAM device. The analysis provides three dimensional compositions of Ni-silicide contact, metal gate and high-k oxide of the transistor gate. © 2013 Elsevier B.V. All rights reserved.

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Atom probe tomography was used to study the redistribution of platinum during Ni(10 at.%Pt) silicidation of n-doped polycrystalline Si. These measurements were performed after the two annealing steps of standard salicide process both on a field-effect transistor and on unpatterned region submitted to the same process. Very similar results are obtained in unpatterned region and in transistor gate contact. The first phase to form is not the expected δ-Ni2Si but the non stoichiometric θ-Ni2Si. Pt redistribution is strongly influenced by this phase and the final distribution is different from what is reported in literature. © 2013 Elsevier B.V. All rights reserved.