882 resultados para cooling chip for handheld electronic devices
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The performance, energy efficiency and cost improvements due to traditional technology scaling have begun to slow down and present diminishing returns. Underlying reasons for this trend include fundamental physical limits of transistor scaling, the growing significance of quantum effects as transistors shrink, and a growing mismatch between transistors and interconnects regarding size, speed and power. Continued Moore's Law scaling will not come from technology scaling alone, and must involve improvements to design tools and development of new disruptive technologies such as 3D integration. 3D integration presents potential improvements to interconnect power and delay by translating the routing problem into a third dimension, and facilitates transistor density scaling independent of technology node. Furthermore, 3D IC technology opens up a new architectural design space of heterogeneously-integrated high-bandwidth CPUs. Vertical integration promises to provide the CPU architectures of the future by integrating high performance processors with on-chip high-bandwidth memory systems and highly connected network-on-chip structures. Such techniques can overcome the well-known CPU performance bottlenecks referred to as memory and communication wall. However the promising improvements to performance and energy efficiency offered by 3D CPUs does not come without cost, both in the financial investments to develop the technology, and the increased complexity of design. Two main limitations to 3D IC technology have been heat removal and TSV reliability. Transistor stacking creates increases in power density, current density and thermal resistance in air cooled packages. Furthermore the technology introduces vertical through silicon vias (TSVs) that create new points of failure in the chip and require development of new BEOL technologies. Although these issues can be controlled to some extent using thermal-reliability aware physical and architectural 3D design techniques, high performance embedded cooling schemes, such as micro-fluidic (MF) cooling, are fundamentally necessary to unlock the true potential of 3D ICs. A new paradigm is being put forth which integrates the computational, electrical, physical, thermal and reliability views of a system. The unification of these diverse aspects of integrated circuits is called Co-Design. Independent design and optimization of each aspect leads to sub-optimal designs due to a lack of understanding of cross-domain interactions and their impacts on the feasibility region of the architectural design space. Co-Design enables optimization across layers with a multi-domain view and thus unlocks new high-performance and energy efficient configurations. Although the co-design paradigm is becoming increasingly necessary in all fields of IC design, it is even more critical in 3D ICs where, as we show, the inter-layer coupling and higher degree of connectivity between components exacerbates the interdependence between architectural parameters, physical design parameters and the multitude of metrics of interest to the designer (i.e. power, performance, temperature and reliability). In this dissertation we present a framework for multi-domain co-simulation and co-optimization of 3D CPU architectures with both air and MF cooling solutions. Finally we propose an approach for design space exploration and modeling within the new Co-Design paradigm, and discuss the possible avenues for improvement of this work in the future.
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Regulated Transformer Rectifier Units contain several power electronic boards to facilitate AC to DC power conversion. As these units become smaller, the number of devices on each board increases while their distance from each other decreases, making active cooling essential to maintaining reliable operation. Although it is widely accepted that liquid is a far superior heat transfer medium to air, the latter is still capable of yielding low device operating temperatures with proper heat sink and airflow design. The purpose of this study is to describe the models and methods used to design and build the thermal management system for one of the power electronic boards in a compact, high power regulated transformer rectifier unit. Maximum device temperature, available pressure drop and manufacturability were assessed when selecting the final design for testing. Once constructed, the thermal management system’s performance was experimentally verified at three different power levels.
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Dissertação de Mestrado, Engenharia Electrónica e Telecomunicações, Faculdade de Ciências e Tecnologia, Universidade do Algarve, 2014
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Self-assembled monolayers (SAMs) are highly promising materials for molecular engineering of electronic and spintronics devices thanks to their surface functionalization properties. In this direction, alkylphosphonic acids have been used to functionalize the most common ferromagnetic electrode in organic spintronics: La2/3Sr1/3MnO3 (LSMO). However, a study on the influence of SAMs grafting on LSMO electronic and magnetic properties is still missing. In this letter, we probe the influence of alkylphosphonic acids-based SAMs on the electronic and magnetic properties of the LSMO surface using different spectroscopies. We observe by X-ray photoemission and X-ray absorption that the grafting of the molecules on the LSMO surface induces a reduction of the Mn oxidation state. Ultraviolet photoelectron spectroscopy measurements also show that the LSMO work function can be modified by surface dipoles opening the door to both tune the charge and spin injection efficiencies in organic devices such as organic light-emitting diodes.
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The electronic conduction of thin-film field-effect-transistors (FETs) of sexithiophene was studied. In most cases the transfer curves deviate from standard FET theory; they are not linear, but follow a power law instead. These results are compared to conduction models of "variable-range hopping" and "multi-trap-and-release". The accompanying IV curves follow a Poole-Frenkel (exponential) dependence on the drain voltage. The results are explained assuming a huge density of traps. Below 200 K, the activation energy for conduction was found to be ca. 0.17 eV. The activation energies of the mobility follow the Meyer-Neldel rule. A sharp transition is seen in the behavior of the devices at around 200 K. The difference in behavior of a micro-FET and a submicron FET is shown. (C) 2004 American Institute of Physics.
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Over the last decade advances and innovations from Silicon Photonics technology were observed in the telecommunications and computing industries. This technology which employs Silicon as an optical medium, relies on current CMOS micro-electronics fabrication processes to enable medium scale integration of many nano-photonic devices to produce photonic integrated circuitry. However, other fields of research such as optical sensor processing can benefit from silicon photonics technology, specially in sensors where the physical measurement is wavelength encoded. In this research work, we present a design and application of a thermally tuned silicon photonic device as an optical sensor interrogator. The main device is a micro-ring resonator filter of 10 $\mu m$ of diameter. A photonic design toolkit was developed based on open source software from the research community. With those tools it was possible to estimate the resonance and spectral characteristics of the filter. From the obtained design parameters, a 7.8 x 3.8 mm optical chip was fabricated using standard micro-photonics techniques. In order to tune a ring resonance, Nichrome micro-heaters were fabricated on top of the device. Some fabricated devices were systematically characterized and their tuning response were determined. From measurements, a ring resonator with a free-spectral-range of 18.4 nm and with a bandwidth of 0.14 nm was obtained. Using just 5 mA it was possible to tune the device resonance up to 3 nm. In order to apply our device as a sensor interrogator in this research, a model of wavelength estimation using time interval between peaks measurement technique was developed and simulations were carried out to assess its performance. To test the technique, an experiment using a Fiber Bragg grating optical sensor was set, and estimations of the wavelength shift of this sensor due to axial strains yield an error within 22 pm compared to measurements from spectrum analyzer. Results from this study implies that signals from FBG sensors can be processed with good accuracy using a micro-ring device with the advantage of ts compact size, scalability and versatility. Additionally, the system also has additional applications such as processing optical wavelength shifts from integrated photonic sensors and to be able to track resonances from laser sources.
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The main objective for physics based modeling of the power converter components is to design the whole converter with respect to physical and operational constraints. Therefore, all the elements and components of the energy conversion system are modeled numerically and combined together to achieve the whole system behavioral model. Previously proposed high frequency (HF) models of power converters are based on circuit models that are only related to the parasitic inner parameters of the power devices and the connections between the components. This dissertation aims to obtain appropriate physics-based models for power conversion systems, which not only can represent the steady state behavior of the components, but also can predict their high frequency characteristics. The developed physics-based model would represent the physical device with a high level of accuracy in predicting its operating condition. The proposed physics-based model enables us to accurately develop components such as; effective EMI filters, switching algorithms and circuit topologies [7]. One of the applications of the developed modeling technique is design of new sets of topologies for high-frequency, high efficiency converters for variable speed drives. The main advantage of the modeling method, presented in this dissertation, is the practical design of an inverter for high power applications with the ability to overcome the blocking voltage limitations of available power semiconductor devices. Another advantage is selection of the best matching topology with inherent reduction of switching losses which can be utilized to improve the overall efficiency. The physics-based modeling approach, in this dissertation, makes it possible to design any power electronic conversion system to meet electromagnetic standards and design constraints. This includes physical characteristics such as; decreasing the size and weight of the package, optimized interactions with the neighboring components and higher power density. In addition, the electromagnetic behaviors and signatures can be evaluated including the study of conducted and radiated EMI interactions in addition to the design of attenuation measures and enclosures.
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Catering to society’s demand for high performance computing, billions of transistors are now integrated on IC chips to deliver unprecedented performances. With increasing transistor density, the power consumption/density is growing exponentially. The increasing power consumption directly translates to the high chip temperature, which not only raises the packaging/cooling costs, but also degrades the performance/reliability and life span of the computing systems. Moreover, high chip temperature also greatly increases the leakage power consumption, which is becoming more and more significant with the continuous scaling of the transistor size. As the semiconductor industry continues to evolve, power and thermal challenges have become the most critical challenges in the design of new generations of computing systems. In this dissertation, we addressed the power/thermal issues from the system-level perspective. Specifically, we sought to employ real-time scheduling methods to optimize the power/thermal efficiency of the real-time computing systems, with leakage/ temperature dependency taken into consideration. In our research, we first explored the fundamental principles on how to employ dynamic voltage scaling (DVS) techniques to reduce the peak operating temperature when running a real-time application on a single core platform. We further proposed a novel real-time scheduling method, “M-Oscillations” to reduce the peak temperature when scheduling a hard real-time periodic task set. We also developed three checking methods to guarantee the feasibility of a periodic real-time schedule under peak temperature constraint. We further extended our research from single core platform to multi-core platform. We investigated the energy estimation problem on the multi-core platforms and developed a light weight and accurate method to calculate the energy consumption for a given voltage schedule on a multi-core platform. Finally, we concluded the dissertation with elaborated discussions of future extensions of our research.
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Today, modern System-on-a-Chip (SoC) systems have grown rapidly due to the increased processing power, while maintaining the size of the hardware circuit. The number of transistors on a chip continues to increase, but current SoC designs may not be able to exploit the potential performance, especially with energy consumption and chip area becoming two major concerns. Traditional SoC designs usually separate software and hardware. Thus, the process of improving the system performance is a complicated task for both software and hardware designers. The aim of this research is to develop hardware acceleration workflow for software applications. Thus, system performance can be improved with constraints of energy consumption and on-chip resource costs. The characteristics of software applications can be identified by using profiling tools. Hardware acceleration can have significant performance improvement for highly mathematical calculations or repeated functions. The performance of SoC systems can then be improved, if the hardware acceleration method is used to accelerate the element that incurs performance overheads. The concepts mentioned in this study can be easily applied to a variety of sophisticated software applications. The contributions of SoC-based hardware acceleration in the hardware-software co-design platform include the following: (1) Software profiling methods are applied to H.264 Coder-Decoder (CODEC) core. The hotspot function of aimed application is identified by using critical attributes such as cycles per loop, loop rounds, etc. (2) Hardware acceleration method based on Field-Programmable Gate Array (FPGA) is used to resolve system bottlenecks and improve system performance. The identified hotspot function is then converted to a hardware accelerator and mapped onto the hardware platform. Two types of hardware acceleration methods – central bus design and co-processor design, are implemented for comparison in the proposed architecture. (3) System specifications, such as performance, energy consumption, and resource costs, are measured and analyzed. The trade-off of these three factors is compared and balanced. Different hardware accelerators are implemented and evaluated based on system requirements. 4) The system verification platform is designed based on Integrated Circuit (IC) workflow. Hardware optimization techniques are used for higher performance and less resource costs. Experimental results show that the proposed hardware acceleration workflow for software applications is an efficient technique. The system can reach 2.8X performance improvements and save 31.84% energy consumption by applying the Bus-IP design. The Co-processor design can have 7.9X performance and save 75.85% energy consumption.
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The high velocity of free atoms associated with the thermal motion, together with the velocity distribution of atoms has imposed the ultimate limitation on the precision of ultrahigh resolution spectroscopy. A sample consisting of low velocity atoms would provide a substantial improvement in spectroscopy resolution. To overcome the problem of thermal motion, atomic physicists have pursued two goals; first, the reduction of the thermal motion (cooling); and second, the confinement of the atoms by means of electromagnetic fields (trapping). Cooling carried sufficiently far, eliminates the motional problems, whereas trapping allows for long observation times. In this work the laser cooling and trapping of an argon atomic beam will be discussed. The experiments involve a time-of-flight spectroscopy on metastable argon atoms. Laser deceleration or cooling of atoms is achieved by counter propagating a photon against an atomic beam of metastable atoms. The solution to the Doppler shift problem is achieved using spatially varying magnetic field along the beam path to Zeeman shift the atomic resonance frequency so as to keep the atoms in resonance with a fixed frequency cooling laser. For trapping experiments a Magnetooptical trap (MOT) will be used. The MOT is formed by three pairs of counter-propagating laser beams with mutual opposite circular polarization and a frequency tuned slightly below the center of the atomic resonance and superimposed on a magnetic quadrupole field.
Tubular and Sector Heat Pipes with Interconnected Branches for Gas Turbine and/or Compressor Cooling
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Designing turbines for either aerospace or power production is a daunting task for any heat transfer scientist or engineer. Turbine designers are continuously pursuing better ways to convert the stored chemical energy in the fuel into useful work with maximum efficiency. Based on thermodynamic principles, one way to improve thermal efficiency is to increase the turbine inlet pressure and temperature. Generally, the inlet temperature may exceed the capabilities of standard materials for safe and long-life operation of the turbine. Next generation propulsion systems, whether for new supersonic transport or for improving existing aviation transport, will require more aggressive cooling system for many hot-gas-path components of the turbine. Heat pipe technology offers a possible cooling technique for the structures exposed to the high heat fluxes. Hence, the objective of this dissertation is to develop new radially rotating heat pipe systems that integrate multiple rotating miniature heat pipes with a common reservoir for a more effective and practical solution to turbine or compressor cooling. In this dissertation, two radially rotating miniature heat pipes and two sector heat pipes are analyzed and studied by utilizing suitable fluid flow and heat transfer modeling along with experimental tests. Analytical solutions for the film thickness and the lengthwise vapor temperature distribution for a single heat pipe are derived. Experimental tests on single radially rotating miniature heat pipes and sector heat pipes are undertaken with different important parameters and the manner in which these parameters affect heat pipe operation. Analytical and experimental studies have proven that the radially rotating miniature heat pipes have an incredibly high effective thermal conductance and an enormous heat transfer capability. Concurrently, the heat pipe has an uncomplicated structure and relatively low manufacturing costs. The heat pipe can also resist strong vibrations and is well suited for a high temperature environment. Hence, the heat pipes with a common reservoir make incorporation of heat pipes into turbo-machinery much more feasible and cost effective.
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Dedicated multi-project wafer (MPW) runs for photonic integrated circuits (PICs) from Si foundries mean that researchers and small-to-medium enterprises (SMEs) can now afford to design and fabricate Si photonic chips. While these bare Si-PICs are adequate for testing new device and circuit designs on a probe-station, they cannot be developed into prototype devices, or tested outside of the laboratory, without first packaging them into a durable module. Photonic packaging of PICs is significantly more challenging, and currently orders of magnitude more expensive, than electronic packaging, because it calls for robust micron-level alignment of optical components, precise real-time temperature control, and often a high degree of vertical and horizontal electrical integration. Photonic packaging is perhaps the most significant bottleneck in the development of commercially relevant integrated photonic devices. This article describes how the key optical, electrical, and thermal requirements of Si-PIC packaging can be met, and what further progress is needed before industrial scale-up can be achieved.
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Visible, near-infrared, IR and Raman spectra of magnesian gaspeite are presented. Nickel ion is the main source of the electronic bands as it is the principal component in the mineral where as the bands in IR and Raman spectra are due to the vibrational processes in the carbonate ion as an entity. The combination of electronic absorption and vibrational spectra (including near-infrared, FTIR and Raman) of magnesian gaspeite are explained in terms of the cation co-ordination and the behaviour of CO32– anion in the Ni–Mg carbonate. The electronic absorption spectrum consists of three broad and intense bands at 8130, 13160 and 22730 cm–1 due to spin-allowed transitions and two weak bands at 20410 and 30300 cm–1 are assigned to spin-forbidden transitions of Ni2+ in an octahedral symmetry. The crystal field parameters evaluated from the observed bands are Dq = 810; B = 800 and C = 3200 cm–1. The two bands in the near-infrared spectrum at 4330 and 5130 cm–1 are overtone and combination of CO32– vibrational modes. For the carbonate group, infrared bands are observed at 1020 cm–1(1 ), 870 cm–1 (2), 1418 cm–1 (3) and 750 cm–1 (4), of which3, the asymmetric stretching mode is most intense. Three well resolved Raman bands at 1571, 1088 and 331 cm–1 are assigned to 3, 1 and MO stretching vibrations.