Heavy ion irradiation effects in zirconium nitride

Polycrystalline zirconium nitride (ZrN) samples were irradiated with He +, Kr ++, and Xe ++ ions to high (>1·10 16 ions/cm 2) fluences at ∼100 K. Following ion irradiation, transmission electron microscopy (TEM) and grazing incidence X-ray diffraction (GIXRD) were used to analyze the microstructure and crystal structure of the post-irradiated material. For ion doses equivalent to approximately 200 displacements per atom (dpa), ZrN was found to resist any amorphization transformation, based on TEM observations. At very high displacement damage doses, GIXRD measurements revealed tetragonal splitting of some of the diffraction maxima (maxima which are associated with cubic ZrN prior to irradiation). In addition to TEM and GIXRD, mechanical property changes were characterized using nanoindentation. Nanoindentation revealed no change in elastic modulus of ZrN with increasing ion dose, while the hardness of the irradiated ZrN was found to increase significantly with ion dose. Finally, He + ion implanted ZrN samples were annealed to examine He gas retention properties of ZrN as a function of annealing temperature. He gas release was measured using a residual gas analysis (RGA) spectrometer. RGA measurements were performed on He-implanted ZrN samples and on ZrN samples that had also been irradiated with Xe ++ ions, in order to introduce high levels of displacive radiation damage into the matrix. He evolution studies revealed that ZrN samples with high levels of displacement damage due to Xe implantation, show a lower temperature threshold for He release than do pristine ZrN samples.

Determination of excitation profile and dielectric function spatial nonuniformity in porous silicon by using WKB approach

We develop an analytical model based on the WKB approach to evaluate the experimental results of the femtosecond pump-probe measurements of the transmittance and reflectance obtained on thin membranes of porous silicon. The model allows us to retrieve a pump-induced nonuniform complex dielectric function change along the membrane depth. We show that the model fitting to the experimental data requires a minimal number of fitting parameters while still complying with the restriction imposed by the Kramers-Kronig relation. The developed model has a broad range of applications for experimental data analysis and practical implementation in the design of devices involving a spatially nonuniform dielectric function, such as in biosensing, wave-guiding, solar energy harvesting, photonics and electro-optical devices.

Increasing the fracture toughness of silicon by ion implantation

Previous studies have shown that moderate doses of radiation can lead to increased fracture toughness in ceramics. An experimental investigation was conducted to determine the effects of ion implantation on fracture toughness in silicon. Specimens implanted with Ne showed increased fracture toughness, over the entire range of implantations tested. Using ions of various energies to better distribute implantation damage further increased the fracture toughness even though the region of amorphous damage was slightly decreased. The implantation damage accumulated in a predictable manner so that fracture toughness could be optimized.

New negative temperature coefficient thermistor ceramics in Mn-doped CaCu3-xMnxTi4O12 (0≤x≤1) system

New negative temperature coefficient (NTC) ceramics based on CaCu 3-xMnxTi4O12 (0≤x≤1) compositions have been investigated. The grain size of the CaCu 3-xMnxTi4O12 samples decreases at first and then increases with increasing Mn content. The X-ray photoelectron spectroscopy analysis corroborates the presence of Mn3+ and Mn 4+ in Mn-doped samples, which results in a decrease in the activation energy. All the NTC thermistors prepared show a linear relationship between the natural logarithm of the resistivity and the reciprocal temperature, indicative of NTC characteristics. The Mn-doped CaCu3-xMnxTi 4O12 NTC thermistors provide various electrical properties, depending on Mn content. The values of ρ25, B constant and activation energy of the NTC thermistors are in the range of 2.22×106-3.22×108 Ω cm, 5488-8031 K, and 0.473-0.692 eV, respectively. © 2014 Elsevier Ltd and Techna Group S.r.l. All rights reserved.

Highly sensitive, localized surface plasmon resonance fiber device for environmental sensing, based upon a structured bi-metal array of nano-wires

We demonstrate a bi-metal coated (platinum and gold or silver), localized surface plasmon resonance fiber sensor with an index sensitivity exceeding 11,900 nm/RIU, yielding an index resolution of 2 × 10-5 in the aqueous index regime. This is one of the highest index sensitivities achieved with an optical fiber sensor. The coatings consist of arrays of bi-metal nano-wires (typically 36 nm in radius and 20 μm in length), supported by a silicon dioxide thin film on a thin substrate of germanium, the nano-wires being perpendicular to the longitudinal axis of the D-shaped fiber.

Pore confinement effects and stabilization of carbon nitride oligomers in macroporous silica for photocatalytic hydrogen production

An ordered macroporous host (mac-SiO2) has been used to prevent aggregation of layered photocatalysts based on carbon nitride. Using typical carbon nitride synthesis conditions, cyanamide was condensed at 550 °C in the presence and absence of mac-SiO2. Condensation in the absence of mac-SiO2 results in materials with structural characteristics consistent with the carbon nitride, melon, accompanied by ca. 2 wt% carbonization. For mac-SiO2 supported materials, condensation occurs with greater carbonization (ca. 6 wt%). On addition of 3 wt% Pt cocatalyst photocatalytic hydrogen production under visible light is found to be up to 10 times greater for the supported composites. Time-resolved photoluminescence spectroscopy shows that excited state relaxation is more rapid for the mac-SiO2 supported materials suggesting faster electron-hole recombination and that supported carbon nitride does not exhibit improved charge separation. CO2 temperature programmed desorption indicates that enhanced photoactivity of supported carbon nitride is attributable to an increased surface area compared to bulk carbon nitride and an increase in the concentration of weakly basic catalytic sites, consistent with carbon nitride oligomers.

Silicon photonic device for wavelength sensing and monitoring

Over the last decade advances and innovations from Silicon Photonics technology were observed in the telecommunications and computing industries. This technology which employs Silicon as an optical medium, relies on current CMOS micro-electronics fabrication processes to enable medium scale integration of many nano-photonic devices to produce photonic integrated circuitry. ^ However, other fields of research such as optical sensor processing can benefit from silicon photonics technology, specially in sensors where the physical measurement is wavelength encoded. ^ In this research work, we present a design and application of a thermally tuned silicon photonic device as an optical sensor interrogator. ^ The main device is a micro-ring resonator filter of 10 μm of diameter. A photonic design toolkit was developed based on open source software from the research community. With those tools it was possible to estimate the resonance and spectral characteristics of the filter. From the obtained design parameters, a 7.8 × 3.8 mm optical chip was fabricated using standard micro-photonics techniques. In order to tune a ring resonance, Nichrome micro-heaters were fabricated on top of the device. Some fabricated devices were systematically characterized and their tuning response were determined. From measurements, a ring resonator with a free-spectral-range of 18.4 nm and with a bandwidth of 0.14 nm was obtained. Using just 5 mA it was possible to tune the device resonance up to 3 nm. ^ In order to apply our device as a sensor interrogator in this research, a model of wavelength estimation using time interval between peaks measurement technique was developed and simulations were carried out to assess its performance. To test the technique, an experiment using a Fiber Bragg grating optical sensor was set, and estimations of the wavelength shift of this sensor due to axial strains yield an error within 22 pm compared to measurements from spectrum analyzer. ^ Results from this study implies that signals from FBG sensors can be processed with good accuracy using a micro-ring device with the advantage of ts compact size, scalability and versatility. Additionally, the system also has additional applications such as processing optical wavelength shifts from integrated photonic sensors and to be able to track resonances from laser sources.^

Surrey-Hampshire border ware ceramics in seventeenth-century English North America

During the sixteenth and seventeenth centuries, Surrey-Hampshire Border ware ceramics were among of the most popular and widely used ceramics in southern England. This ceramic, produced along the Surrey-Hampshire border, was also shipped to English colonies in North America throughout the seventeenth century. This thesis will explore the types of vessels uncovered on archaeological sites in Newfoundland, New England and the Chesapeake, and examine the similarities and differences in the forms available to various colonists during this time period. By comparing the collections of Border ware found at various sites it is possible to not only determine what vessel forms are present in Northeastern English North America, but to determine the similarities and differences in vessels based on temporal, geographic, social or economic factors. A comparative study of Border ware also provides information on the socio-economic status of the colonists and on trading networks between England and North America during the seventeenth century.

Study of Periodic and Quasi-Periodic Structures in Silicon-on-Insulator

In this thesis, a numerical design approach has been proposed and developed based on the transmission matrix method in order to characterize periodic and quasi-periodic photonic structures in silicon-on-insulator. The approach and its performance have been extensively tested with specific structures in 2D and its validity has been verified in 3D.

Testing of Interposer-Based 2.5D Integrated Circuits

The unprecedented and relentless growth in the electronics industry is feeding the demand for integrated circuits (ICs) with increasing functionality and performance at minimum cost and power consumption. As predicted by Moore's law, ICs are being aggressively scaled to meet this demand. While the continuous scaling of process technology is reducing gate delays, the performance of ICs is being increasingly dominated by interconnect delays. In an effort to improve submicrometer interconnect performance, to increase packing density, and to reduce chip area and power consumption, the semiconductor industry is focusing on three-dimensional (3D) integration. However, volume production and commercial exploitation of 3D integration are not feasible yet due to significant technical hurdles.

At the present time, interposer-based 2.5D integration is emerging as a precursor to stacked 3D integration. All the dies and the interposer in a 2.5D IC must be adequately tested for product qualification. However, since the structure of 2.5D ICs is different from the traditional 2D ICs, new challenges have emerged: (1) pre-bond interposer testing, (2) lack of test access, (3) limited ability for at-speed testing, (4) high density I/O ports and interconnects, (5) reduced number of test pins, and (6) high power consumption. This research targets the above challenges and effective solutions have been developed to test both dies and the interposer.

The dissertation first introduces the basic concepts of 3D ICs and 2.5D ICs. Prior work on testing of 2.5D ICs is studied. An efficient method is presented to locate defects in a passive interposer before stacking. The proposed test architecture uses e-fuses that can be programmed to connect or disconnect functional paths inside the interposer. The concept of a die footprint is utilized for interconnect testing, and the overall assembly and test flow is described. Moreover, the concept of weighted critical area is defined and utilized to reduce test time. In order to fully determine the location of each e-fuse and the order of functional interconnects in a test path, we also present a test-path design algorithm. The proposed algorithm can generate all test paths for interconnect testing.

In order to test for opens, shorts, and interconnect delay defects in the interposer, a test architecture is proposed that is fully compatible with the IEEE 1149.1 standard and relies on an enhancement of the standard test access port (TAP) controller. To reduce test cost, a test-path design and scheduling technique is also presented that minimizes a composite cost function based on test time and the design-for-test (DfT) overhead in terms of additional through silicon vias (TSVs) and micro-bumps needed for test access. The locations of the dies on the interposer are taken into consideration in order to determine the order of dies in a test path.

To address the scenario of high density of I/O ports and interconnects, an efficient built-in self-test (BIST) technique is presented that targets the dies and the interposer interconnects. The proposed BIST architecture can be enabled by the standard TAP controller in the IEEE 1149.1 standard. The area overhead introduced by this BIST architecture is negligible; it includes two simple BIST controllers, a linear-feedback-shift-register (LFSR), a multiple-input-signature-register (MISR), and some extensions to the boundary-scan cells in the dies on the interposer. With these extensions, all boundary-scan cells can be used for self-configuration and self-diagnosis during interconnect testing. To reduce the overall test cost, a test scheduling and optimization technique under power constraints is described.

In order to accomplish testing with a small number test pins, the dissertation presents two efficient ExTest scheduling strategies that implements interconnect testing between tiles inside an system on chip (SoC) die on the interposer while satisfying the practical constraint that the number of required test pins cannot exceed the number of available pins at the chip level. The tiles in the SoC are divided into groups based on the manner in which they are interconnected. In order to minimize the test time, two optimization solutions are introduced. The first solution minimizes the number of input test pins, and the second solution minimizes the number output test pins. In addition, two subgroup configuration methods are further proposed to generate subgroups inside each test group.

Finally, the dissertation presents a programmable method for shift-clock stagger assignment to reduce power supply noise during SoC die testing in 2.5D ICs. An SoC die in the 2.5D IC is typically composed of several blocks and two neighboring blocks that share the same power rails should not be toggled at the same time during shift. Therefore, the proposed programmable method does not assign the same stagger value to neighboring blocks. The positions of all blocks are first analyzed and the shared boundary length between blocks is then calculated. Based on the position relationships between the blocks, a mathematical model is presented to derive optimal result for small-to-medium sized problems. For larger designs, a heuristic algorithm is proposed and evaluated.

In summary, the dissertation targets important design and optimization problems related to testing of interposer-based 2.5D ICs. The proposed research has led to theoretical insights, experiment results, and a set of test and design-for-test methods to make testing effective and feasible from a cost perspective.

Piezoelectric energy harvesting using blood-flow-like excitation for implantable devices

The goal of this research is to produce a system for powering medical implants to increase the lifetime of the implanted devices and reduce the battery size. The system consists of a number of elements – the piezoelectric material for generating power, the device design, the circuit for rectification and energy storage. The piezoelectric material is analysed and a process for producing a repeatable high quality piezoelectric material is described. A full width half maximum (FWHM) of the rocking curve X-Ray diffraction (XRD) scan of between ~1.5° to ~1.7° for test wafers was achieved. This is state of the art for AlN on silicon and means devices with good piezoelectric constants can be fabricated. Finite element modelling FEM) was used to design the structures for energy harvesting. The models developed in this work were established to have an accuracy better than 5% in terms of the difference between measured and modelled results. Devices made from this material were analysed for power harvesting ability as well as the effect that they have on the flow of liquid which is an important consideration for implantable devices. The FEM results are compared to experimental results from laser Doppler vibrometry (LDV), magnetic shaker and perfusion machine tests. The rectifying circuitry for the energy harvester was also investigated. The final solution uses multiple devices to provide the power to augment the battery and so this was a key feature to be considered. Many circuits were examined and a solution based on a fully autonomous circuit was advanced. This circuit was analysed for use with multiple low power inputs similar to the results from previous investigations into the energy harvesting devices. Polymer materials were also studied for use as a substitute for the piezoelectric material as well as the substrate because silicon is more brittle.

A low overhead error confinement method based on application statistical characteristics

Reliability has emerged as a critical design constraint especially in memories. Designers are going to great lengths to guarantee fault free operation of the underlying silicon by adopting redundancy-based techniques, which essentially try to detect and correct every single error. However, such techniques come at a cost of large area, power and performance overheads which making many researchers to doubt their efficiency especially for error resilient systems where 100% accuracy is not always required. In this paper, we present an alternative method focusing on the confinement of the resulting output error induced by any reliability issues. By focusing on memory faults, rather than correcting every single error the proposed method exploits the statistical characteristics of any target application and replaces any erroneous data with the best available estimate of that data. To realize the proposed method a RISC processor is augmented with custom instructions and special-purpose functional units. We apply the method on the proposed enhanced processor by studying the statistical characteristics of the various algorithms involved in a popular multimedia application. Our experimental results show that in contrast to state-of-the-art fault tolerance approaches, we are able to reduce runtime and area overhead by 71.3% and 83.3% respectively.

Dielectric screening in atomically thin boron nitride nanosheets

Two-dimensional (2D) hexagonal boron nitride (BN) nanosheets are excellent dielectric substrate for graphene, molybdenum disulfide, and many other 2D nanomaterial-based electronic and photonic devices. To optimize the performance of these 2D devices, it is essential to understand the dielectric screening properties of BN nanosheets as a function of the thickness. Here, electric force microscopy along with theoretical calculations based on both state-of-the-art first-principles calculations with van der Waals interactions under consideration, and nonlinear Thomas-Fermi theory models are used to investigate the dielectric screening in high-quality BN nanosheets of different thicknesses. It is found that atomically thin BN nanosheets are less effective in electric field screening, but the screening capability of BN shows a relatively weak dependence on the layer thickness.