987 resultados para Blumlien Circuit


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The maximal aerobic capacity while running and cycling was measured in 22 prepubertal children (mean age +/- SD 9.5 +/- 0.8 years): 14 obese (47.3 +/- 10 kg) and 8 non-obese (31.1 +/- 6.1 kg). Oxygen consumption (VO2) and carbon dioxide production were measured by an open circuit method. Steady state VO2 was determined at different levels of exercise up to the maximal power on the cycloergometer (92 W in obese and 77 W in non-obese subjects) and up to the maximal running speed on the treadmill at a 2% slope (8.3 km/h in obese and 9.0 km/h in lean children). Expressed in absolute values, the VO2max in obese children was significantly higher than in controls (1.55 +/- 0.29 l/min versus 1.23 +/- 0.22 l/min, p < 0.05) for the treadmill test and comparable in the two groups (1.4 +/- 0.2 l/min versus 1.16 +/- 0.2 l/min, ns) for the cycloergometer test. When VO2max was expressed per kg fat free mass, the difference between the two groups disappeared for both tests. These data suggest that obese children had no limitation of maximal aerobic power. Therefore, the magnitude of the workload prescribed when a physical activity program is intended for the therapy of childhood obesity, it should be designed to increase caloric output rather than to improve cardiorespiratory fitness.

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A new technology for the three-dimensional (3-D) stacking of very thin chips on a substrate is currently under development within the ultrathin chip stacking (UTCS) Esprit Project 24910. In this work, we present the first-level UTCS structure and the analysis of the thermomechanical stresses produced by the manufacturing process. Chips are thinned up to 10 or 15 m. We discuss potentially critical points at the edges of the chips, the suppression of delamination problems of the peripheral dielectric matrix and produce a comparative study of several technological choices for the design of metallic interconnect structures. The purpose of these calculations is to give inputs for the definition of design rules for this technology. We have therefore undertaken a programme that analyzes the influence of sundry design parameters and alternative development options. Numerical analyses are based on the finite element method.

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This paper reports the microstructural analysis of S-rich CuIn(S,Se)2 layers produced by electrodeposition of CuInSe2 precursors and annealing under sulfurizing conditions as a function of the temperature of sulfurization. The characterization of the layers by Raman scattering, scanning electron microscopy, Auger electron spectroscopy, and XRD techniques has allowed observation of the strong dependence of the crystalline quality of these layers on the sulfurization temperature: Higher sulfurization temperatures lead to films with improved crystallinity, larger average grain size, and lower density of structural defects. However, it also favors the formation of a thicker MoS2 interphase layer between the CuInS2 absorber layer and the Mo back contact. Decreasing the temperature of sulfurization leads to a significant decrease in the thickness of this intermediate layer and is also accompanied by significant changes in the composition of the interface region between the absorber and the MoS2 layer, which becomes Cu rich. The characterization of devices fabricated with these absorbers corroborates the significant impact of all these features on device parameters as the open circuit voltage and fill factor that determine the efficiency of the solar cells.

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A frequency-dependent compact model for inductors in high ohmic substrates, which is based on an energy point-of-view, is developed. This approach enables the description of the most important coupling phenomena that take place inside the device. Magnetically induced losses are quite accurately calculated and coupling between electric and magnetic fields is given by means of a delay constant. The later coupling phenomenon provides a modified procedure for the computation of the fringing capacitance value, when the self-resonance frequency of the inductor is used as a fitting parameter. The model takes into account the width of every metal strip and the pitch between strips. This enables the description of optimized layout inductors. Data from experiments and electromagnetic simulators are presented to test the accuracy of the model.

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Avalanche photodiodes operated in the Geiger mode offer a high intrinsic gain as well as an excellent timing accuracy. These qualities make the sensor specially suitable for those applications where detectors with high sensitivity and low timing uncertainty are required. Moreover, they are compatible with standard CMOS technologies, allowing sensor and front-end electronics integration within the pixel cell. However, the sensor suffers from high levels of intrinsic noise, which may lead to erroneous results and limit the range of detectable signals. They also increase the amount of data that has to be stored. In this work, we present a pixel based on a Geiger-mode avalanche photodiode operated in the gated mode to reduce the probability to detect noise counts interfering with photon arrival events. The readout circuit is based on a two grounds scheme to enable low reverse bias overvoltages and consequently lessen the dark count rate. Experimental characterization of the fabricated pixel with the HV-AMS 0.35µm standard technology is also presented in this article.

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The advances of the semiconductor industry enable microelectromechanical systems sensors, signal conditioning logic and network access to be integrated into a smart sensor node. In this framework, a mixed-mode interface circuit for monolithically integrated gas sensor arrays was developed with high-level design techniques. This interface system includes analog electronics for inspection of up to four sensor arrays and digital logic for smart control and data communication. Although different design methodologies were used in the conception of the complete circuit, high-level synthesis tools and methodologies were crucial in speeding up the whole design cycle, enhancing reusability for future applications and producing a flexible and robust component.

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This work presents an alternative to generate continuous phase shift of sinusoidal signals based on the use of super harmonic injection locked oscillators (ILO). The proposed circuit is a second harmonic ILO with varactor diodes as tuning elements. In the locking state, by changing the varactor bias, a phase shift instead of a frequency shift is observed at the oscillator output. By combining two of these circuits, relative phases up to 90 could be achieved. Two prototypes of the circuit have been implemented and tested, a hybrid version working in the range of 200-300 MHz and a multichip module (MCM) version covering the 900¿1000 MHz band.

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This paper presents a new method and circuit for the conversion of binary phase-shift keying (BPSK) signals into amplitude shift keying signals. The basic principles of the conversion method are the superharmonic injection and locking of oscillator circuits, and interference phenomena. The first one is used to synchronize the oscillators, while the second is used to generate an amplitude interference pattern that reproduces the original phase modulation. When combined with an envelope detector, the proposed converter circuit allows the coherent demodulation of BPSK signals without need of any explicit carrier recovery system. The time response of the converter circuit to phase changes of the input signal, as well as the conversion limits, are discussed in detail.

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This paper demonstrates the feasibility of a new circuit for the conversion of binary phase-shift keying signals into amplitude-shift keying signals. In its simplest form, the converter circuit is composed by a power divider, a couple of second harmonic injection-locked oscillators, and a power combiner. The operation of the converter circuit relies on the frequency synchronization of both oscillators and the generation of an interference pattern by combining their outputs, which reproduces the original phase modulation. Two prototypes of the converter have been implemented. The first one is a hybrid version working in the 400-530-MHz frequency range. The second one has been implemented using multichip-module technology, and is intended to work in the 1.8-2.2-GHz frequency range.

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Inductive-based devices integrated with Si technology for biodetection applications are characterized, using simple resonant differential filter configurations. This has allowed the corroboration of the viability of the proposed circuits, which are characterized by their very high simplicity, for microinductive signal conditioning in high-sensitivity sensor devices. The simulation of these simple circuits predicts sensitivities of the differential output voltage which can achieve values in the range of 0.1-1 V/nH, depending on the coil parameters. These very high-sensitivity values open the possibility for the experimental detection of extremely small inductance changes in the devices. For real microinductive devices, both series resistance and parasitic capacitive components contribute to the decrease of the differential circuit sensitivity. Nevertheless, measurements performed using micro-coils fabricated with relatively high series resistance and coupling parasitic effects have allowed detection of changes in the range of 2 nH. which are compatible with biodetection applications with estimated detection limits below the picomolarity range.

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The study of the thermal behavior of complex packages as multichip modules (MCM¿s) is usually carried out by measuring the so-called thermal impedance response, that is: the transient temperature after a power step. From the analysis of this signal, the thermal frequency response can be estimated, and consequently, compact thermal models may be extracted. We present a method to obtain an estimate of the time constant distribution underlying the observed transient. The method is based on an iterative deconvolution that produces an approximation to the time constant spectrum while preserving a convenient convolution form. This method is applied to the obtained thermal response of a microstructure as analyzed by finite element method as well as to the measured thermal response of a transistor array integrated circuit (IC) in a SMD package.

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A systematic method to improve the quality (Q) factor of RF integrated inductors is presented in this paper. The proposed method is based on the layout optimization to minimize the series resistance of the inductor coil, taking into account both ohmic losses, due to conduction currents, and magnetically induced losses, due to eddy currents. The technique is particularly useful when applied to inductors in which the fabrication process includes integration substrate removal. However, it is also applicable to inductors on low-loss substrates. The method optimizes the width of the metal strip for each turn of the inductor coil, leading to a variable strip-width layout. The optimization procedure has been successfully applied to the design of square spiral inductors in a silicon-based multichip-module technology, complemented with silicon micromachining postprocessing. The obtained experimental results corroborate the validity of the proposed method. A Q factor of about 17 have been obtained for a 35-nH inductor at 1.5 GHz, with Q values higher than 40 predicted for a 20-nH inductor working at 3.5 GHz. The latter is up to a 60% better than the best results for a single strip-width inductor working at the same frequency.

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We consider the effects of external, multiplicative white noise on the relaxation time of a general representation of a bistable system from the points of view provided by two, quite different, theoretical approaches: the classical Stratonovich decoupling of correlations and the new method due to Jung and Risken. Experimental results, obtained from a bistable electronic circuit, are compared to the theoretical predictions. We show that the phenomenon of critical slowing down appears as a function of the noise parameters, thereby providing a correct characterization of a noise-induced transition.

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Body accelerations during human walking were recorded by a portable measuring device. A new method for parameterizing body accelerations and finding the pattern of walking is outlined. Two neural networks were designed to recognize each pattern and estimate the speed and incline of walking. Six subjects performed treadmill walking followed by self-paced walking on an outdoor test circuit involving roads of various inclines. The neural networks were first "trained" by known patterns of treadmill walking. Then the inclines, the speeds, and the distance covered during overground walking (outdoor circuit) were estimated. The results show a good agreement between actual and predicted variables. The standard deviation of estimated incline was less than 2.6% and the maximum of the coefficient of variation of speed estimation is 6%. To the best of our knowledge, these results constitute the first assessment of speed, incline and distance covered during level and slope walking and offer investigators a new tool for assessing levels of outdoor physical activity.

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OBJECTIVE: To describe a method to obtain a profile of the duration and intensity (speed) of walking periods over 24 hours in women under free-living conditions. DESIGN: A new method based on accelerometry was designed for analyzing walking activity. In order to take into account inter-individual variability of acceleration, an individual calibration process was used. Different experiments were performed to highlight the variability of acceleration vs walking speed relationship, to analyze the speed prediction accuracy of the method, and to test the assessment of walking distance and duration over 24-h. SUBJECTS: Twenty-eight women were studied (mean+/-s.d.) age: 39.3+/-8.9 y; body mass: 79.7+/-11.1 kg; body height: 162.9+/-5.4 cm; and body mass index (BMI) 30.0+/-3.8 kg/m(2). RESULTS: Accelerometer output was significantly correlated with speed during treadmill walking (r=0.95, P<0.01), and short unconstrained walks (r=0.86, P<0.01), although with a large inter-individual variation of the regression parameters. By using individual calibration, it was possible to predict walking speed on a standard urban circuit (predicted vs measured r=0.93, P<0.01, s.e.e.=0.51 km/h). In the free-living experiment, women spent on average 79.9+/-36.0 (range: 31.7-168.2) min/day in displacement activities, from which discontinuous short walking activities represented about 2/3 and continuous ones 1/3. Total walking distance averaged 2.1+/-1.2 (range: 0.4-4.7) km/day. It was performed at an average speed of 5.0+/-0.5 (range: 4.1-6.0) km/h. CONCLUSION: An accelerometer measuring the anteroposterior acceleration of the body can estimate walking speed together with the pattern, intensity and duration of daily walking activity.