The Memorbook of Nürnberg, containing the names of the Jews martyred in that city in the year 5109=1349 A.D. : from the unique manuscript preserved in the University Library Cambridge and marked: ADD. 1506

ed. by W. H. Lowe

Complex pelvic traumas: Data linkage of the German Pelvic Injury Register and the TraumaRegister DGU®

BACKGROUND Complex pelvic traumas, i.e., pelvic fractures accompanied by pelvic soft tissue injuries, still have an unacceptably high mortality rate of about 18 %. PATIENTS AND METHODS We retrospectively evaluated an intersection set of data from the TraumaRegister DGU® and the German Pelvic Injury Register from 2004-2009. Patients with complex and noncomplex pelvic traumas were compared regarding their vital parameters, emergency management, stay in the ICU, and outcome. RESULTS From a total of 344 patients with pelvic injuries, 21 % of patients had a complex and 79 % a noncomplex trauma. Complex traumas were significantly less likely to survive (16.7 % vs. 5.9 %). Whereas vital parameters and emergency treatment in the preclinical setting did not differ substantially, patients with complex traumas were more often in shock and showed acute traumatic coagulopathy on hospital arrival, which resulted in more fluid volumes and transfusions when compared to patients with noncomplex traumas. Furthermore, patients with complex traumas had more complications and longer ICU stays. CONCLUSION Prevention of exsanguination and complications like multiple organ dysfunction syndrome still pose a major challenge in the management of complex pelvic traumas.

Midrash milim : an English and Hebrew lexicon to which is added a selection of proper names occuring in scripture and in the Rabbinical writings

by Michael Josephs

The impact of a register on the management of neonatal cooling in Switzerland.

BACKGROUND Therapeutic hypothermia following hypoxic ischaemic encephalopathy in term infants was introduced into Switzerland in 2005. Initial documentation of perinatal and resuscitation details was poor and neuromonitoring insufficient. In 2011, a National Asphyxia and Cooling Register was introduced. AIMS To compare management of cooled infants before and after introduction of the register concerning documentation, neuromonitoring, cooling methods and evaluation of temperature variability between cooling methods. STUDY DESIGN Data of cooled infants before the register was in place (first time period: 2005-2010) and afterwards (second time period: 2011-2012) was collected with a case report form. RESULTS 150 infants were cooled during the first time period and 97 during the second time period. Most infants were cooled passively or passively with gel packs during both time periods (82% in 2005-2010 vs 70% in 2011-2012), however more infants were cooled actively during the second time period (18% versus 30%). Overall there was a significant reduction in temperature variability (p < 0.001) comparing the two time periods. A significantly higher proportion of temperature measurements within target temperature range (72% versus 77%, p < 0.001), fewer temperature measurements above (24% versus 7%, p < 0.001) and more temperatures below target range (4% versus 16%, p < 0.001) were recorded during the second time period. Neuromonitoring improved after introduction of the cooling register. CONCLUSION Management of infants with HIE improved since introducing the register. Temperature variability was reduced, more temperature measurements in the target range and fewer temperature measurements above target range were observed. Neuromonitoring has improved, however imaging should be performed more often.

Decoding urban landscapes through the analysis of place names and imaginaries at a local scale.

Toponomastics is increasingly interested in the subjective role of place names in quotidian life. In the frame of Urban Geography, the interest in this matter is currently growing, as the recently change in modes of habitation has urged our discipline to find new ways of exploring the cities. In this context, the study of how name's significance is connected to a urban society constitutes a very interesting approach. We believe in the importance of place names as tools for decoding urban areas and societies at a local-scale. This consideration has been frequently taken into account in the analysis of exonyms, although in their case they are not exempt of political and practical implications that prevail over the tool function. The study of toponomastic processes helps us understanding how the city works, by analyzing the liaison between urban landscape, imaginaries and toponyms which is reflected in the scarcity of some names, in the biased creation of new toponyms and in the pressure exercised over every place name by tourists, residents and local government for changing, maintaining or eliminating them. Our study-case, Toledo, is one of the oldest cities in Spain, full of myths, stories and histories that can only be understood combined with processes of internal evolution of the city linked to the arrival of new residents and the more and more notorious change of its historical landscape. At a local scale, we are willing to decode the information which is contained in its toponyms about its landscape and its society.

Securing implementations of feedback-shift-register-based ciphers using compiler optimizations and co-processors

Los algoritmos basados en registros de desplazamiento con realimentación (en inglés FSR) se han utilizado como generadores de flujos pseudoaleatorios en aplicaciones con recursos limitados como los sistemas de apertura sin llave. Se considera canal primario a aquel que se utiliza para realizar una transmisión de información. La aparición de los ataques de canal auxiliar (en inglés SCA), que explotan información filtrada inintencionadamente a través de canales laterales como el consumo, las emisiones electromagnéticas o el tiempo empleado, supone una grave amenaza para estas aplicaciones, dado que los dispositivos son accesibles por un atacante. El objetivo de esta tesis es proporcionar un conjunto de protecciones que se puedan aplicar de forma automática y que utilicen recursos ya disponibles, evitando un incremento sustancial en los costes y alargando la vida útil de aplicaciones que puedan estar desplegadas. Explotamos el paralelismo existente en algoritmos FSR, ya que sólo hay 1 bit de diferencia entre estados de rondas consecutivas. Realizamos aportaciones en tres niveles: a nivel de sistema, utilizando un coprocesador reconfigurable, a través del compilador y a nivel de bit, aprovechando los recursos disponibles en el procesador. Proponemos un marco de trabajo que nos permite evaluar implementaciones de un algoritmo incluyendo los efectos introducidos por el compilador considerando que el atacante es experto. En el campo de los ataques, hemos propuesto un nuevo ataque diferencial que se adapta mejor a las condiciones de las implementaciones software de FSR, en las que el consumo entre rondas es muy similar. SORU2 es un co-procesador vectorial reconfigurable propuesto para reducir el consumo energético en aplicaciones con paralelismo y basadas en el uso de bucles. Proponemos el uso de SORU2, además, para ejecutar algoritmos basados en FSR de forma segura. Al ser reconfigurable, no supone un sobrecoste en recursos, ya que no está dedicado en exclusiva al algoritmo de cifrado. Proponemos una configuración que ejecuta múltiples algoritmos de cifrado similares de forma simultánea, con distintas implementaciones y claves. A partir de una implementación sin protecciones, que demostramos que es completamente vulnerable ante SCA, obtenemos una implementación segura a los ataques que hemos realizado. A nivel de compilador, proponemos un mecanismo para evaluar los efectos de las secuencias de optimización del compilador sobre una implementación. El número de posibles secuencias de optimizaciones de compilador es extremadamente alto. El marco de trabajo propuesto incluye un algoritmo para la selección de las secuencias de optimización a considerar. Debido a que las optimizaciones del compilador transforman las implementaciones, se pueden generar automáticamente implementaciones diferentes combinamos para incrementar la seguridad ante SCA. Proponemos 2 mecanismos de aplicación de estas contramedidas, que aumentan la seguridad de la implementación original sin poder considerarse seguras. Finalmente hemos propuesto la ejecución paralela a nivel de bit del algoritmo en un procesador. Utilizamos la forma algebraica normal del algoritmo, que automáticamente se paraleliza. La implementación sobre el algoritmo evaluado mejora en rendimiento y evita que se filtre información por una ejecución dependiente de datos. Sin embargo, es más vulnerable ante ataques diferenciales que la implementación original. Proponemos una modificación del algoritmo para obtener una implementación segura, descartando parcialmente ejecuciones del algoritmo, de forma aleatoria. Esta implementación no introduce una sobrecarga en rendimiento comparada con las implementaciones originales. En definitiva, hemos propuesto varios mecanismos originales a distintos niveles para introducir aleatoridad en implementaciones de algoritmos FSR sin incrementar sustancialmente los recursos necesarios. ABSTRACT Feedback Shift Registers (FSR) have been traditionally used to implement pseudorandom sequence generators. These generators are used in Stream ciphers in systems with tight resource constraints, such as Remote Keyless Entry. When communicating electronic devices, the primary channel is the one used to transmit the information. Side-Channel Attack (SCA) use additional information leaking from the actual implementation, including power consumption, electromagnetic emissions or timing information. Side-Channel Attacks (SCA) are a serious threat to FSR-based applications, as an attacker usually has physical access to the devices. The main objective of this Ph.D. thesis is to provide a set of countermeasures that can be applied automatically using the available resources, avoiding a significant cost overhead and extending the useful life of deployed systems. If possible, we propose to take advantage of the inherent parallelism of FSR-based algorithms, as the state of a FSR differs from previous values only in 1-bit. We have contributed in three different levels: architecture (using a reconfigurable co-processor), using compiler optimizations, and at bit level, making the most of the resources available at the processor. We have developed a framework to evaluate implementations of an algorithm including the effects introduced by the compiler. We consider the presence of an expert attacker with great knowledge on the application and the device. Regarding SCA, we have presented a new differential SCA that performs better than traditional SCA on software FSR-based algorithms, where the leaked values are similar between rounds. SORU2 is a reconfigurable vector co-processor. It has been developed to reduce energy consumption in loop-based applications with parallelism. In addition, we propose its use for secure implementations of FSR-based algorithms. The cost overhead is discarded as the co-processor is not exclusively dedicated to the encryption algorithm. We present a co-processor configuration that executes multiple simultaneous encryptions, using different implementations and keys. From a basic implementation, which is proved to be vulnerable to SCA, we obtain an implementation where the SCA applied were unsuccessful. At compiler level, we use the framework to evaluate the effect of sequences of compiler optimization passes on a software implementation. There are many optimization passes available. The optimization sequences are combinations of the available passes. The amount of sequences is extremely high. The framework includes an algorithm for the selection of interesting sequences that require detailed evaluation. As existing compiler optimizations transform the software implementation, using different optimization sequences we can automatically generate different implementations. We propose to randomly switch between the generated implementations to increase the resistance against SCA.We propose two countermeasures. The results show that, although they increase the resistance against SCA, the resulting implementations are not secure. At bit level, we propose to exploit bit level parallelism of FSR-based implementations using pseudo bitslice implementation in a wireless node processor. The bitslice implementation is automatically obtained from the Algebraic Normal Form of the algorithm. The results show a performance improvement, avoiding timing information leakage, but increasing the vulnerability against differential SCA.We provide a secure version of the algorithm by randomly discarding part of the data obtained. The overhead in performance is negligible when compared to the original implementations. To summarize, we have proposed a set of original countermeasures at different levels that introduce randomness in FSR-based algorithms avoiding a heavy overhead on the resources required.

Invariance of brain-wave representations of simple visual images and their names

In two experiments, electric brain waves of 14 subjects were recorded under several different conditions to study the invariance of brain-wave representations of simple patches of colors and simple visual shapes and their names, the words blue, circle, etc. As in our earlier work, the analysis consisted of averaging over trials to create prototypes and test samples, to both of which Fourier transforms were applied, followed by filtering and an inverse transformation to the time domain. A least-squares criterion of fit between prototypes and test samples was used for classification. The most significant results were these. By averaging over different subjects, as well as trials, we created prototypes from brain waves evoked by simple visual images and test samples from brain waves evoked by auditory or visual words naming the visual images. We correctly recognized from 60% to 75% of the test-sample brain waves. The general conclusion is that simple shapes such as circles and single-color displays generate brain waves surprisingly similar to those generated by their verbal names. These results, taken together with extensive psychological studies of auditory and visual memory, strongly support the solution proposed for visual shapes, by Bishop Berkeley and David Hume in the 18th century, to the long-standing problem of how the mind represents simple abstract ideas.

Propagating structure of Alzheimer’s β-amyloid(10–35) is parallel β-sheet with residues in exact register

The pathognomonic plaques of Alzheimer’s disease are composed primarily of the 39- to 43-aa β-amyloid (Aβ) peptide. Crosslinking of Aβ peptides by tissue transglutaminase (tTg) indicates that Gln15 of one peptide is proximate to Lys16 of another in aggregated Aβ. Here we report how the fibril structure is resolved by mapping interstrand distances in this core region of the Aβ peptide chain with solid-state NMR. Isotopic substitution provides the source points for measuring distances in aggregated Aβ. Peptides containing a single carbonyl 13C label at Gln15, Lys16, Leu17, or Val18 were synthesized and evaluated by NMR dipolar recoupling methods for the measurement of interpeptide distances to a resolution of 0.2 Å. Analysis of these data establish that this central core of Aβ consists of a parallel β-sheet structure in which identical residues on adjacent chains are aligned directly, i.e., in register. Our data, in conjunction with existing structural data, establish that the Aβ fibril is a hydrogen-bonded, parallel β-sheet defining the long axis of the Aβ fibril propagation.