926 resultados para Switching convertors


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Various load compensation schemes proposed in literature assume that voltage source at point of common coupling (PCC) is stiff. In practice, however, the load is remote from a distribution substation and is supplied by a feeder. In the presence of feeder impedance, the PWM inverter switchings distort both the PCC voltage and the source currents. In this paper load compensation with such a non-stiff source is considered. A switching control of the voltage source inverter (VSI) based on state feedback is used for load compensation with non-stiff source. The design of the state feedback controller requires careful considerations in choosing a gain matrix and in the generation of reference quantities. These aspects are considered in this paper. Detailed simulation and experimental results are given to support the control design.

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In this paper, the commonly used switching schemes for sliding mode control of power converters is analyzed and designed in the frequency domain. Particular application of a distribution static compensator (DSTATCOM) in voltage control mode is investigated in a power distribution system. Tsypkin's method and describing function is used to obtain the switching conditions for the two-level and three-level voltage source inverters. Magnitude conditions of carrier signals are developed for robust switching of the inverter under carrier-based modulation scheme of sliding mode control. The existence of border collision bifurcation is identified to avoid the complex switching states of the inverter. The load bus voltage of an unbalanced three-phase nonstiff radial distribution system is controlled using the proposed carrier-based design. The results are validated using PSCAD/EMTDC simulation studies and through a scaled laboratory model of DSTATCOM that is developed for experimental verification

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stract This paper proposes a hybrid discontinuous control methodology for a voltage source converter (VSC), which is used in an uninterrupted power supply (UPS) application. The UPS controls the voltage at the point of common coupling (PCC). An LC filter is connected at the output of the VSC to bypass switching harmonics. With the help of both filter inductor current and filter capacitor voltage control, the voltage across the filter capacitor is controlled. Based on the voltage error, the control is switched between current and voltage control modes. In this scheme, an extra diode state is used that makes the VSC output current discontinuous. This diode state reduces the switching losses. The UPS controls the active power it supplies to a three-phase, four-wire distribution system. This gives a full flexibility to the grid to buy power from the UPS system depending on its cost and load requirement at any given time. The scheme is validated through simulation using PSCAD.

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Bearing damage in modern inverter-fed AC drive systems is more common than in motors working with 50 or 60 Hz power supply. Fast switching transients and common mode voltage generated by a PWM inverter cause unwanted shaft voltage and resultant bearing currents. Parasitic capacitive coupling creates a path to discharge current in rotors and bearings. In order to analyze bearing current discharges and their effect on bearing damage under different conditions, calculation of the capacitive coupling between the outer and inner races is needed. During motor operation, the distances between the balls and races may change the capacitance values. Due to changing of the thickness and spatial distribution of the lubricating grease, this capacitance does not have a constant value and is known to change with speed and load. Thus, the resultant electric field between the races and balls varies with motor speed. The lubricating grease in the ball bearing cannot withstand high voltages and a short circuit through the lubricated grease can occur. At low speeds, because of gravity, balls and shaft voltage may shift down and the system (ball positions and shaft) will be asymmetric. In this study, two different asymmetric cases (asymmetric ball position, asymmetric shaft position) are analyzed and the results are compared with the symmetric case. The objective of this paper is to calculate the capacitive coupling and electric fields between the outer and inner races and the balls at different motor speeds in symmetrical and asymmetrical shaft and balls positions. The analysis is carried out using finite element simulations to determine the conditions which will increase the probability of high rates of bearing failure due to current discharges through the balls and races.

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The design and implementation of a high-power (2 MW peak) vector control drive is described. The inverter switching frequency is low, resulting in high-harmonic-content current waveforms. A block diagram of the physical system is given, and each component is described in some detail. The problem of commanded slip noise sensitivity, inherent in high-power vector control drives, is discussed, and a solution is proposed. Results are given which demonstrate the successful functioning of the system

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This paper presents a high voltage pulsed power system based on low voltage switch-capacitor units connected to a current source for several applications such as plasma systems. A modified positive buck-boost converter topology is used to utilize the current source concept and a series of low voltage switch-capacitor units is connected to the current source in order to provide high voltage with high voltage stress (dv/dt) as demanded by loads. This pulsed power converter is flexible in terms of energy control, in that the stored energy in the current source can be adjusted by changing the current magnitude to significantly improve the efficiency of various systems with different requirements. Output voltage magnitude and stress (dv/dt) can be controlled by a proper selection of components and control algorithm to turn on and off switching devices.

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A new explicit rate allocation algorithm is proposed for achieving generic weight-proportional max-min (GWPMM) fairness in asynchronous transfer mode (ATM) available bit rate services. This algorithm scales well with a fixed computational complexity of O(1) and can realise GWPMM fair rate allocation in an ATM network accurately.

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AC motors are largely used in a wide range of modern systems, from household appliances to automated industry applications such as: ventilations systems, fans, pumps, conveyors and machine tool drives. Inverters are widely used in industrial and commercial applications due to the growing need for speed control in ASD systems. Fast switching transients and the common mode voltage, in interaction with parasitic capacitive couplings, may cause many unwanted problems in the ASD applications. These include shaft voltage and leakage currents. One of the inherent characteristics of Pulse Width Modulation (PWM) techniques is the generation of the common mode voltage, which is defined as the voltage between the electrical neutral of the inverter output and the ground. Shaft voltage can cause bearing currents when it exceeds the amount of breakdown voltage level of the thin lubricant film between the inner and outer rings of the bearing. This phenomenon is the main reason for early bearing failures. A rapid development in power switches technology has lead to a drastic decrement of switching rise and fall times. Because there is considerable capacitance between the stator windings and the frame, there can be a significant capacitive current (ground current escaping to earth through stray capacitors inside a motor) if the common mode voltage has high frequency components. This current leads to noises and Electromagnetic Interferences (EMI) issues in motor drive systems. These problems have been dealt with using a variety of methods which have been reported in the literature. However, cost and maintenance issues have prevented these methods from being widely accepted. Extra cost or rating of the inverter switches is usually the price to pay for such approaches. Thus, the determination of cost-effective techniques for shaft and common mode voltage reduction in ASD systems, with the focus on the first step of the design process, is the targeted scope of this thesis. An introduction to this research – including a description of the research problem, the literature review and an account of the research progress linking the research papers – is presented in Chapter 1. Electrical power generation from renewable energy sources, such as wind energy systems, has become a crucial issue because of environmental problems and a predicted future shortage of traditional energy sources. Thus, Chapter 2 focuses on the shaft voltage analysis of stator-fed induction generators (IG) and Doubly Fed Induction Generators DFIGs in wind turbine applications. This shaft voltage analysis includes: topologies, high frequency modelling, calculation and mitigation techniques. A back-to-back AC-DC-AC converter is investigated in terms of shaft voltage generation in a DFIG. Different topologies of LC filter placement are analysed in an effort to eliminate the shaft voltage. Different capacitive couplings exist in the motor/generator structure and any change in design parameters affects the capacitive couplings. Thus, an appropriate design for AC motors should lead to the smallest possible shaft voltage. Calculation of the shaft voltage based on different capacitive couplings, and an investigation of the effects of different design parameters are discussed in Chapter 3. This is achieved through 2-D and 3-D finite element simulation and experimental analysis. End-winding parameters of the motor are also effective factors in the calculation of the shaft voltage and have not been taken into account in previous reported studies. Calculation of the end-winding capacitances is rather complex because of the diversity of end winding shapes and the complexity of their geometry. A comprehensive analysis of these capacitances has been carried out with 3-D finite element simulations and experimental studies to determine their effective design parameters. These are documented in Chapter 4. Results of this analysis show that, by choosing appropriate design parameters, it is possible to decrease the shaft voltage and resultant bearing current in the primary stage of generator/motor design without using any additional active and passive filter-based techniques. The common mode voltage is defined by a switching pattern and, by using the appropriate pattern; the common mode voltage level can be controlled. Therefore, any PWM pattern which eliminates or minimizes the common mode voltage will be an effective shaft voltage reduction technique. Thus, common mode voltage reduction of a three-phase AC motor supplied with a single-phase diode rectifier is the focus of Chapter 5. The proposed strategy is mainly based on proper utilization of the zero vectors. Multilevel inverters are also used in ASD systems which have more voltage levels and switching states, and can provide more possibilities to reduce common mode voltage. A description of common mode voltage of multilevel inverters is investigated in Chapter 6. Chapter 7 investigates the elimination techniques of the shaft voltage in a DFIG based on the methods presented in the literature by the use of simulation results. However, it could be shown that every solution to reduce the shaft voltage in DFIG systems has its own characteristics, and these have to be taken into account in determining the most effective strategy. Calculation of the capacitive coupling and electric fields between the outer and inner races and the balls at different motor speeds in symmetrical and asymmetrical shaft and balls positions is discussed in Chapter 8. The analysis is carried out using finite element simulations to determine the conditions which will increase the probability of high rates of bearing failure due to current discharges through the balls and races.

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This paper discusses control strategies adapted for practical implementation and efficient motion of underwater vehicles. These trajectories are piecewise constant thrust arcs with few actuator switchings. We provide the numerical algorithm which computes the time efficient trajectories parameterized by the switching times. We discuss both the theoretical analysis and experimental implementation results.

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Common mode voltage generated by a power converter in combination with parasitic capacitive couplings is a potential source of shaft voltage in an AC motor drive system. In this paper, a three-phase motor drive system supplied with a single-phase AC-DC diode rectifier is investigated in order to reduce shaft voltage in a three-phase AC motor drive system. In this topology, the common mode voltage generated by the inverter is influenced by the AC-DC diode rectifier because the placement of the neutral point is changing in different rectifier circuit states. A pulse width modulation technique is presented by a proper placement of the zero vectors to reduce the common mode voltage level, which leads to a cost effective shaft voltage reduction technique without load current distortion, while keeping the switching frequency constant. Analysis and simulations have been presented to investigate the proposed method.

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Optimal scheduling of voltage regulators (VRs), fixed and switched capacitors and voltage on customer side of transformer (VCT) along with the optimal allocaton of VRs and capacitors are performed using a hybrid optimisation method based on discrete particle swarm optimisation and genetic algorithm. Direct optimisation of the tap position is not appropriate since in general the high voltage (HV) side voltage is not known. Therefore, the tap setting can be determined give the optimal VCT once the HV side voltage is known. The objective function is composed of the distribution line loss cost, the peak power loss cost and capacitors' and VRs' capital, operation and maintenance costs. The constraints are limits on bus voltage and feeder current along with VR taps. The bus voltage should be maintained within the standard level and the feeder current should not exceed the feeder-rated current. The taps are to adjust the output voltage of VRs between 90 and 110% of their input voltages. For validation of the proposed method, the 18-bus IEEE system is used. The results are compared with prior publications to illustrate the benefit of the employed technique. The results also show that the lowest cost planning for voltage profile will be achieved if a combination of capacitors, VRs and VCTs is considered.

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The flying capacitor multicell inverter (FCMI) possesses natural balancing property. With the phase-shifted (PS) carrier-based scheme, natural balancing can be achieved in a straightforward manner. However, to achieve natural balancing with the harmonically optimal phase-disposition (PD) carrierbased scheme, the conventional approaches require (n-1) x (n-1) trapezoidal carrier signals for an n-level inverter, which is (n-1) x (n-2) times more than that in the standard PD scheme. This paper proposes two improved natural balancing strategies for FMI under PD scheme, which use the same (n-1) carrier signals as used in the standard PD scheme. In the first scheme, on-line detection is performed of the band in which the modulation signal is located, corresponding period number of the carrier, and rising or falling half cycle of the carrier waveform to generate the switching signals based on certain rules. In the second strategy, the output voltage level selection is first processed and the switching signals are then generated according to a rule based on preferential cell selection algorithm. These methods are easy to use and can be simply implemented as compared to the other available methods. Simulation and experimental results are presented for a five-level inverter to verify these proposed schemes.

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The hysteresis modulation for power electronic converters is attractive in many different applications because of its unmatched dynamic response and wide command-tracking bandwidth. Its application and beneftis for two-level converters are well understood, but the extension of this strategy to multilevel converters is still under development. This paper summarizes and reviews the various hysteresis modulation approaches available in the literature for multilevel converters. The pros and cons of various techniques are described and compared for tracking the reference signal in order to attain an adequate switching optimization, excellent dynamic responses and high accuracy in steady-state operation. By using the recently developed multilevel hysteresis modulation approaches the advantages of using several accessible dc potentials in a multilevel inverter has been fully exploited. All of these hysteresis modulation approaches are testing for tracking a current reference when applied to a fivelevel inveter. The relevant simulation and experimental result are also presented. This study will provide a useful framweork and point of reference for the future development of hysteresis modulation for multilevel converters.

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Linking real-time schedulability directly to the Quality of Control (QoC), the ultimate goal of a control system, a hierarchical feedback QoC management framework with the Fixed Priority (FP) and the Earliest-Deadline-First (EDF) policies as plug-ins is proposed in this paper for real-time control systems with multiple control tasks. It uses a task decomposition model for continuous QoC evaluation even in overload conditions, and then employs heuristic rules to adjust the period of each of the control tasks for QoC improvement. If the total requested workload exceeds the desired value, global adaptation of control periods is triggered for workload maintenance. A sufficient stability condition is derived for a class of control systems with delay and period switching of the heuristic rules. Examples are given to demonstrate the proposed approach.

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This article examines the problem of patent ambush in standard setting, where patent owners are sometimes able to capture industry standards in order to secure monopoly power and windfall profits. Because standardisation generally introduces high switching costs, patent ambush can impose significant costs on downstream manufacturers and consumers and drastically reduce the efficiency gains of standardisation.This article considers how Australian competition law is likely to apply to patent ambush both in the development of a standard (through misrepresenting the existence of an essential patent) and after a standard is implemented (through refusing to license an essential patented technology either at all or on reasonable and non-discriminatory (RAND) terms). This article suggests that non-disclosure of patent interests is unlikely to restrained by Part IV of the Trade Practices Act (TPA), and refusals to license are only likely to be restrained if the refusal involves leveraging or exclusive dealing. By contrast, Standard Setting Organisations (SSOs) which seek to limit this behaviour through private ordering may face considerable scrutiny under the new cartel provisions of the TPA. This article concludes that SSOs may be best advised to implement administrative measures to prevent patent hold-up, such as reviewing which patents are essential for the implementation of a standard, asking patent holders to make their licence conditions public to promote transparency, and establishing forums where patent licensees can complain about licence terms that they consider to be unreasonable or discriminatory. Additionally, the ACCC may play a role in authorising SSO policies that could otherwise breach the new cartel provisions, but which have the practical effect of promoting competition in the standards setting environment.