Spring 2008

http://digitalcommons.winthrop.edu/dacusfriendsnewsletter/1003/thumbnail.jpg

Spring 2007

http://digitalcommons.winthrop.edu/dacusfriendsnewsletter/1001/thumbnail.jpg

Spring 2010: David vs. Goliath

http://digitalcommons.winthrop.edu/dacusfocus/1038/thumbnail.jpg

Spring 1999: Our Friends

http://digitalcommons.winthrop.edu/deanscorner/1004/thumbnail.jpg

Spring 1998: Serving Our Publics

http://digitalcommons.winthrop.edu/deanscorner/1003/thumbnail.jpg

Spring 1997: It Takes a Faculty to Build a Library

http://digitalcommons.winthrop.edu/deanscorner/1002/thumbnail.jpg

Spring 1996: A New Year

http://digitalcommons.winthrop.edu/deanscorner/1001/thumbnail.jpg

Spring 1994: Library Hopes for 1994/95

http://digitalcommons.winthrop.edu/deanscorner/1000/thumbnail.jpg

The Sage Page Spring 2014

Inside this Issue: Spring Service LearningWhy I Teach HonorsHonors Course ReflectionsHonors LifeWays to Get InvolvedHonors Study Abroad SpotlightBigs and Littles

The Sage Page Spring 2013

Inside this Issue: Why I Teach HonorsHonors SymposiaSpring 2013 HonorsA Semester in PicturesFall Service LearningWhy I Chose HonorsWhat Honors Continues to Do For MeHonorable MentionsAcademia Achieved: A Reflection on Fall 2012Student Spotlight: Matthew NealHonors with International Experience: IndiaCongratulations December 2012 Graduates!

The Sage Page Spring 2012

Inside this Issue: Student Spotlight: David ThackhamSpring 2012 CoursesCongratulations December 2011 Graduate!ConnectED Nicaragua WUHA! - A Semester in PicturesReflection on Fall 2011Perspective: Big and LittleFall 2011 SymposiumSpring 2012 PlansWith International Experience: Ireland What Honors Continues to Do for Me Stay Connected

The Sage Page Spring 2011

Inside this Issue: WUHA! Can Drive and Rollin’ in Rock HillWhy I Chose Honors… What Honors Has Done for Me...The OfficeCongrats GradWhy I Teach HonorsWUHA! - A Semester in PicturesSpring 2011 PlansFall 2010 ReflectionHonors Symposia SRHC and KIVAStudy Abroad and NSE

The Sage Page Spring 2010

Inside this Issue: Service Learning HighlightsCongratulations, December Graduate!WUHA! - A Semester in PicturesHonors SymposiaNCHCStudy AbroadWhere Are Honors Freshmen From?

Designing single event upset mitigation techniques for large SRAM-Based FPGA components

This thesis presents the study and development of fault-tolerant techniques for programmable architectures, the well-known Field Programmable Gate Arrays (FPGAs), customizable by SRAM. FPGAs are becoming more valuable for space applications because of the high density, high performance, reduced development cost and re-programmability. In particular, SRAM-based FPGAs are very valuable for remote missions because of the possibility of being reprogrammed by the user as many times as necessary in a very short period. SRAM-based FPGA and micro-controllers represent a wide range of components in space applications, and as a result will be the focus of this work, more specifically the Virtex® family from Xilinx and the architecture of the 8051 micro-controller from Intel. The Triple Modular Redundancy (TMR) with voters is a common high-level technique to protect ASICs against single event upset (SEU) and it can also be applied to FPGAs. The TMR technique was first tested in the Virtex® FPGA architecture by using a small design based on counters. Faults were injected in all sensitive parts of the FPGA and a detailed analysis of the effect of a fault in a TMR design synthesized in the Virtex® platform was performed. Results from fault injection and from a radiation ground test facility showed the efficiency of the TMR for the related case study circuit. Although TMR has showed a high reliability, this technique presents some limitations, such as area overhead, three times more input and output pins and, consequently, a significant increase in power dissipation. Aiming to reduce TMR costs and improve reliability, an innovative high-level technique for designing fault-tolerant systems in SRAM-based FPGAs was developed, without modification in the FPGA architecture. This technique combines time and hardware redundancy to reduce overhead and to ensure reliability. It is based on duplication with comparison and concurrent error detection. The new technique proposed in this work was specifically developed for FPGAs to cope with transient faults in the user combinational and sequential logic, while also reducing pin count, area and power dissipation. The methodology was validated by fault injection experiments in an emulation board. The thesis presents comparison results in fault coverage, area and performance between the discussed techniques.

Identificação das competências organizacionais de uma empresa do segmento eletro-eletrônico : caso Spring Carrier

O presente estudo tem como objetivo identificar as competências organizacionais essenciais da Springer Carrier Ltda. Os sujeitos da pesquisa realizada foram os executivos de primeira linha, gerentes de segunda linha, técnicos, um representante do acionista e alguns clientes. A metodologia utilizada foi o estudo de caso de natureza exploratória e descritiva, sendo os dados coletados através de entrevistas e aplicação de questionário. A análise dos dados foi feita de forma qualitativa, traçando-se uma relação entre as percepções dos públicos pesquisados, com o referencial teórico e a opinião do Gerente de Recursos Humanos da empresa, que é o autor deste estudo. Pôde-se concluir, com base na pesquisa, que a Springer Carrier possui três competências essenciais em seu contexto organizacional: gestão tecnológica voltada para produtos, gestão da produção e gestão de pessoas e ambiente interno. Foram, portanto, explorados os conceitos e os benefícios da abordagem do tema competências empresariais que poderão possibilitar à empresa várias análises futuras e desdobramentos em ações estratégicas, partindo-se do conteúdo deste estudo.