A code for designing optimal networks by implicit enumeration using the all-interconnection inequality formulation : (a programming manual for ILLODIE-AIF) /

Thesis (M.S.)--University of Illinois at Urbana-Champaign.

Reference manual of FORTRAN program ILLOD-(NOR-B) for optimal NOR networks

Mode of access: Internet.

Synthesis of optimal networks with NOR and NAND gates by integer programming /

"January 18, 1971."

Simulation of continuous networks with MODEL /

Includes bibliographical references.

A study of certain factors affecting computation times in designing optimal NOR networks by the implicit enumeration method using the feed-forward formulation /

Bibliography: p. 27-29.

Pruning and branching methods for designing optimal networks by the branch-and-bound method

Includes bibliographical references.

Design of irredundant multiple-level MOS networks for multiple-output and incompletely specified functions /

Thesis (M. S.)--University of Illinois at Urbana-Champaign.

On the synthesis by integer programming of optimal NOR gate networks for four variable switching functions /

"Supported in part by the National Science Foundation under grant no. NSF GJ-503."

NOR (NAND) network design : error-compensation procedures for fan-in and fan-out restricted networks (NETTRA-E1-FIFO and NETTRA-E2-FIFO /

Thesis (M. S.)--University of Illinois at Urbana-Champaign.

A branch-and-bound algorithm for optimal NOR networks (the algorithm description)

Bibliography: p. 29.

Design of Irredundant MOS Networks : a program manual for the design algorithm DIMN /

Thesis (M. S.)--University of Illinois at Urbana-Champaign.

Pruning procedures for NOR networks using permissible functions : principles of NOR network transduction programs NETTRA-PGI, NETTRA-P1, and NETTRA-P2 /

Bibliography: p. 49.

A summary of current research in computer nets,

"Presented at the 7th Hawaii International Conference on Systems Sciences."

An algorithm for the minimization of two-level multiple-output networks.

Vita.

Synthesis of optimal double-rail logic networks using NOR-OR gates by integer programming.

"Supported in part by ... Grant no. NSF GJ-503."