999 resultados para Electrical parameter


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The efficiency of the wind power conversions systems can be greatly improved using an appropriate control algorithm. In this work, a sliding mode control for variable speed wind turbine that incorporates a doubly fed induction generator is described. The electrical system incorporates a wound rotor induction machine with back-to-back three phase power converter bridges between its rotor and the grid. In the presented design the so-called vector control theory is applied, in order to simplify the electrical equations. The proposed control scheme uses stator flux-oriented vector control for the rotor side converter bridge control and grid voltage vector control for the grid side converter bridge control. The stability analysis of the proposed sliding mode controller under disturbances and parameter uncertainties is provided using the Lyapunov stability theory. Finally simulated results show, on the one hand, that the proposed controller provides high-performance dynamic characteristics, and on the other hand, that this scheme is robust with respect to the uncertainties that usually appear in the real systems.

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EFTA 2009

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ICEM 2010

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Changes in sensory and instrumental quality parameter sand in thawing drip, cooking drip and total drip loss of frozen stored Baltic cod fillets (Gadus morhua) at different storage temperatures were investigated. Cod fillets stored at –20 °C and –30 °C exhibited the lowest drip losses and obtained the highest sensory scores. Drip losses were found to be highest in cod fillets stored at –10°C and in double frozen fillets stored at –20 °C. These two experiments also gave the lowest sensory scores. The texture parameters increased during storage parallel with storage time. The waterbinding capacity was lowest at –10 °C and almost constant at –30 °C. There is a good correlation between the sensory scores for “tough” and the instrumental texture measurement for hardness and chewiness.

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Poly(dimethylsiloxane) (PDMS) is usually considered as a dielectric material and the PDMS microchannel wall can be treated as an electrically insulated boundary in an applied electric field. However, in certain layouts of microfluidic networks, electrical leakage through the PDMS microfluidic channel walls may not be negligible, which must be carefully considered in the microfluidic circuit design. In this paper, we report on the experimental characterization of the electrical leakage current through PDMS microfluidic channel walls of different configurations. Our numerical and experimental studies indicate that for tens of microns thick PDMS channel walls, electrical leakage through the PDMS wall could significantly alter the electrical field in the main channel. We further show that we can use the electrical leakage through the PDMS microfluidic channel wall to control the electrolyte flow inside the microfluidic channel and manipulate the particle motion inside the microfluidic channel. More specifically, we can trap individual particles at different locations inside the microfluidic channel by balancing the electroosmotic flow and the electrophoretic migration of the particle.

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The study presented here was carried out to obtain the actual solids flow rate by the combination of electrical resistance tomography and electromagnetic flow meter. A new in-situ measurement method based on measurements of the Electromagnetic Flow Meters (EFM) and Electrical Resistance Tomography (ERT) to study the flow rates of individual phases in a vertical flow was proposed. The study was based on laboratory experiments that were carried out with a 50 mm vertical flow rig for a number of sand concentrations and different mixture velocities. A range of sand slurries with median particle size from 212 mu m to 355 mu m was tested. The solid concentration by volume covered was 5% and 15%, and the corresponding density of 5% was 1078 kg/m(3) and of 15% was 1238 kg/m(3). The flow velocity was between 1.5 m/s and 3.0 m/s. A total of 6 experimental tests were conducted. The equivalent liquid model was adopted to validate in-situ volumetric solids fraction and calculate the slip velocity. The results show that the ERT technique can be used in conjunction with an electromagnetic flow meter as a way of measurement of slurry flow rate in a vertical pipe flow. However it should be emphasized that the EFM results must be treated with reservation when the flow pattern at the EFM mounting position is a non-homogenous flow. The flow rate obtained by the EFM should be corrected considering the slip velocity and the flow pattern.

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The calculation of settling speed of coarse particles is firstly addressed, with accelerated Stokesian dynamics without adjustable parameters, in which far field force acting on the particle instead of particle velocity is chosen as dependent variables to consider inter-particle hydrodynamic interactions. The sedimentation of a simple cubic array of spherical particles is simulated and compared to the results available to verify and validate the numerical code and computational scheme. The improvedmethod keeps the same computational cost of the order O(N log N) as usual accelerated Stokesian dynamics does. Then, more realistic random suspension sedimentation is investigated with the help ofMont Carlo method. The computational results agree well with experimental fitting. Finally, the sedimentation of finer cohesive particle, which is often observed in estuary environment, is presented as a further application in coastal engineering.

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Acceptor-doped ceria has been recognized as a promising intermediate temperature solid oxide fuel cell electrode/electrolyte material. For practical implementation of ceria as a fuel cell electrolyte and for designing model experiments for electrochemical activity, it is necessary to fabricate thin films of ceria. Here, metal-organic chemical vapor deposition was carried out in a homemade reactor to grow ceria films for further electrical, electrochemical, and optical characterization. Doped/undoped ceria films are grown on single crystalline oxide wafers with/without Pt line pattern or Pt solid layer. Deposition conditions were varied to see the effect on the resultant film property. Recently, proton conduction in nanograined polycrystalline pellets of ceria drew much interest. Thickness-mode (through-plane, z-direction) electrical measurements were made to confirm the existence of proton conductivity and investigate the nature of the conduction pathway: exposed grain surfaces and parallel grain boundaries. Columnar structure presumably favors proton conduction, and we have found measurable proton conductivity enhancement. Electrochemical property of gas-columnar ceria interface on the hydrogen electrooxidation is studied by AC impedance spectroscopy. Isothermal gas composition dependence of the electrode resistance was studied to elucidate Sm doping level effect and microstructure effect. Significantly, preferred orientation is shown to affect the gas dependence and performance of the fuel cell anode. A hypothesis is proposed to explain the origin of this behavior. Lastly, an optical transmittance based methodology was developed to obtain reference refractive index and microstructural parameters (thickness, roughness, porosity) of ceria films via subsequent fitting procedure.

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The lifetime of a plasma channel produced by self-guiding intense femtosecond laser pulses in air is largely prolonged by adding a high voltage electrical field in the plasma and by introducing a series of femtosecond laser pulses. An optimal lifetime value is realized through adjusting the delay among these laser pulses. The lifetime of a plasma channel is greatly enhanced to 350 ns by using four sequential intense 100fs( FWHM) laser pulses with an external electrical field of about 350kV/m, which proves the feasibility of prolonging the lifetime of plasma by adding an external electrical field and employing multiple laser pulses. (c) 2006 Optical Society of America.

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Technology scaling has enabled drastic growth in the computational and storage capacity of integrated circuits (ICs). This constant growth drives an increasing demand for high-bandwidth communication between and within ICs. In this dissertation we focus on low-power solutions that address this demand. We divide communication links into three subcategories depending on the communication distance. Each category has a different set of challenges and requirements and is affected by CMOS technology scaling in a different manner. We start with short-range chip-to-chip links for board-level communication. Next we will discuss board-to-board links, which demand a longer communication range. Finally on-chip links with communication ranges of a few millimeters are discussed.

Electrical signaling is a natural choice for chip-to-chip communication due to efficient integration and low cost. IO data rates have increased to the point where electrical signaling is now limited by the channel bandwidth. In order to achieve multi-Gb/s data rates, complex designs that equalize the channel are necessary. In addition, a high level of parallelism is central to sustaining bandwidth growth. Decision feedback equalization (DFE) is one of the most commonly employed techniques to overcome the limited bandwidth problem of the electrical channels. A linear and low-power summer is the central block of a DFE. Conventional approaches employ current-mode techniques to implement the summer, which require high power consumption. In order to achieve low-power operation we propose performing the summation in the charge domain. This approach enables a low-power and compact realization of the DFE as well as crosstalk cancellation. A prototype receiver was fabricated in 45nm SOI CMOS to validate the functionality of the proposed technique and was tested over channels with different levels of loss and coupling. Measurement results show that the receiver can equalize channels with maximum 21dB loss while consuming about 7.5mW from a 1.2V supply. We also introduce a compact, low-power transmitter employing passive equalization. The efficacy of the proposed technique is demonstrated through implementation of a prototype in 65nm CMOS. The design achieves up to 20Gb/s data rate while consuming less than 10mW.

An alternative to electrical signaling is to employ optical signaling for chip-to-chip interconnections, which offers low channel loss and cross-talk while providing high communication bandwidth. In this work we demonstrate the possibility of building compact and low-power optical receivers. A novel RC front-end is proposed that combines dynamic offset modulation and double-sampling techniques to eliminate the need for a short time constant at the input of the receiver. Unlike conventional designs, this receiver does not require a high-gain stage that runs at the data rate, making it suitable for low-power implementations. In addition, it allows time-division multiplexing to support very high data rates. A prototype was implemented in 65nm CMOS and achieved up to 24Gb/s with less than 0.4pJ/b power efficiency per channel. As the proposed design mainly employs digital blocks, it benefits greatly from technology scaling in terms of power and area saving.

As the technology scales, the number of transistors on the chip grows. This necessitates a corresponding increase in the bandwidth of the on-chip wires. In this dissertation, we take a close look at wire scaling and investigate its effect on wire performance metrics. We explore a novel on-chip communication link based on a double-sampling architecture and dynamic offset modulation technique that enables low power consumption and high data rates while achieving high bandwidth density in 28nm CMOS technology. The functionality of the link is demonstrated using different length minimum-pitch on-chip wires. Measurement results show that the link achieves up to 20Gb/s of data rate (12.5Gb/s/$\mu$m) with better than 136fJ/b of power efficiency.