982 resultados para wavelet packet decomposition


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A full hardware implementation of a Weighted Fair Queuing (WFQ) packet scheduler is proposed. The circuit architecture presented has been implemented using Altera Stratix II FPGA technology, utilizing RLDII and QDRII memory components. The circuit can provide fine granularity Quality of Service (QoS) support at a line throughput rate of 12.8Gb/s in its current implementation. The authors suggest that, due to the flexible and scalable modular circuit design approach used, the current circuit architecture can be targeted for a full ASIC implementation to deliver 50 Gb/s throughput. The circuit itself comprises three main components; a WFQ algorithm computation circuit, a tag/time-stamp sort and retrieval circuit, and a high throughput shared buffer. The circuit targets the support of emerging wireline and wireless network nodes that focus on Service Level Agreements (SLA's) and Quality of Experience.

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The Temporal Analysis of Products (TAP) technique has been used to investigate the mechanism involved in the catalytic decomposition of NH3 over a series of catalysts consisting of activated carbon supported Ru (promoted and non-promoted with Na) and over an activated carbon supported Ir. An extensive study of the role played by both the support and the promoter in the

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Ruthenium red, a di-mu-oxo-bridged ruthenium complex, and its oxidised form, ruthenium brown, have been studied as possible homogeneous redox catalysts for the oxidation of water to O2 by Ce(IV) ions in H2SO4 and HCIO4. In both media the Ce(IV) ions oxidised the ruthenium red to brown and, with excess of Ce(IV), decomposed the ruthenium brown irreversibly to product(s) with three weak absorption bands at 390, 523 and 593 nm. Only in HCIO4 did the decomposition product(s) appear to act as a stable O2 catalyst. Spectral evidence tentatively suggests that the active catalyst may be a hydrolysed Ru(IV) polymeric species. The rate of catalysis was proportional to the initial concentration of ruthenium red/brown and the activation energy was determined as 36 +/- 1 kJ mol-1 over the temperature range ambient to ca. 50-degrees-C. At temperatures greater than 50-degrees-C the O2 catalyst undergoes an irreversible thermal decomposition reaction.

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Laser plasma interferograms are currently analyzed by extraction of the phase-shift map with fast Fourier transform (FFT) techniques [Appl. Opt. 18, 3101 (1985)]. This methodology works well when interferograms are only marginally affected by noise and reduction of fringe visibility, but it can fail to produce accurate phase-shift maps when low-quality images are dealt with. We present a novel procedure for a phase-shift map computation that makes extensive use of the ridge extraction in the continuous wavelet transform (CWT) framework. The CWT tool is flexible because of the wide adaptability of the analyzing basis, and it can be accurate because of the intrinsic noise reduction in the ridge extraction. A comparative analysis of the accuracy performances of them new tool and the FFT-based one shows that the CWT-based tool produces phase maps considerably less noisy and that it can better resolve local inhomogeneties. (C) 2001 Optical Society of America.

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This paper presents a lookup circuit with advanced memory techniques and algorithms that examines network packet headers at high throughput rates. Hardware solutions and test scenarios are introduced to evaluate the proposed approach. The experimental results show that the proposed lookup circuit is able to achieve at least 39 million packet header lookups per second, which facilitates the application of next-generation stateful packet classifications at beyond 20Gbps internet traffic throughput rates.

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Accurate determination of shear wave arrival time using bender elements may be severely affected by a combination of near-field effects and reflected waves. These may mask the first arrival of the shear wave, making its detection difficult in the time domain. This paper describes an approach for measuring the shear wave arrival time through analysis of the output signal in the time-scale domain using a multi-scale wavelet transform. The local maxima lines of the wavelet transform modulus are observed at different scales, and all singularities are mathematically characterised, allowing subsequent detection of the singularity relating to the first arrival. Examples of the use of this approach on typical synthetic and experimental bender element signals are also supplied, and these results are compared with those from other time and frequency domain approaches. The wavelet approach is not affected by near-field effects, but instead is characterised by a relatively consistent singularity related to the shear wave arrival time, across a range of frequencies and noise levels.

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Previous research based on theoretical simulations has shown the potential of the wavelet transform to detect damage in a beam by analysing the time-deflection response due to a constant moving load. However, its application to identify damage from the response of a bridge to a vehicle raises a number of questions. Firstly, it may be difficult to record the difference in the deflection signal between a healthy and a slightly damaged structure to the required level of accuracy and high scanning frequencies in the field. Secondly, the bridge is going to have a road profile and it will be loaded by a sprung vehicle and time-varying forces rather than a constant load. Therefore, an algorithm based on a plot of wavelet coefficients versus time to detect damage (a singularity in the plot) appears to be very sensitive to noise. This paper addresses these questions by: (a) using the acceleration signal, instead of the deflection signal, (b) employing a vehicle-bridge finite element interaction model, and (c) developing a novel wavelet-based approach using wavelet energy content at each bridge section which proves to be more sensitive to damage than a wavelet coefficient line plot at a given scale as employed by others.

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In this paper, a novel approach to automatically sub-divide a complex geometry and apply an efficient mesh is presented. Following the identification and removal of thin-sheet regions from an arbitrary solid using the thick/thin decomposition approach developed by Robinson et al. [1], the technique here employs shape metrics generated using local sizing measures to identify long-slender regions within the thick body. A series of algorithms automatically partition the thick region into a non-manifold assembly of long-slender and complex sub-regions. A structured anisotropic mesh is applied to the thin-sheet and long-slender bodies, and the remaining complex bodies are filled with unstructured isotropic tetrahedra. The resulting semi-structured mesh possesses significantly fewer degrees of freedom than the equivalent unstructured mesh, demonstrating the effectiveness of the approach. The accuracy of the efficient meshes generated for a complex geometry is verified via a study that compares the results of a modal analysis with the results of an equivalent analysis on a dense tetrahedral mesh.

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The inclusion of the Discrete Wavelet Transform in the JPEG-2000 standard has added impetus to the research of hardware architectures for the two-dimensional wavelet transform. In this paper, a VLSI architecture for performing the symmetrically extended two-dimensional transform is presented. This architecture conforms to the JPEG-2000 standard and is capable of near-optimal performance when dealing with the image boundaries. The architecture also achieves efficient processor utilization. Implementation results based on a Xilinx Virtex-2 FPGA device are included.

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A methodology has been developed which allows a non-specialist to rapidly design silicon wavelet transform cores for a variety of specifications. The cores include both forward and inverse orthonormal wavelet transforms. This methodology is based on efficient, modular and scaleable architectures utilising time-interleaved coefficients for the wavelet transform filters. The cores are parameterized in terms of wavelet type and data and coefficient word lengths. The designs have been captured in VHDL and are hence portable across a range of silicon foundries as well as FPGA and PLD implementations.