Nanostructured Metal Oxide Coatings for Electrochemical Energy Conversion and Storage Electrodes

The realization of an energy future based on safe, clean, sustainable, and economically viable technologies is one of the grand challenges facing modern society. Electrochemical energy technologies underpin the potential success of this effort to divert energy sources away from fossil fuels, whether one considers alternative energy conversion strategies through photoelectrochemical (PEC) production of chemical fuels or fuel cells run with sustainable hydrogen, or energy storage strategies, such as in batteries and supercapacitors. This dissertation builds on recent advances in nanomaterials design, synthesis, and characterization to develop novel electrodes that can electrochemically convert and store energy.

Chapter 2 of this dissertation focuses on refining the properties of TiO2-based PEC water-splitting photoanodes used for the direct electrochemical conversion of solar energy into hydrogen fuel. The approach utilized atomic layer deposition (ALD); a growth process uniquely suited for the conformal and uniform deposition of thin films with angstrom-level thickness precision. ALD’s thickness control enabled a better understanding of how the effects of nitrogen doping via NH3 annealing treatments, used to reduce TiO2’s bandgap, can have a strong dependence on TiO2’s thickness and crystalline quality. In addition, it was found that some of the negative effects on the PEC performance typically associated with N-doped TiO2 could be mitigated if the NH3-annealing was directly preceded by an air-annealing step, especially for ultrathin (i.e., < 10 nm) TiO2 films. ALD was also used to conformally coat an ultraporous conductive fluorine-doped tin oxide nanoparticle (nanoFTO) scaffold with an ultrathin layer of TiO2. The integration of these ultrathin films and the oxide nanoparticles resulted in a heteronanostructure design with excellent PEC water oxidation photocurrents (0.7 mA/cm2 at 0 V vs. Ag/AgCl) and charge transfer efficiency.

In Chapter 3, two innovative nanoarchitectures were engineered in order to enhance the pseudocapacitive energy storage of next generation supercapacitor electrodes. The morphology and quantity of MnO2 electrodeposits was controlled by adjusting the density of graphene foliates on a novel graphenated carbon nanotube (g-CNT) scaffold. This control enabled the nanocomposite supercapacitor electrode to reach a capacitance of 640 F/g, under MnO2 specific mass loading conditions (2.3 mg/cm2) that are higher than previously reported. In the second engineered nanoarchitecture, the electrochemical energy storage properties of a transparent electrode based on a network of solution-processed Cu/Ni cores/shell nanowires (NWs) were activated by electrochemically converting the Ni metal shell into Ni(OH)2. Furthermore, an adjustment of the molar percentage of Ni plated onto the Cu NWs was found to result in a tradeoff between capacitance, transmittance, and stability of the resulting nickel hydroxide-based electrode. The nominal area capacitance and power performance results obtained for this Cu/Ni(OH)2 transparent electrode demonstrates that it has significant potential as a hybrid supercapacitor electrode for integration into cutting edge flexible and transparent electronic devices.

Growth, Characterization, and Properties of Hybrid Graphene-Carbon Nanotube Films and Related Carbon Nanostructures

Graphene, first isolated in 2004 and the subject of the 2010 Nobel Prize in physics, has generated a tremendous amount of research interest in recent years due to its incredible mechanical and electrical properties. However, difficulties in large-scale production and low as-prepared surface area have hindered commercial applications. In this dissertation, a new material is described incorporating the superior electrical properties of graphene edge planes into the high surface area framework of carbon nanotube forests using a scalable and reproducible technology.

The objectives of this research were to investigate the growth parameters and mechanisms of a graphene-carbon nanotube hybrid nanomaterial termed “graphenated carbon nanotubes” (g-CNTs), examine the applicability of g-CNT materials for applications in electrochemical capacitors (supercapacitors) and cold-cathode field emission sources, and determine materials characteristics responsible for the superior performance of g-CNTs in these applications. The growth kinetics of multi-walled carbon nanotubes (MWNTs), grown by plasma-enhanced chemical vapor deposition (PECVD), was studied in order to understand the fundamental mechanisms governing the PECVD reaction process. Activation energies and diffusivities were determined for key reaction steps and a growth model was developed in response to these findings. Differences in the reaction kinetics between CNTs grown on single-crystal silicon and polysilicon were studied to aid in the incorporation of CNTs into microelectromechanical systems (MEMS) devices. To understand processing-property relationships for g-CNT materials, a Design of Experiments (DOE) analysis was performed for the purpose of determining the importance of various input parameters on the growth of g-CNTs, finding that varying temperature alone allows the resultant material to transition from CNTs to g-CNTs and finally carbon nanosheets (CNSs): vertically oriented sheets of few-layered graphene. In addition, a phenomenological model was developed for g-CNTs. By studying variations of graphene-CNT hybrid nanomaterials by Raman spectroscopy, a linear trend was discovered between their mean crystallite size and electrochemical capacitance. Finally, a new method for the calculation of nanomaterial surface area, more accurate than the standard BET technique, was created based on atomic layer deposition (ALD) of titanium oxide (TiO2).

Investigation of electrically active defects at the interface of high-k dielectrics and compound semiconductors

As silicon based devices in integrated circuits reach the fundamental limits of dimensional scaling there is growing research interest in the use of high electron mobility channel materials, such as indium gallium arsenide (InGaAs), in conjunction with high dielectric constant (high-k) gate oxides, for Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) based devices. The motivation for employing high mobility channel materials is to reduce power dissipation in integrated circuits while also providing improved performance. One of the primary challenges to date in the field of III-V semiconductors has been the observation of high levels of defect densities at the high-k/III-V interface, which prevents surface inversion of the semiconductor. The work presented in this PhD thesis details the characterization of MOS devices incorporating high-k dielectrics on III-V semiconductors. The analysis examines the effect of modifying the semiconductor bandgap in MOS structures incorporating InxGa1-xAs (x: 0, 0.15. 0.3, 0.53) layers, the optimization of device passivation procedures designed to reduce interface defect densities, and analysis of such electrically active interface defect states for the high-k/InGaAs system. Devices are characterized primarily through capacitance-voltage (CV) and conductance-voltage (GV) measurements of MOS structures both as a function of frequency and temperature. In particular, the density of electrically active interface states was reduced to the level which allowed the observation of true surface inversion behavior in the In0.53Ga0.47As MOS system. This was achieved by developing an optimized (NH4)2S passivation, minimized air exposure, and atomic layer deposition of an Al2O3 gate oxide. An extraction of activation energies allows discrimination of the mechanisms responsible for the inversion response. Finally a new approach is described to determine the minority carrier generation lifetime and the oxide capacitance in MOS structures. The method is demonstrated for an In0.53Ga0.47As system, but is generally applicable to any MOS structure exhibiting a minority carrier response in inversion.

Supercapattery based on binder-free Co3 (PO4)2·8H2O multilayer nano/microflakes on nickel foam

A binder-free cobalt phosphate hydrate (Co3(PO4)2·8H2O) multilayer nano/microflake structure is synthesized on nickel foam (NF) via a facile hydrothermal process. Four different concentrations (2.5, 5, 10, and 20 mM) of Co2+ and PO4–3 were used to obtain different mass loading of cobalt phosphate on the nickel foam. The Co3(PO4)2·8H2O modified NF electrode (2.5 mM) shows a maximum specific capacity of 868.3 C g–1 (capacitance of 1578.7 F g–1) at a current density of 5 mA cm–2 and remains as high as 566.3 C g–1 (1029.5 F g–1) at 50 mA cm–2 in 1 M NaOH. A supercapattery assembled using Co3(PO4)2·8H2O/NF as the positive electrode and activated carbon/NF as the negative electrode delivers a gravimetric capacitance of 111.2 F g–1 (volumetric capacitance of 4.44 F cm–3). Furthermore, the device offers a high specific energy of 29.29 Wh kg–1 (energy density of 1.17 mWh cm–3) and a specific power of 4687 W kg–1 (power density of 187.5 mW cm–3).

Review and analysis of solar thermal facades

Harnessing solar energy to provide for the thermal needs of buildings is one of the most promising solutions to the global energy issue. Exploiting the additional surface area provided by the building’s façade can significantly increase the solar energy output. Developing a range of integrated and adaptable products that do not significantly affect the building’s aesthetics is vital to enabling the building integrated solar thermal market to expand and prosper. This work reviews and evaluates solar thermal facades in terms of the standard collector type, which they are based on, and their component make-up. Daily efficiency models are presented, based on a combination of the Hottel Whillier Bliss model and finite element simulation. Novel and market available solar thermal systems are also reviewed and evaluated using standard evaluation methods, based on experimentally determined parameters ISO 9806. Solar thermal collectors integrated directly into the facade benefit from the additional wall insulation at the back; displaying higher efficiencies then an identical collector offset from the facade. Unglazed solar thermal facades with high capacitance absorbers (e.g. concrete) experience a shift in peak maximum energy yield and display a lower sensitivity to ambient conditions than the traditional metallic based unglazed collectors. Glazed solar thermal facades, used for high temperature applications (domestic hot water), result in overheating of the building’s interior which can be reduced significantly through the inclusion of high quality wall insulation. For low temperature applications (preheating systems), the cheaper unglazed systems offer the most economic solution. The inclusion of brighter colour for the glazing and darker colour for the absorber shows the lowest efficiency reductions (<4%). Novel solar thermal façade solutions include solar collectors integrated into balcony rails, shading devices, louvers, windows or gutters.

Multiscale Analysis for Field-Effect Penetration through Two-Dimensional Materials

Gate-tunable two-dimensional (2D) materials-based quantum capacitors (QCs) and van der Waals heterostructures involve tuning transport or optoelectronic characteristics by the field effect. Recent studies have attributed the observed gate-tunable characteristics to the change of the Fermi level in the first 2D layer adjacent to the dielectrics, whereas the penetration of the field effect through the one-molecule-thick material is often ignored or oversimplified. Here, we present a multiscale theoretical approach that combines first-principles electronic structure calculations and the Poisson–Boltzmann equation methods to model penetration of the field effect through graphene in a metal–oxide–graphene–semiconductor (MOGS) QC, including quantifying the degree of “transparency” for graphene two-dimensional electron gas (2DEG) to an electric displacement field. We find that the space charge density in the semiconductor layer can be modulated by gating in a nonlinear manner, forming an accumulation or inversion layer at the semiconductor/graphene interface. The degree of transparency is determined by the combined effect of graphene quantum capacitance and the semiconductor capacitance, which allows us to predict the ranking for a variety of monolayer 2D materials according to their transparency to an electric displacement field as follows: graphene > silicene > germanene > WS2 > WTe2 > WSe2 > MoS2 > phosphorene > MoSe2 > MoTe2, when the majority carrier is electron. Our findings reveal a general picture of operation modes and design rules for the 2D-materials-based QCs.

Binary Mixtures of 1-Butyl-1-Methylpyrrolidinium Bis{(trifluoromethyl)Sulfonyl}Imide and Aliphatic Nitrile Solvents As Electrolyte for Electrochemical Double Layer Capacitors (Invited).

Electrochemical double layer capacitors (EDLCs), also known as supercapacitors, are promising energy storage devices, especially when considering high power applications [1]. EDLCs can be charged and discharged within seconds [1], feature high power (10 kW·kg-1) and an excellent cycle life (>500,000 cycles). All these properties are a result of the energy storage process of EDLCs, which relies on storing energy by charge separation instead of chemical redox reactions, as utilized in battery systems. Upon charging, double layers are forming at the electrode/electrolyte interface consisting of the electrolyte’s ions and electric charges at the electrode surface.In state-of-the-art EDLC systems activated carbons (AC) are used as active materials and tetraethylammonium tetrafluoroborate ([Et4N][BF4]) dissolved in organic solvents like propylene carbonate (PC) or acetonitrile (ACN) are commonly used as the electrolyte [2]. These combinations of materials allow operative voltages up to 2.7 V - 2.8 V and an energy in the order of 5 Wh·kg-1[3]. The energy of EDLCs is dependent on the square of the operative voltage, thus increasing the usable operative voltage has a strong effect on the delivered energy of the device [1]. Due to their high electrochemical stability, ionic liquids (ILs) were thoroughly investigated as electrolytes for EDLCs, as well as, batteries, enabling high operating voltages as high as 3.2 V - 3.5 V for the former [2]. While their unique ionic structure allows the usage of neat ILs as electrolyte in EDLCs, ILs suffer from low conductivity and high viscosity increasing the intrinsic resistance and, as a result, a lower power output of the device. In order to overcome this issue, the usage of blends of ionic liquids and organic solvents has been considered a feasible strategy as they combine high usable voltages, while still retaining good transport properties at the same time.In our recent work the ionic liquid 1-butyl-1-methylpyrrolidinium bis{(trifluoromethyl)sulfonyl}imide ([Pyrr14][TFSI]) was combined with two nitrile-based organic solvents, namely butyronitrile (BTN) and adiponitrile (ADN), and the resulting blends were investing regarding their usage in electrochemical double layer capacitors [4,5]. Firstly, the physicochemical properties were investigated, showing good transport properties for both blends, which are similar to the state-of-the-art combination of [Et4N][BF4] in PC. Secondly, the electrochemical properties for EDLC application were studied in depth revealing a high electrochemical stability with a maximum operative voltage as high as 3.7 V. In full cells these high voltage organic solvent based electrolytes have a good performance in terms of capacitance and an acceptable equivalent series resistance at cut-off voltages of 3.2 and 3.5 V. However, long term stability tests by float testing revealed stability issues when using a maximum voltage of 3.5 V for prolonged time, whereas at 3.2 V no such issues are observed (Fig. 1).Considering the obtained results, the usage of ADN and BTN blends with [Pyrr14][TFSI] in EDLCs appears to be an interesting alternative to state-of-the-art organic solvent based electrolytes, allowing the usage of higher maximum operative voltages while having similar transport properties to 1 mol∙dm-3 [Et4N][BF4] in PC at the same time.

Electric Field Effects on Graphene Materials

Understanding the effect of electric fields on the physical and chemical properties of two-dimensional (2D) nanostructures is instrumental in the design of novel electronic and optoelectronic devices. Several of those properties are characterized in terms of the dielectric constant which play an important role on capacitance, conductivity, screening, dielectric losses and refractive index. Here we review our recent theoretical studies using density functional calculations including van der Waals interactions on two types of layered materials of similar two-dimensional molecular geometry but remarkably different electronic structures, that is, graphene and molybdenum disulphide (MoS2). We focus on such two-dimensional crystals because of they complementary physical and chemical properties, and the appealing interest to incorporate them in the next generation of electronic and optoelectronic devices. We predict that the effective dielectric constant (ε) of few-layer graphene and MoS2 is tunable by external electric fields (E ext). We show that at low fields (E ext < 0.01 V/Å) ε assumes a nearly constant value ∼4 for both materials, but increases at higher fields to values that depend on the layer thickness. The thicker the structure the stronger is the modulation of ε with the electric field. Increasing of the external field perpendicular to the layer surface above a critical value can drive the systems to an unstable state where the layers are weakly coupled and can be easily separated. The observed dependence of ε on the external field is due to charge polarization driven by the bias, which show several similar characteristics despite of the layer considered. All these results provide key information about control and understanding of the screening properties in two-dimensional crystals beyond graphene and MoS2

A III-V channel field effect transistor for non-classical CMOS: process optimisation for improved gate stack function

This thesis describes a collection of studies into the electrical response of a III-V MOS stack comprising metal/GaGdO/GaAs layers as a function of fabrication process variables and the findings of those studies. As a result of this work, areas of improvement in the gate process module of a III-V heterostructure MOSFET were identified. Compared to traditional bulk silicon MOSFET design, one featuring a III-V channel heterostructure with a high-dielectric-constant oxide as the gate insulator provides numerous benefits, for example: the insulator can be made thicker for the same capacitance, the operating voltage can be made lower for the same current output, and improved output characteristics can be achieved without reducing the channel length further. It is known that transistors composed of III-V materials are most susceptible to damage induced by radiation and plasma processing. These devices utilise sub-10 nm gate dielectric films, which are prone to contamination, degradation and damage. Therefore, throughout the course of this work, process damage and contamination issues, as well as various techniques to mitigate or prevent those have been investigated through comparative studies of III-V MOS capacitors and transistors comprising various forms of metal gates, various thicknesses of GaGdO dielectric, and a number of GaAs-based semiconductor layer structures. Transistors which were fabricated before this work commenced, showed problems with threshold voltage control. Specifically, MOSFETs designed for normally-off (VTH > 0) operation exhibited below-zero threshold voltages. With the results obtained during this work, it was possible to gain an understanding of why the transistor threshold voltage shifts as the gate length decreases and of what pulls the threshold voltage downwards preventing normally-off device operation. Two main culprits for the negative VTH shift were found. The first was radiation damage induced by the gate metal deposition process, which can be prevented by slowing down the deposition rate. The second was the layer of gold added on top of platinum in the gate metal stack which reduces the effective work function of the whole gate due to its electronegativity properties. Since the device was designed for a platinum-only gate, this could explain the below zero VTH. This could be prevented either by using a platinum-only gate, or by matching the layer structure design and the actual gate metal used for the future devices. Post-metallisation thermal anneal was shown to mitigate both these effects. However, if post-metallisation annealing is used, care should be taken to ensure it is performed before the ohmic contacts are formed as the thermal treatment was shown to degrade the source/drain contacts. In addition, the programme of studies this thesis describes, also found that if the gate contact is deposited before the source/drain contacts, it causes a shift in threshold voltage towards negative values as the gate length decreases, because the ohmic contact anneal process affects the properties of the underlying material differently depending on whether it is covered with the gate metal or not. In terms of surface contamination; this work found that it causes device-to-device parameter variation, and a plasma clean is therefore essential. This work also demonstrated that the parasitic capacitances in the system, namely the contact periphery dependent gate-ohmic capacitance, plays a significant role in the total gate capacitance. This is true to such an extent that reducing the distance between the gate and the source/drain ohmic contacts in the device would help with shifting the threshold voltages closely towards the designed values. The findings made available by the collection of experiments performed for this work have two major applications. Firstly, these findings provide useful data in the study of the possible phenomena taking place inside the metal/GaGdO/GaAs layers and interfaces as the result of chemical processes applied to it. In addition, these findings allow recommendations as to how to best approach fabrication of devices utilising these layers.

The Effect of Package Geometry on Moisture Driven Degradation of Polymer Aluminum Capacitors

Polymer aluminum electrolytic capacitors were introduced to provide an alternative to liquid electrolytic capacitors. Polymer electrolytic capacitor electric parameters of capacitance and ESR are less temperature dependent than those of liquid aluminum electrolytic capacitors. Furthermore, the electrical conductivity of the polymer used in these capacitors (poly-3,4ethylenedioxithiophene) is orders of magnitude higher than the electrolytes used in liquid aluminum electrolytic capacitors, resulting in capacitors with much lower equivalent series resistance which are suitable for use in high ripple-current applications. The presence of the moisture-sensitive polymer PEDOT introduces concerns on the reliability of polymer aluminum capacitors in high humidity conditions. Highly accelerated stress testing (or HAST) (110ºC, 85% relative humidity) of polymer aluminum capacitors in which the parts were subjected to unbiased HAST conditions for 700 hours was done to understand the design factors that contribute to the susceptibility to degradation of a polymer aluminum electrolytic capacitor exposed to HAST conditions. A large scale study involving capacitors of different electrical ratings (2.5V – 16V, 100µF – 470 µF), mounting types (surface-mount and through-hole) and manufacturers (6 different manufacturers) was done to determine a relationship between package geometry and reliability in high temperature-humidity conditions. A Geometry-Based HAST test in which the part selection limited variations between capacitor samples to geometric differences only was done to analyze the effect of package geometry on humidity-driven degradation more closely. Raman spectroscopy, x-ray imaging, environmental scanning electron microscopy, and destructive analysis of the capacitors after HAST exposure was done to determine the failure mechanisms of polymer aluminum capacitors under high temperature-humidity conditions.

Simulation tools for the analysis of single electronic systems

Developments in theory and experiment have raised the prospect of an electronic technology based on the discrete nature of electron tunnelling through a potential barrier. This thesis deals with novel design and analysis tools developed to study such systems. Possible devices include those constructed from ultrasmall normal tunnelling junctions. These exhibit charging effects including the Coulomb blockade and correlated electron tunnelling. They allow transistor-like control of the transfer of single carriers, and present the prospect of digital systems operating at the information theoretic limit. As such, they are often referred to as single electronic devices. Single electronic devices exhibit self quantising logic and good structural tolerance. Their speed, immunity to thermal noise, and operating voltage all scale beneficially with junction capacitance. For ultrasmall junctions the possibility of room temperature operation at sub picosecond timescales seems feasible. However, they are sensitive to external charge; whether from trapping-detrapping events, externally gated potentials, or system cross-talk. Quantum effects such as charge macroscopic quantum tunnelling may degrade performance. Finally, any practical system will be complex and spatially extended (amplifying the above problems), and prone to fabrication imperfection. This summarises why new design and analysis tools are required. Simulation tools are developed, concentrating on the basic building blocks of single electronic systems; the tunnelling junction array and gated turnstile device. Three main points are considered: the best method of estimating capacitance values from physical system geometry; the mathematical model which should represent electron tunnelling based on this data; application of this model to the investigation of single electronic systems. (DXN004909)

Resistance of an epoxy coating with an organic inhibitor to cathodic disbondment in sea water

In this study, the effect of anti-corrosion inhibitor addition to epoxy coating, on the disbanding rate was evaluated. First to determination of mechanism, the bare steel substrates were immersed in the 3.5% NaCl solution and the solution containing 1 mM anti corrosion. The Electrochemical Impedance Spectroscopy was performed after 5 and 24 hour. The results indicated a lower corrosion rate in the presence of inhibitor. During the time, charge transfer resistance, was decreased for the substrates immersed in NaCl solution, and increased for the substrates immersed in NaCl solution containing 1 mM anti corrosion. This result can be related to more stability of corrosion products in presence of anti-corrosion and film formation. The coated substrates, with four different concentration of anticorrosion in coating, were protected under -1.2 voltage in the 3.5% NaCl solution. After 12 and 24 hour, the EIS test and disbanding area measurement, were evaluate. The lower disbanding rate, more charge transfer resistance and less double layer capacitance for the coating containing 0.75w% inhibitor, were observed. The result of Pull-off test after 1 day immersion in 3.5% NaCl solution, showed more wet adhesion for the coating containing 0.75w% inhibitor. The images of FE-SEM electron microscope and surface analyses EDX on the coated substrate after disbanding and the bare substrate immersed in 3.5w% NaCl containing 1 mM inhibitor, were proved the formation of stabilized film.

Zastosowanie modelu hantli w badaniach właściwości fizykochemicznych i strukturalnych układów homo- i heterogenicznych metodą Monte Carlo

Wydział Chemii

Estudo e desenvolvimento de um capacitor eletrolítico de nióbio

It seeks to find an alternative to the current tantalum electrolytic capacitors in the market due to its high cost. Niobium is a potential substitute, since both belong to the same group of the periodic table and because of this have many similar physical and chemical properties. Niobium has several technologically important applications, and Brazil has the largest reserves, around 96%. There are including niobium in reserves of tantalite and columbite in Rio Grande do Norte. These electrolytic capacitors have high capacitance specifies, ie they can store high energy in small volumes compared to other types of capacitors. This is the main attraction of this type of capacitor because is growing demand in the production of capacitors with capacitance specifies increasingly high, this because of the miniaturization of various devices such as GPS devices, televisions, computers, phones and many others. The production route of the capacitor was made by powder metallurgy. The initial niobium powder supplied by EEL-USP was first characterized by XRD, SEM, XRF and laser particle size, to then be sieved into three particle size, 200, 400 e 635mesh. The powders were then compacted and sintered at 1350, 1450 and 1550°C using two sintering time 30 and 60min. Sintering is one of the most important parts of the process as it affects properties as porosity and surface cleaning of the samples, which greatly affected the quality of the capacitor. The sintered samples then underwent a process of anodic oxidation, which created a thin film of niobium pentóxido over the whole porous surface of the sample, this film is the dielectric capacitor. The oxidation process variables influence the performance of the film and therefore the capacitor. The samples were characterized by electrical measurements of capacitance, loss factor, ESR, relative density, porosity and surface area. After the characterizations was made an annealing in air ate 260ºC for 60min. After this treatment were made again the electrical measurements. The particle size of powders and sintering affected the porosity and in turn the specific area of the samples. The larger de area of the capacitor, greater is the capacitance. The powder showed the highest capacitance was with the smallest particle size. Higher temperatures and times of sintering caused samples with smaller surface area, but on the other hand the cleaning surface impurities was higher for this cases. So a balance must be made between the gain that is achieved with the cleaning of impurities and the loss with the decreased in specific area. The best results were obtained for the temperature of 1450ºC/60min. The influence of annealing on the loss factor and ESR did not follow a well-defined pattern, because their values increased in some cases and decreased in others. The most interesting results due to heat treatment were with respect to capacitance, which showed an increase for all samples after treatment

DLTS investigation of acceptor states in P3MeT Schottky barrier diodes

Deep Level Transient Spectroscopy (DLTS) has been used to investigate hole traps in the depletion region of Schottky barrier diodes formed from electropolymerised poly(3-methylthiophene). The capacitance transients appear to be composed of a fast and a slow component. Analysis of the slower component using the ''rate window'' technique yields isochronal differential capacitance curves that depend on temperature in the manner predicted by theory.