Gesture Recognition Using Neural Networks Based on HW/SW Cosimulation Platform

Hardware/software (HW/SW) cosimulation integrates software simulation and hardware simulation simultaneously. Usually, HW/SW co-simulation platform is used to ease debugging and verification for very large-scale integration (VLSI) design. To accelerate the computation of the gesture recognition technique, an HW/SW implementation using field programmable gate array (FPGA) technology is presented in this paper. The major contributions of this work are: (1) a novel design of memory controller in the Verilog Hardware Description Language (Verilog HDL) to reduce memory consumption and load on the processor. (2) The testing part of the neural network algorithm is being hardwired to improve the speed and performance. The American Sign Language gesture recognition is chosen to verify the performance of the approach. Several experiments were carried out on four databases of the gestures (alphabet signs A to Z). (3) The major benefit of this design is that it takes only few milliseconds to recognize the hand gesture which makes it computationally more efficient.

Biohazard neutralization based on lipid technology

A rapid detection and neutralization method for biowarfare agents would be a great biodefense in war times. With this purpose, liposomes were developed following the lipid film formation, rehydration, and extrusion procedure as the production method. MgOCl2 was encapsulated in the liposomes and it was tested with three different bacterium B. cereus; B. thuringiensis; and B. subtilis. For specificity, the liposomes were modified with a polyclonal antibody against B. cereus and B. subtilis. The liposomes were characterized using a Malvern Zetasizer Instrument, and the study revealed stability of the liposomes stored at 4°C for a period of 15 days. A live/dead assay revealed a significant reduction of bacterium incubated with MgOCl2-liposomes. Smaller reduction percentages, but yet significant, were observed with the MgOCl2-immunoliposomes. A colony growth assay revealed a significant reduction percentage for empty liposomes, MgOCl2-liposomes, and MgOCl2-immunoliposomes incubated with B. thuringiensis.

The impact of standards-based practices in mathematics on the achievement of low-performing students

This study examined standards-based mathematics reform initiatives to determine if they would improve student achievement on the part of low-performing students. New curricula, the Carnegie Learning Cognitive Tutor®, were provided for algebra and geometry students. The new instructional strategy relied on both the teacher-led instruction and the use of computers to differentiate instruction for individual students. Mathematics teachers received ongoing professional development to help them implement the new curricula. In addition, teachers were provided with ongoing support to assist them with the transformation of the learning environments for students using standards-based practices. This quasi-experimental (nonrandomized) study involved teachers in two matched urban high schools. Analyses (ANCOVAs) revealed that the experimental group with an appropriately implemented program had significantly higher learning gains than the comparison group as determined by the students' 2007 mathematics Developmental Scale Score (DSS). In addition, the experimental group's adjusted mean for the second interim mathematics assessment was significantly higher than the comparison group's mean. The findings support the idea that if the traditional curriculum is replaced with standards-based curriculum, and the curriculum is implemented as intended, low-performing students may make significant learning gains. With respect to the teaching practices as observed with the Classroom Observation Protocol (COP), t-tests were conducted on four constructs. The results for both the algebra and geometry teachers on the constructs were not significant. The COP indicated that teachers in both the experimental and comparison groups used traditional instruction strategies in their classrooms. The analyses of covariance (ANCOVA) on the use of technology revealed no significant main effects for computer use.

Knowledge sources, innovative activity and the performance of UK new technology based firms

We present an innovation value chain analysis for a representative sample of new technology based firms (NTBFs) in the UK. This involves determining which factors lead to the usage of different knowledge sources and the relationships that exist between those sources of knowledge; the effect that each knowledge source has on innovative activity; and how innovation outputs affect the performance of NTBFs. We find that internal (i.e. R&D) and external knowledge sources are complementary for NTBFs, and that supply chain linkages have both a direct and indirect effect on innovation. NTBFs' skill resources matter throughout the innovation value chain, being positively associated with external knowledge linkages and innovation success, and also having a direct effect on growth independent of the effect on innovation. ©2010 IEEE.

Knowledge sources, innovative activity and the performance of UK new technology based firms

We present an innovation value chain analysis for a representative sample of new technology based firms (NTBFs) in the UK. This involves determining which factors lead to the usage of different knowledge sources and the relationships that exist between those sources of knowledge; the effect that each knowledge source has on innovative activity; and how innovation outputs affect the performance of NTBFs. We find that internal (i.e. R&D) and external knowledge sources are complementary for NTBFs, and that supply chain linkages have both a direct and indirect effect on innovation. NTBFs' skill resources matter throughout the innovation value chain, being positively associated with external knowledge linkages and innovation success, and also having a direct effect on growth independent of the effect on innovation. ©2010 IEEE.

Testing of Interposer-Based 2.5D Integrated Circuits

The unprecedented and relentless growth in the electronics industry is feeding the demand for integrated circuits (ICs) with increasing functionality and performance at minimum cost and power consumption. As predicted by Moore's law, ICs are being aggressively scaled to meet this demand. While the continuous scaling of process technology is reducing gate delays, the performance of ICs is being increasingly dominated by interconnect delays. In an effort to improve submicrometer interconnect performance, to increase packing density, and to reduce chip area and power consumption, the semiconductor industry is focusing on three-dimensional (3D) integration. However, volume production and commercial exploitation of 3D integration are not feasible yet due to significant technical hurdles.

At the present time, interposer-based 2.5D integration is emerging as a precursor to stacked 3D integration. All the dies and the interposer in a 2.5D IC must be adequately tested for product qualification. However, since the structure of 2.5D ICs is different from the traditional 2D ICs, new challenges have emerged: (1) pre-bond interposer testing, (2) lack of test access, (3) limited ability for at-speed testing, (4) high density I/O ports and interconnects, (5) reduced number of test pins, and (6) high power consumption. This research targets the above challenges and effective solutions have been developed to test both dies and the interposer.

The dissertation first introduces the basic concepts of 3D ICs and 2.5D ICs. Prior work on testing of 2.5D ICs is studied. An efficient method is presented to locate defects in a passive interposer before stacking. The proposed test architecture uses e-fuses that can be programmed to connect or disconnect functional paths inside the interposer. The concept of a die footprint is utilized for interconnect testing, and the overall assembly and test flow is described. Moreover, the concept of weighted critical area is defined and utilized to reduce test time. In order to fully determine the location of each e-fuse and the order of functional interconnects in a test path, we also present a test-path design algorithm. The proposed algorithm can generate all test paths for interconnect testing.

In order to test for opens, shorts, and interconnect delay defects in the interposer, a test architecture is proposed that is fully compatible with the IEEE 1149.1 standard and relies on an enhancement of the standard test access port (TAP) controller. To reduce test cost, a test-path design and scheduling technique is also presented that minimizes a composite cost function based on test time and the design-for-test (DfT) overhead in terms of additional through silicon vias (TSVs) and micro-bumps needed for test access. The locations of the dies on the interposer are taken into consideration in order to determine the order of dies in a test path.

To address the scenario of high density of I/O ports and interconnects, an efficient built-in self-test (BIST) technique is presented that targets the dies and the interposer interconnects. The proposed BIST architecture can be enabled by the standard TAP controller in the IEEE 1149.1 standard. The area overhead introduced by this BIST architecture is negligible; it includes two simple BIST controllers, a linear-feedback-shift-register (LFSR), a multiple-input-signature-register (MISR), and some extensions to the boundary-scan cells in the dies on the interposer. With these extensions, all boundary-scan cells can be used for self-configuration and self-diagnosis during interconnect testing. To reduce the overall test cost, a test scheduling and optimization technique under power constraints is described.

In order to accomplish testing with a small number test pins, the dissertation presents two efficient ExTest scheduling strategies that implements interconnect testing between tiles inside an system on chip (SoC) die on the interposer while satisfying the practical constraint that the number of required test pins cannot exceed the number of available pins at the chip level. The tiles in the SoC are divided into groups based on the manner in which they are interconnected. In order to minimize the test time, two optimization solutions are introduced. The first solution minimizes the number of input test pins, and the second solution minimizes the number output test pins. In addition, two subgroup configuration methods are further proposed to generate subgroups inside each test group.

Finally, the dissertation presents a programmable method for shift-clock stagger assignment to reduce power supply noise during SoC die testing in 2.5D ICs. An SoC die in the 2.5D IC is typically composed of several blocks and two neighboring blocks that share the same power rails should not be toggled at the same time during shift. Therefore, the proposed programmable method does not assign the same stagger value to neighboring blocks. The positions of all blocks are first analyzed and the shared boundary length between blocks is then calculated. Based on the position relationships between the blocks, a mathematical model is presented to derive optimal result for small-to-medium sized problems. For larger designs, a heuristic algorithm is proposed and evaluated.

In summary, the dissertation targets important design and optimization problems related to testing of interposer-based 2.5D ICs. The proposed research has led to theoretical insights, experiment results, and a set of test and design-for-test methods to make testing effective and feasible from a cost perspective.

Best Practices: Lessons Learned by a South Florida Non-Profit Community Based Organization while Designing and Implementing a Career Exploration Evidence Informed Framework in Urban Communities

All A’s was designed to support of the agency’s family strengthening initiatives in South Florida. All A’s uses evidence informed strategies poised to be an inclusive curriculum that teaches self-determination and adaptive behavior skills. The framework incorporates problem based learning and adult learning theory and follows the Universal Design for Learning. Since 2012, the agency has served over 8500 youth and 4,000 adults using the framework. The framework addresses educational underachievement and career readiness in at risk populations. It is used to enhance participants AWARENESS of setting SMART goals to achieve future goals and career aspirations. Participants are provided with ACCESS to resources and opportunities for creating and implementing an ACTION plan as they pursue and ACHIEVE their goals. All A’s promotes protective factors and expose youth to career pathways in Science, Technology, Engineering and Math (STEM) related fields. Youth participate in college tours, job site visits, job shadowing, high school visits, online college and career preparation assistance, service learning projects, STEM projects, and the Winning Futures© mentoring program. Adults are assisted with résumé development; learn job search strategies, interview techniques, job shadowing experiences, computer and financial literacy programs. Adults and youth are also given the opportunity to complete industry-recognized certifications in high demand industries (food service, general labor, and construction), and test preparation for the General Educational Development Test.

A cloud-based system for measuring radiation treatment plan similarity

PURPOSE: Radiation therapy is used to treat cancer using carefully designed plans that maximize the radiation dose delivered to the target and minimize damage to healthy tissue, with the dose administered over multiple occasions. Creating treatment plans is a laborious process and presents an obstacle to more frequent replanning, which remains an unsolved problem. However, in between new plans being created, the patient's anatomy can change due to multiple factors including reduction in tumor size and loss of weight, which results in poorer patient outcomes. Cloud computing is a newer technology that is slowly being used for medical applications with promising results. The objective of this work was to design and build a system that could analyze a database of previously created treatment plans, which are stored with their associated anatomical information in studies, to find the one with the most similar anatomy to a new patient. The analyses would be performed in parallel on the cloud to decrease the computation time of finding this plan. METHODS: The system used SlicerRT, a radiation therapy toolkit for the open-source platform 3D Slicer, for its tools to perform the similarity analysis algorithm. Amazon Web Services was used for the cloud instances on which the analyses were performed, as well as for storage of the radiation therapy studies and messaging between the instances and a master local computer. A module was built in SlicerRT to provide the user with an interface to direct the system on the cloud, as well as to perform other related tasks. RESULTS: The cloud-based system out-performed previous methods of conducting the similarity analyses in terms of time, as it analyzed 100 studies in approximately 13 minutes, and produced the same similarity values as those methods. It also scaled up to larger numbers of studies to analyze in the database with a small increase in computation time of just over 2 minutes. CONCLUSION: This system successfully analyzes a large database of radiation therapy studies and finds the one that is most similar to a new patient, which represents a potential step forward in achieving feasible adaptive radiation therapy replanning.

SINGLE STAGE LED DRIVER TECHNOLOGY WITH LOW FREQUENCY RIPPLE CANCELLATION

Because of high efficacy, long lifespan, and environment-friendly operation, LED lighting devices become more and more popular in every part of our life, such as ornament/interior lighting, outdoor lightings and flood lighting. The LED driver is the most critical part of the LED lighting fixture. It heavily affects the purchasing cost, operation cost as well as the light quality. Design a high efficiency, low component cost and flicker-free LED driver is the goal. The conventional single-stage LED driver can achieve low cost and high efficiency. However, it inevitably produces significant twice-line-frequency lighting flicker, which adversely affects our health. The conventional two-stage LED driver can achieve flicker-free LED driving at the expenses of significantly adding component cost, design complexity and low the efficiency. The basic ripple cancellation LED driving method has been proposed in chapter three. It achieves a high efficiency and a low component cost as the single-stage LED driver while also obtaining flicker-free LED driving performance. The basic ripple cancellation LED driver is the foundation of the entire thesis. As the research evolving, another two ripple cancellation LED drivers has been developed to improve different aspects of the basic ripple cancellation LED driver design. The primary side controlled ripple cancellation LED driver has been proposed in chapter four to further reduce cost on the control circuit. It eliminates secondary side compensation circuit and an opto-coupler in design while at the same time maintaining flicker-free LED driving. A potential integrated primary side controller can be designed based on the proposed LED driving method. The energy channeling ripple cancellation LED driver has been proposed in chapter five to further reduce cost on the power stage circuit. In previous two ripple cancellation LED drivers, an additional DC-DC converter is needed to achieve ripple cancellation. A power transistor has been used in the energy channeling ripple cancellation LED driving design to successfully replace a separate DC-DC converter and therefore achieved lower cost. The detailed analysis supports the theory of the proposed ripple cancellation LED drivers. Simulation and experiment have also been included to verify the proposed ripple cancellation LED drivers.

Performance Evaluation of a Statistical and a Neural Network Model for Nonrigid Shape-Based Registration

Shape-based registration methods frequently encounters in the domains of computer vision, image processing and medical imaging. The registration problem is to find an optimal transformation/mapping between sets of rigid or nonrigid objects and to automatically solve for correspondences. In this paper we present a comparison of two different probabilistic methods, the entropy and the growing neural gas network (GNG), as general feature-based registration algorithms. Using entropy shape modelling is performed by connecting the point sets with the highest probability of curvature information, while with GNG the points sets are connected using nearest-neighbour relationships derived from competitive hebbian learning. In order to compare performances we use different levels of shape deformation starting with a simple shape 2D MRI brain ventricles and moving to more complicated shapes like hands. Results both quantitatively and qualitatively are given for both sets.

Assessment of the EEE-4 oral test: a discourse analysis based on complex networks.

With the development of information technology, the theory and methodology of complex network has been introduced to the language research, which transforms the system of language in a complex networks composed of nodes and edges for the quantitative analysis about the language structure. The development of dependency grammar provides theoretical support for the construction of a treebank corpus, making possible a statistic analysis of complex networks. This paper introduces the theory and methodology of the complex network and builds dependency syntactic networks based on the treebank of speeches from the EEE-4 oral test. According to the analysis of the overall characteristics of the networks, including the number of edges, the number of the nodes, the average degree, the average path length, the network centrality and the degree distribution, it aims to find in the networks potential difference and similarity between various grades of speaking performance. Through clustering analysis, this research intends to prove the network parameters’ discriminating feature and provide potential reference for scoring speaking performance.

Managerial skills required by innovative and technology-based firms

This paper aims to investigate the Business Administration professional profile specifically required to manage innovative and high technology-based companies. It is a qualitative study outlined by an exploratory-descriptive research, supported by questionnaires and interviews addressed to a sample of executives of technology-based companies, located in São Paulo metropolitan region, Brazil. Accordingly, modular innovation arises from the existence of an architectural knowledge improved in association with the conceptually destroyed knowledge's component, meaning that architectural innovation arises from an improvement in the knowledge of the parties allied to the architectural knowledge's destruction. Results show that managers see innovation as one essential pillar for competitiveness and commonly associate innovation with team expertise related with the structure for this purpose. However, to instill innovation as an organizational discipline, it is necessary to redesign organizational processes, namely those considered critical to innovate. The company must revise its management model aiming to emphasize innovative behavior, which means readiness to respond to external environment change's requirements. Moreover, once it is necessary to change the manager's mindset about innovation, higher education institutions also have to adapt their Business Administration courses according to both changes, essentially concerning a more dynamic and more diffuse business environment in comparison to their curricular contents. The institutional pragmatism generates professionals who reach the job market with a historical and non-managerial overview on innovation. Nevertheless, results highlight that attitude is more appreciated than knowledge, or business management skills, what makes managerial behavior a key element in the innovation process in technology-based firms.

A C80 DSP-based active vision system for real-time tracking

[EN]Active Vision Systems can be considered as dynamical systems which close the loop around artificial visual perception, controlling camera parameters, motion and also controlling processing to simplify, accelerate and do more robust visual perception. Research and Development in Active Vision Systems [Aloi87], [Bajc88] is a main area of interest in Computer Vision, mainly by its potential application in different scenarios where real-time performance is needed such as robot navigation, surveillance, visual inspection, among many others. Several systems have been developed during last years using robotic-heads for this purpose...