Special issue on design and programming of signal processors for multimedia communication:Special issue on design and programming of signal processors for multimedia communication

The technical challenges in the design and programming of signal processors for multimedia communication are discussed. The development of terminal equipment to meet such demand presents a significant technical challenge, considering that it is highly desirable that the equipment be cost effective, power efficient, versatile, and extensible for future upgrades. The main challenges in the design and programming of signal processors for multimedia communication are, general-purpose signal processor design, application-specific signal processor design, operating systems and programming support and application programming. The size of FFT is programmable so that it can be used for various OFDM-based communication systems, such as digital audio broadcasting (DAB), digital video broadcasting-terrestrial (DVB-T) and digital video broadcasting-handheld (DVB-H). The clustered architecture design and distributed ping-pong register files in the PAC DSP raise new challenges of code generation.

Idealised operation of zero-voltage-switching series-L/parallel-tuned Class-E power amplifier

An analysis of a modified series-L/parallel-tuned Class-E power amplifier is presented, which includes the effects that a shunt capacitance placed across the switching device will have on Class-E behaviour. In the original series L/parallel-tuned topology in which the output transistor capacitance is not inherently included in the circuit, zero-current switching (ZCS) and zero-current derivative switching (ZCDS) conditions should be applied to obtain optimum Class-E operation. On the other hand, when the output transistor capacitance is incorporated in the circuit, i.e. in the modified series-L/parallel-tuned topology, the ZCS and ZCDS would not give optimum operation and therefore zero-voltage-switching (ZVS) and zero-voltage-derivative switching (ZVDS) conditions should be applied instead. In the modified series-L/parallel-tuned Class-E configuration, the output-device inductance and the output-device output capacitance, both of which can significantly affect the amplifier's performance at microwave frequencies, furnish part, if not all, of the series inductance L and the shunt capacitance COUT, respectively. Further, when compared with the classic shunt-C/series-tuned topology, the proposed Class-E configuration offers some advantages in terms of 44% higher maximum operating frequency (fMAX) and 4% higher power-output capability (PMAX). As in the classic topology, the fMAX of the proposed amplifier circuit is reached when the output-device output capacitance furnishes all of the capacitance COUT, for a given combination of frequency, output power and DC supply voltage. It is also shown that numerical simulations agree well with theoretical predictions.

Exploring figures of merit associated with the suboptimum operation of class-E power amplifiers

Closed-form design equations for the operation of a class-E amplifier for zero switch voltage slope and arbitrary duty cycle are derived. This approach allows an additional degree of freedom in the design of class-E amplifiers which are normally designed for 50 duty ratio. The analysis developed permits the selection of non-unique solutions where amplifier efficiency is theoretically 100 but power output capability is less than that the 50 duty ratio case would permit. To facilitate comparison between 50 (optimal) and non-50 (suboptimal) duty ratio cases, each important amplifier parameter is normalised to its corresponding optimum operation value. It is shown that by choosing a non-50 suboptimal solution, the operating frequency of a class-E amplifier can be extended. In addition, it is shown that by operating the amplifier in the suboptimal regime, other amplifier parameters, for example, transistor output capacitance or peak switch voltage, can be included along with the standard specification criteria of output power, DC supply voltage and operating frequency as additional input design specifications. Suboptimum class-E operation may have potential advantages for monolithic microwave integrated circuit realisation as lower inductance values (lower series resistance, higher self-resonance frequency, less area) may be required when compared with the results obtained for optimal class-E amplifier synthesis. The theoretical analysis conducted here was verified by harmonic balance simulation, with excellent agreement between both methods. © The Institution of Engineering and Technology 2007.

Fault reconstruction in linear dynamic systems using multivariate statistics

Treasure et al. (2004) recently proposed a new sub space-monitoring technique, based on the N4SID algorithm, within the multivariate statistical process control framework. This dynamic-monitoring method requires considerably fewer variables to be analysed when compared with dynamic principal component analysis (PCA). The contribution charts and variable reconstruction, traditionally employed for static PCA, are analysed in a dynamic context. The contribution charts and variable reconstruction may be affected by the ratio of the number of retained components to the total number of analysed variables. Particular problems arise if this ratio is large and a new reconstruction chart is introduced to overcome these. The utility of such a dynamic contribution chart and variable reconstruction is shown in a simulation and by application to industrial data from a distillation unit.

Identification of dynamic systems under closed-loop control

This paper introduces a novel modelling framework for identifying dynamic models of systems that are under feedback control. These models are identified under closed-loop conditions and produce a joint representation that includes both the plant and controller models in state space form. The joint plant/controller model is identified using subspace model identification (SMI), which is followed by the separation of the plant model from the identified one. Compared to previous research, this work (i) proposes a new modelling framework for identifying closed-loop systems, (ii) introduces a generic structure to represent the controller and (iii) explains how that the new framework gives rise to a simplified determination of the plant models. In contrast, the use of the conventional modelling approach renders the separation of the plant model a difficult task. The benefits of using the new model method are demonstrated using a number of application studies.

Neural modelling, control and optimisation of an industrial grinding process

This paper describes the development of neural model-based control strategies for the optimisation of an industrial aluminium substrate disk grinding process. The grindstone removal rate varies considerably over a stone life and is a highly nonlinear function of process variables. Using historical grindstone performance data, a NARX-based neural network model is developed. This model is then used to implement a direct inverse controller and an internal model controller based on the process settings and previous removal rates. Preliminary plant investigations show that thickness defects can be reduced by 50% or more, compared to other schemes employed. (c) 2004 Elsevier Ltd. All rights reserved.

System oriented neural networks - Problem formulation, methodology and application

A novel methodology is proposed for the development of neural network models for complex engineering systems exhibiting nonlinearity. This method performs neural network modeling by first establishing some fundamental nonlinear functions from a priori engineering knowledge, which are then constructed and coded into appropriate chromosome representations. Given a suitable fitness function, using evolutionary approaches such as genetic algorithms, a population of chromosomes evolves for a certain number of generations to finally produce a neural network model best fitting the system data. The objective is to improve the transparency of the neural networks, i.e. to produce physically meaningful

Comparative analysis of the DC performance of DG MOSFETs on highly-doped and near-intrinsic silicon layers

A comparison of dc characteristics of fully depleted double-gate (DG) MOSFETs with respect to low-power circuit applications and device scaling has been performed by two-dimensional device simulation. Three different DG MOSFET structures including a conventional N+ polysilicon gate device with highly doped Si layer, an asymmetrical P+/N+ polysilicon gate device with low doped Si layer and a midgap metal gate device with low doped Si layer have been analysed. It was found that DG MOSFET with mid-gap metal, gates yields the best dc parameters for given off-state drain leakage current and highest immunity to the variation of technology parameters (gate length, gate oxide thickness and Si layer thickness). It is also found that an asymmetrical P+/N+ polysilicon gate DG MOSFET design offers comparable dc characteristics, but better parameter immunity to technology tolerances than a conventional DG MOSFET. (C) 2004 Elsevier Ltd. All rights reserved.

Improved fault diagnosis in multivariate systems using regression-based reconstruction

Subspace monitoring has recently been proposed as a condition monitoring tool that requires considerably fewer variables to be analysed compared to dynamic principal component analysis (PCA). This paper analyses subspace monitoring in identifying and isolating fault conditions, which reveals that the existing work suffers from inherent limitations if complex fault senarios arise. Based on the assumption that the fault signature is deterministic while the monitored variables are stochastic, the paper introduces a regression-based reconstruction technique to overcome these limitations. The utility of the proposed fault identification and isolation method is shown using a simulation example and the analysis of experimental data from an industrial reactive distillation unit.

Germanium on sapphire

This paper explores the potential of germanium on sapphire (GeOS) wafers as a universal substrate for System on a Chip (SOC), mm wave integrated circuits (MMICs) and optical imagers. Ge has a lattice constant close to that of GaAs enabling epitaxial growth. Ge, GaAs and sapphire have relatively close temperature coefficients of expansion (TCE), enabling them to be combined without stress problems. Sapphire is transparent over the range 0.17 to 5.5 µm and has a very low loss tangent (a) for frequencies up to 72 GHz. Ge bonding to sapphire substrates has been investigated with regard to micro-voids and electrical quality of the Ge back interface. The advantages of a sapphire substrate for integrated inductors, coplanar waveguides and crosstalk suppression are also highlighted. MOS transistors have been fabricated on GeOS substrates, produced by the Smart-cut process, to illustrate the compatibility of the substrate with device processing. © 2008 World Scientific Publishing Company.

Series-L/parallel-tuned comparison with shunt-C/series-tuned class-E power amplifier

An analysis of the operation of a series-L/parallel-tuned class-E amplifier and its equivalence to the classic shunt-C/series-tuned class-E amplifier are presented. The first reported closed form design equations for the series-L/parallel-tuned topology operating under ideal switching conditions are given. Furthermore, a design procedure is introduced that allows the effect that nonzero switch resistance has on amplifier performance efficiency to be accounted for. The technique developed allows optimal circuit components to be found for a given device series resistance. For a relatively high value of switching device ON series resistance of 4O, drain efficiency of around 66% for the series-L/parallel-tuned topology, and 73% for the shunt-C/series-tuned topology appear to be the theoretical limits. At lower switching device series resistance levels, the efficiency performance of each type are similar, but the series-L/parallel-tuned topology offers some advantages in terms of its potential for MMIC realisation. Theoretical analysis is confirmed by numerical simulation for a 500mW (27dBm), 10% bandwidth, 5 V series-L/parallel-tuned, then, shunt-C/series-tuned class E power amplifier, operating at 2.5 GHz, and excellent agreement between theory and simulation results is achieved. The theoretical work presented in the paper should facilitate the design of high-efficiency switched amplifiers at frequencies commensurate with the needs of modern mobile wireless applications in the microwave frequency range, where intrinsically low-output-capacitance MMIC switching devices such as pHEMTs are to be used.

PLS modelling and fault detection on the Tennessee Eastman benchmark

This paper describes the application of multivariate regression techniques to the Tennessee Eastman benchmark process for modelling and fault detection. Two methods are applied : linear partial least squares, and a nonlinear variant of this procedure using a radial basis function inner relation. The performance of the RBF networks is enhanced through the use of a recently developed training algorithm which uses quasi-Newton optimization to ensure an efficient and parsimonious network; details of this algorithm can be found in this paper. The PLS and PLS/RBF methods are then used to create on-line inferential models of delayed process measurements. As these measurements relate to the final product composition, these models suggest that on-line statistical quality control analysis should be possible for this plant. The generation of `soft sensors' for these measurements has the further effect of introducing a redundant element into the system, redundancy which can then be used to generate a fault detection and isolation scheme for these sensors. This is achieved by arranging the sensors and models in a manner comparable to the dedicated estimator scheme of Clarke et al. 1975, IEEE Trans. Pero. Elect. Sys., AES-14R, 465-473. The effectiveness of this scheme is demonstrated on a series of simulated sensor and process faults, with full detection and isolation shown to be possible for sensor malfunctions, and detection feasible in the case of process faults. Suggestions for enhancing the diagnostic capacity in the latter case are covered towards the end of the paper.

Disturbance attenuation in linear systems via dynamical compensators: A parametric eigenstructure assignment approach

A simple approach is proposed for disturbance attenuation in multivariable linear systems via dynamical output compensators based on complete parametric eigenstructure assignment. The basic idea is to minimise the H-2 norm of the disturbance-output transfer function using the design freedom provided by eigenstructure assignment. For robustness, the closed-loop system is restricted to be nondefective. Besides the design parameters, the closed-loop eigenvalues are also optimised within desired regions on the left-half complex plane to ensure both closed-loop stability and dynamical performance. With the proposed approach, additional closed-loop specifications can be easily achieved. As a demonstration, robust pole assignment, in the sense that the closed-loop eigenvalues are as insensitive as possible to open-loop system parameter perturbations, is treated. Application of the proposed approach to robust control of a magnetic bearing with a pair of opposing electromagnets and a rigid rotor is discussed.