885 resultados para Power supply circuits
Resumo:
This paper enhances some concepts of the Instantaneous Complex Power Theory by analyzing the analytical expressions for voltages, currents and powers developed on a symmetrical RL three-phase system, during the transient caused by a sinusoidal voltage excitation. The powers delivered to an ideal inductor will be interpreted, allowing a deep insight in the power phenomenon by analyzing the voltages in each element of the circuit. The results can be applied to the understanding of non-linear systems subject to sinusoidal voltage excitation and distorted currents.
Resumo:
A low-voltage, low-power four-quadrant analog multiplier with optimized current-efficiency is presented. Its core corresponds to a pseudodifferential cascode, gain-boosting triode-transconductor. According to a low-voltage 1.2μm CMOS n-well process, operand differential-amplitudes are 1.0Vpp and 0.32Vpp for a 1.3V-supply. Common-mode voltages are properly chosen to maximize current-efficiency to 58%. Total quiescent dissipation is 260μW. A range of PSPICE simulation supports theoretical analysis. Excellent linearity is observed on dc characteristic. Assuming a ±0.5% mismatch on (W/L) and VTH THD at full-scale is 0.93% and 1.42%, for output frequencies of 1MHz and 10MHz, respectively.
Resumo:
A low-voltage, low-power OTA-C sinusoidal oscillator based on a triode-MOSFET transconductor is here discussed. The classical quadrature model is employed and the transconductor inherent nonlinear characteristic with input voltage is used as the amplitude-stabilization element. An external bias VTUNE linearly adjusts the oscillation frequency. According to a standard 0.8μm CMOS n-well process, a prototype was integrated, with an effective area of 0.28mm2. Experimental data validate the theoretical analysis. For a single 1.8V-supply and 100mV≤VTUNE≤250mV, the oscillation frequency fo ranges from 0.50MHz to 1.125MHz, with a nearly constant gain KVCO=4.16KHz/mV. Maximum output amplitude is 374mVpp @1.12MHz. THD is -41dB @321mVpp. Maximum average consumption is 355μW.
Resumo:
A CMOS low-voltage, wide-band continuous-time current amplifier is presented. Based on an open-loop topology, the circuit is composed by transresistance and transconductance stages built around triode-operating transistors. In addition to an extended dynamic range, the amplifier gain can be programmed within good accuracy by the rapport between the aspect-ratio of such transistors and tuning biases Vxand Vy. A balanced current-amplifier according to a single I. IV-supply and a 0.35μm fabrication process is designed. Simulated results from PSPiCE and Bsm3v3 models indicate a programmable gain within the range 20-34dB and a minimum break-frequency of IMHz @CL=IpF. For a 200 μApp-level, THD is 0.8% and 0.9% at IKHz and 100KHz, respectively. Input noise is 405pA√Hz @20dB-gain, which gives a SNR of 66dB @1MHz-bandwidth. Maximum quiescent power consumption is 56μ W. © 2002 IEEE.
Resumo:
An active leakage-injection scheme (ALIS) for low-voltage (LV) high-density (HD) SRAMs is presented. By means of a feedback loop comprising a servo-amplifier and a common-drain MOSFET, a current matching the respective bit-line leakage is injected onto the line during precharge and sensing, preventing the respective capacitances from erroneous discharges. The technique is able to handle leakages up to hundreds of μA at high operating temperatures. Since no additional timing is required, read-out operations are performed at no speed penalty. A simplified 256×1bit array was designed in accordance with a 0.35 CMOS process and 1.2V-supply. A range of PSPICE simulation attests the efficacy of ALIS. With an extra power consumption of 242 μW, a 200 μA-leakage @125°C, corresponding to 13.6 times the cell current, is compensated.
Resumo:
An electronic ballast for multiple tubular fluorescent lamps is presented in this paper. The proposed structure features high power-factor, dimming capability, and soft-switching to the semiconductor devices operated in high frequencies. A Zero-Current-Switching - Pulse-Width-Modulated (ZCS-PWM) SEPIC converter composes the rectifying stage, controlled by the instantaneous average input current technique, performing soft-commutations and high input power factor. Regarding the inverting stage, it is composed by a classical resonant Half-Bridge converter, associated to Series Parallel-Loaded Resonant (SPLR) filters. The dimming control technique employed in this Half-Bridge inverter is based on the phase-shift in the current processed through the sets of filter + lamp. In addition, experimental results are shown in order to validate the developed analysis.
Resumo:
In this work, the planning of secondary distribution circuits is approached as a mixed integer nonlinear programming problem (MINLP). In order to solve this problem, a dedicated evolutionary algorithm (EA) is proposed. This algorithm uses a codification scheme, genetic operators, and control parameters, projected and managed to consider the specific characteristics of the secondary network planning. The codification scheme maps the possible solutions that satisfy the requirements in order to obtain an effective and low-cost projected system-the conductors' adequate dimensioning, load balancing among phases, and the transformer placed at the center of the secondary system loads. An effective algorithm for three-phase power flow is used as an auxiliary methodology of the EA for the calculation of the fitness function proposed for solutions of each topology. Results for two secondary distribution circuits are presented, whereas one presents radial topology and the other a weakly meshed topology. © 2005 IEEE.
Resumo:
This paper presents two discrete sliding mode control (SMC) design. The first one is a discrete-time SMC design that doesn't take into account the time-delay. The second one is a discrete-time SMC design, which takes in consideration the time-delay. The proposed techniques aim at the accomplishment simplicity and robustness for an uncertainty class. Simulations results are shown and the effectiveness of the used techniques is analyzed. © 2006 IEEE.
Resumo:
The objective of this paper is to show an alternative methodology to estimate per unit length parameters of a line segment of a transmission line. With this methodology the line segment parameters can be obtained starting from the phase currents and voltages in receiving and sending end of the line segment. If the line segment is represented as being one or more π circuits whose frequency dependent parameters are considered lumped, its impedance and admittance can be easily expressed as functions of the currents and voltages at the sending and receiving end. Because we are supposing that voltages and currents at the sending and receiving end of the line segment (in frequency domain) are known, it is possible to obtains its impedance and admittance and consequently its per unit length longitudinal and transversal parameters. The procedure will be applied to estimate the longitudinal and transversal parameters of a small segment of a single-phase line that is already built. © 2006 IEEE.
Resumo:
Incentives for using wind power and the increasing price of energy might generate in a relatively short time a scenario where low voltage customers opt to install roof-top wind turbines. This paper focuses on evaluating the effects of such situation in terms of energy consumption, loss reduction, reverse power flow and voltage profiles. Various commercially-available roof-top wind turbines are installed in two secondary distribution circuits considering real-life wind speed data and seasonal load demand. Results are presented and discussed. © 2006 IEEE.
Resumo:
In this paper a three-phase power flow for electrical distribution systems considering different models of voltage regulators is presented. A voltage regulator (VR) is an equipment that maintains the voltage level in a predefined value in a distribution line in spite of the load variations within its nominal power. Three different types of connections are analyzed: 1) wye-connected regulators, 2) open delta-connected regulators and 3) closed delta-connected regulators. To calculate the power flow, the three-phase backward/forward sweep algorithm is used. The methodology is tested on the IEEE 34 bus distribution system. ©2008 IEEE.
Resumo:
This work presents a case study on technology assessment for power quality devices. A system compatibility test protocol for power quality mitigation devices was developed in order to evaluate the functionality of three-phase voltage restoration devices. In order to case test this test protocol, a development platform with reduced power for DVR (Dynamic Voltage Restorer), the Micro-DVR, was tested, and results were discussed based on voltage disturbances standards. ©2008 IEEE.
Resumo:
This paper investigates the major similarities and discrepancies of three important current decompositions proposed for the interpretation of unbalanced and/or non linear three-phase four-wire circuits. The considered approaches were the so-called FBD Theory, the pq-Theory and the CPT. Although the methods are based on different concepts, the results obtained under ideal conditions (sinusoidal and balanced signals) are very similar. The main differences appear in the presence of unbalanced and non linear load conditions. It will be demonstrated and discussed how the choice of the voltage referential and the return conductor impedance can influence in the resulting current components, as well as, the way of interpreting a power circuit with return conductor. Under linear unbalanced conditions, both FBD and pq-Theory suggest that the some current components contain a third-order harmonic. Besides, neither pq-Theory nor FBD method are able to provide accurate information for reactive current under unbalanced and distorted conditions, what seems to be done by means of the CPT. © 2009 IEEE.
Resumo:
Considering different single and multiphase circuits feeding linear and non-linear loads, this paper presents theoretical discussions and experimental evaluation of the recent Conservative Power Theory (CPT), by means of Virtual Instrumentation concepts. The main goal is to analyze the results of such power theory definitions under nonsinusoidal and unbalanced conditions, pointing out its major advantages, possible drawbacks or relevant aspects for discussion. © 2009 IEEE.
Resumo:
In this work, a heuristic model for integrated planning of primary distribution network and secondary distribution circuits is proposed. A Tabu Search (TS) algorithm is employed to solve the planning of primary distribution networks. Evolutionary Algorithms (EA) are used to solve the planning model of secondary networks. The planning integration of both networks is carried out by means a constructive heuristic taking into account a set of integration alternatives between these networks. These integration alternatives are treated in a hierarchical way. The planning of primary networks and secondary distribution circuits is carried out based on assessment of the effects of the alternative solutions in the expansion costs of both networks simultaneously. In order to evaluate this methodology, tests were performed for a real-life distribution system taking into account the primary and secondary networks.