916 resultados para resistance against malicious auditors


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Das Cydia pomonella Granulovirus (CpGV, Baculoviridae) wird seit Ende der 1980er Jahre als hoch-selektives und effizientes biologisches Bekämpfungsmittel zur Kontrolle des Apfelwicklers im Obstanbau eingesetzt. Seit 2004 wurden in Europa verschiedene Apfelwicklerpopulationen beobachtet die resistent gegenüber dem hauptsächlich angewendeten Isolat CpGV-M aufweisen. Die vorliegende Arbeit befasst sich mit der Untersuchung der Vererbung und des Mechanismus der CpGV Resistenz. Einzelpaarkreuzungen zwischen einem empfindlichen Laborstamm (CpS) und einem homogen resistenten Stamm (CpRR1) zeigten, dass die Resistenz durch ein einziges dominantes Gen, das auf dem Z-Chromosom lokalisiert ist, vererbt wird. Massernkreuzungen zwischen CpS und einer heterogen resistenten Feldpopulation (CpR) deuteten zunächst auf einen unvollständig dominanten autosomalen Erbgang hin. Einzelpaarkreuzungen zwischen CpS und CpR bewiesen jedoch, dass die Resistenz in CpR ebenfalls monogen dominant und geschlechtsgebunden auf dem Z-Chromosom vererbt wird. Diese Arbeit diskutiert zudem die Vor- und Nachteile von Einzelpaarkreuzungen gegenüber Massernkreuzungen bei der Untersuchung von Vererbungsmechanismen. Die Wirksamkeit eines neuen CpGV Isolates aus dem Iran (CpGV-I12) gegenüber CpRR1 Larven, wurde in Bioassays getestet. Die Ergebnisse zeigen, dass CpGV-I12 die Resistenz in allen Larvenstadien von CpRR1 brechen kann und fast so gut wirkt wie CpGV-M gegenüber CpS Larven. Daher ist CpGV-I12 für die Kontrolle des Apfelwicklers in Anlagen wo die Resistenz aufgetreten ist geeignet. Um den der CpGV Resistenz zugrunde liegenden Mechanismus zu untersuchen, wurden vier verschiedene Experimente durchgeführt: 1) die peritrophische Membran degradiert indem ein optischer Aufheller dem virus-enthaltenden Futtermedium beigefügt wurde. Das Entfernen dieser mechanischen Schutzbarriere, die den Mitteldarm auskleidet, führte allerdings nicht zu einer Reduzierung der Resistenz in CpR Larven. Demnach ist die peritrophische Membran nicht am Resistenzmechanismus beteiligt. 2) Die Injektion von Budded Virus in das Hämocoel führte nicht zur Brechung der Resistenz. Folglich die die Resistenz nicht auf den Mitteldarm beschränkt, sondern auch in der Sekundärinfektion wirksam. 3) Die Replikation von CpGV in verschiedenen Geweben (Mitteldarm, Hämolymphe und Fettkörper) von CpS und CpRR1 wurde mittels quantitativer PCR verfolgt. In CpS Larven konnte in allen drei Gewebetypen sowohl nach oraler als auch nach intra-hämocoelarer Infektion eine Zunahme der CpGV Genome in Abhängigkeit der Zeit festgestellt werden. Dagegen konnte in den Geweben aus CpRR1 nach oraler sowie intra-hämocoelarer Infektion keine Virusreplikation detektiert werden. Dies deutet darauf hin, dass die CpGV Resistenz in allen Zelltypen präsent ist. 4) Um zu untersuchen ob ein humoraler Faktor in der Hämolymphe ursächlich an der Resistenz beteiligt ist, wurde Hämolymphe aus CpRR1 Larven in CpS Larven injiziert und diese anschließend oral mit CpGV infiziert. Es konnte jedoch keine Immunreaktion beobachtet und kein Faktor in der Hämolymphe identifiziert werden, der Resistenz induzieren könnte. Auf Grundlage dieser Ergebnisse kann festgestellt werden, dass in resistenten Apfelwicklerlarven die virale Replikation in allen Zelltypen verhindert wird, was auf eine Virus-Zell Inkompatibilität hinweist. Da in CpRR1 keine DNA Replikation beobachtet wurde, wird die CpGV Resistenz wahrscheinlich durch eine frühe Unterbindung der Virusreplikation verursacht.Das früh exprimierte Gen pe38 codiert für ein Protein, das wahrscheinlich für die Resistenzbrechung durch CpGV-I12 verantwortlich ist. Interaktionen zwischen dem Protein PE38 und Proteinen in CpRR1 wurden mit Hilfe des Yeast Two-Hybrid (Y2H) Systems untersucht. Die detektierten Interaktionen sind noch nicht durch andere Methoden bestätigt, jedoch wurden zwei mögliche Gene auf dem Z-Chromosom und eines auf Chromosom 15 gefunden, wie möglicherweise an der CpGV Resistenz beteiligt sind.

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Glioblastoma multiforme (GBM) is the most common and most aggressive astrocytic tumor of the central nervous system (CNS) in adults. The standard treatment consisting of surgery, followed by a combinatorial radio- and chemotherapy, is only palliative and prolongs patient median survival to 12 to 15 months. The tumor subpopulation of stem cell-like glioma-initiating cells (GICs) shows resistance against radiation as well as chemotherapy, and has been suggested to be responsible for relapses of more aggressive tumors after therapy. The efficacy of immunotherapies, which exploit the immune system to specifically recognize and eliminate malignant cells, is limited due to strong immunosuppressive activities of the GICs and the generation of a specialized protective microenvironment. The molecular mechanisms underlying the therapy resistance of GICs are largely unknown. rnThe first aim of this study was to identify immune evasion mechanisms in GICs triggered by radiation. A model was used in which patient-derived GICs were treated in vitro with fractionated ionizing radiation (2.5 Gy in 7 consecutive passages) to select for a more radio-resistant phenotype. In the model cell line 1080, this selection process resulted in increased proliferative but diminished migratory capacities in comparison to untreated control GICs. Furthermore, radio-selected GICs downregulated various proteins involved in antigen processing and presentation, resulting in decreased expression of MHC class I molecules on the cellular surface and diminished recognition potential by cytotoxic CD8+ T cells. Thus, sub-lethal fractionated radiation can promote immune evasion and hamper the success of adjuvant immunotherapy. Among several immune-associated proteins, interferon-induced transmembrane protein 3 (IFITM3) was found to be upregulated in radio-selected GICs. While high expression of IFITM3 was associated with a worse overall survival of GBM patients (TCGA database) and increased proliferation and migration of differentiated glioma cell lines, a strong contribution of IFITM3 to proliferation in vitro as well as tumor growth and invasiveness in a xenograft model could not be observed. rnMultiple sclerosis (MS) is the most common autoimmune disease of the CNS in young adults of the Western World, which leads to progressive disability in genetically susceptible individuals, possibly triggered by environmental factors. It is assumed that self-reactive, myelin-specific T helper cell 1 (Th1) and Th17 cells, which have escaped the control mechanisms of the immune system, are critical in the pathogenesis of the human disease and its animal model experimental autoimmune encephalomyelitis (EAE). It was observed that in vitro differentiated interleukin 17 (IL-17) producing Th17 cells co-expressed the Th1-phenotypic cytokine Interferon-gamma (IFN-γ) in combination with the two respective lineage-associated transcription factors RORγt and T-bet after re-isolation from the CNS of diseased mice. Pathogenic molecular mechanisms that render a CD4+ T cell encephalitogenic have scarcely been investigated up to date. rnIn the second part of the thesis, whole transcriptional changes occurring in in vitro differentiated Th17 cells in the course of EAE were analyzed. Evaluation of signaling networks revealed an overrepresentation of genes involved in communication between the innate and adaptive immune system and metabolic alterations including cholesterol biosynthesis. The transcription factors Cebpa, Fos, Klf4, Nfatc1 and Spi1, associated with thymocyte development and naïve T cells were upregulated in encephalitogenic CNS-isolated CD4+ T cells, proposing a contribution to T cell plasticity. Correlation of the murine T-cell gene expression dataset to putative MS risk genes, which were selected based on their proximity (± 500 kb; ensembl database, release 75) to the MS risk single nucleotide polymorphisms (SNPs) proposed by the most recent multiple sclerosis GWAS in 2011, revealed that 67.3% of the MS risk genes were differentially expressed in EAE. Expression patterns of Bach2, Il2ra, Irf8, Mertk, Odf3b, Plek, Rgs1, Slc30a7, and Thada were confirmed in independent experiments, suggesting a contribution to T cell pathogenicity. Functional analysis of Nfatc1 revealed that Nfatc1-deficient CD4+ T cells were restrained in their ability to induce clinical signs of EAE. Nfatc1-deficiency allowed proper T cell activation, but diminished their potential to fully differentiate into Th17 cells and to express high amounts of lineage cytokines. As the inducible Nfatc1/αA transcript is distinct from the other family members, it could represent an interesting target for therapeutic intervention in MS.rn

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Pentraxin 3 (PTX3) is a soluble pattern recognition molecule playing a nonredundant role in resistance against Aspergillus fumigatus. The present study was designed to investigate the molecular pathways involved in the opsonic activity of PTX3. The PTX3 N-terminal domain was responsible for conidia recognition, but the full-length molecule was necessary for opsonic activity. The PTX3-dependent pathway of enhanced neutrophil phagocytic activity involved complement activation via the alternative pathway; Fc receptor (Fc R) IIA/CD32 recognition of PTX3-sensitized conidia and complement receptor 3 (CR3) activation; and CR3 and CD32 localization to the phagocytic cup. Gene targeted mice (ptx3, FcR common chain, C3, C1q) validated the in vivo relevance of the pathway. In particular, the protective activity of exogenous PTX3 against A fumigatus was abolished in FcR common chain-deficient mice. Thus, the opsonic and antifungal activity of PTX3 is at the crossroad between complement, complement receptor 3-, and Fc R-mediated recognition. Because short pentraxins (eg, C-reactive protein) interact with complement and Fc R, the present results may have general significance for the mode of action of these components of the humoral arm of innate immunity.

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Cytomegalovirus (CMV) infection is associated with significant morbidity and mortality in transplant recipients. Resistance against ganciclovir is increasingly observed. According to current guidelines, direct drug resistance testing is not always performed due to high costs and work effort, even when resistance is suspected.

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BACKGROUND: Equine recurrent airway obstruction (RAO) shares many characteristics with human asthma. In humans, an inverse relationship between susceptibility to asthma and resistance to parasites is suspected. HYPOTHESIS/OBJECTIVES: Members of a high-incidence RAO half-sibling family (F) shed fewer strongylid eggs compared with RAO-unaffected pasture mates (PM) and that RAO-affected horses shed fewer eggs than RAO-unaffected half-siblings. ANIMALS: Seventy-three F and 73 unrelated, age matched PM. METHODS: Cases and controls kept under the same management and deworming regime were examined. Each individual was classified as RAO affected or RAO unaffected and fecal samples were collected before and 1-3 weeks and 3 months after deworming. Samples were analyzed by combined sedimentation-flotation and modified McMaster methods and classified into 3 categories of 0 eggs per gram of feces (EpG), 1-100 EpG, and > 100 EpG, respectively. RESULTS: PM compared with RAO-affected F had a 16.7 (95% confidence interval [CI]: 2.0-136.3) times higher risk for shedding > 100 EpG compared with 0 EpG and a 5.3 (95% CI: 1.0-27.4) times higher risk for shedding > 100 EpG compared with 0 EpG. There was no significant effect when RAO-unaffected F were compared with their PM. RAO-unaffected compared with RAO-affected offspring had a 5.8 (95% CI: 0.0-1.0) times higher risk for shedding 1-100 EpG. Age, sex, breed, and sharing pastures with other species had no significant confounding effects. CONCLUSION AND CLINICAL IMPORTANCE: RAO is associated with resistance against strongylid parasites in a high-prevalence family.

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BACKGROUND: Standard first-line combination antiretroviral treatment (cART) against human immunodeficiency virus 1 (HIV-1) contains either a nonnucleoside reverse transcriptase inhibitor (NNRTI) or a ritonavir-boosted protease inhibitor (PI/r). Differences between these regimen types in the extent of the emergence of drug resistance on virological failure and the implications for further treatment options have rarely been assessed. METHODS: We investigated virological outcomes in patients from the Swiss HIV Cohort Study initiating cART between January 1, 1999, and December 31, 2005, with an unboosted PI, a PI/r, or an NNRTI and compared genotypic drug resistance patterns among these groups at treatment failure. RESULTS: A total of 489 patients started cART with a PI, 518 with a PI/r, and 805 with an NNRTI. A total of 177 virological failures were observed (108 [22%] PI failures, 24 [5%] PI/r failures, and 45 [6%] NNRTI failures). The failure rate was highest in the PI group (10.3 per 100 person-years; 95% confidence interval [CI], 8.5-12.4). No difference was seen between patients taking a PI/r (2.7; 95% CI, 1.8-4.0) and those taking an NNRTI (2.4; 95% CI, 1.8-3.3). Genotypic test results were available for 142 (80%) of the patients with a virological treatment failure. Resistance mutations were found in 84% (95% CI, 75%-92%) of patients taking a PI, 30% (95% CI, 12%-54%) of patients taking a PI/r, and 66% (95% CI, 49%-80%) of patients taking an NNRTI (P < .001). Multidrug resistance occurred almost exclusively as resistance against lamivudine-emtricitabine and the group-specific third drug and was observed in 17% (95% CI, 9%-26%) of patients taking a PI, 10% (95% CI, 0.1%-32%) of patients taking a PI/r, and 50% (95% CI, 33%-67%) of patients taking an NNRTI (P < .001). CONCLUSIONS: Regimens that contained a PI/r or an NNRTI exhibited similar potency as first-line regimens. However, the use of a PI/r led to less resistance in case of virological failure, preserving more drug options for the future.

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OBJECTIVE: 5-Aminolevulinic acid based photodynamic therapy (5-ALA-PDT) has revealed promising results in the treatment of inflammatory joint diseases due to the sensitivity of inflamed synovial tissue. For 5-ALA-PDT to be safe and beneficial for intra-articular applications, resistance of chondrocytes is essential to prevent cartilage damage. As no data yet exist, the aim of the present study was to assess in vitro the response of the chondrocytes to 5-ALA-PDT and to compare with osteoblasts and synovial tissue derived cells. METHODS: Bovine articular chondrocytes, osteoblasts, and synovial cells were subjected to 5-ALA-PDT in cell culture. The PpIX accumulation and the function of the cells were assessed for up to 12 days. RESULTS: Bovine chondrocytes showed lower PpIX fluorescence upon incubation with 5-ALA (0.0-2.0 mM) for 4 hours as compared to osteoblasts and synovial cells suggesting a low PpIX accumulation. After incubation with 0.5 mM 5-ALA and application of light at a dose of 20 J/cm2, chondrocytes were functionally not affected (collagen type II and aggrecan mRNA, glycosaminoglycan synthesis) whereas a decrease in the proportion of viable cells was observed in osteoblasts and synovial cells (2+/-2% and 14+/-8%, respectively; chondrocytes 91+/-13%). Chondrocytes showed a 58% reduction of 5-ALA uptake using [3H]5-ALA as compared to osteoblasts and a lower mitochondrial content as assessed by the activity of the mitochondrial marker enzyme citrate synthase (9.2+/- 3.6 mU/mg protein) than osteoblasts (32.6+/-10.5 mU/mg) and synovial cells (60.0+/-10.8 mU/mg). The reduced uptake of 5-ALA and/or the low mitochondrial content, an adaptation to their in vivo environment and the site of PpIX synthesis, presumably explains the lower PpIX content in chondrocytes and their resistance against 5-ALA-PDT. CONCLUSION: 5-ALA-PDT might represent a treatment strategy in inflammatory joint diseases without endangering the cartilage function. However, further in vitro and in vivo experiments are required to confirm this data in the authentic environment of chondrocytes, the articular cartilage.

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Inbreeding is common in plant populations and can affect plant fitness and resistance against herbivores. These effects are likely to depend on population history. In a greenhouse experiment with plants from 17 populations of Lychnis flos-cuculi, we studied the effects of experimental inbreeding on resistance and plant fitness. Depending on the levels of past herbivory and abiotic factors at the site of plant origin, we found either inbreeding or outbreeding depression in herbivore resistance. Furthermore, when not damaged experimentally by snail herbivores, plants from populations with higher heterozygosity suffered from inbreeding depression and those from populations with lower heterozygosity suffered from outbreeding depression. These effects of inbreeding and outbreeding were not apparent under experimental snail herbivory. We conclude that inbreeding effects on resistance and plant fitness depend on population history. Moreover, herbivory can mask inbreeding effects on plant fitness. Thus, understanding inbreeding effects on plant fitness requires studying multiple populations and considering population history and biotic interactions.

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Herbivore-induced systemic resistance occurs in many plants and is commonly assumed to be adaptive. The mechanisms triggered by leaf-herbivores that lead to systemic resistance are largely understood, but it remains unknown how and why root herbivory also increases resistance in leaves. To resolve this, we investigated the mechanism by which the root herbivore Diabrotica virgifera induces resistance against lepidopteran herbivores in the leaves of Zea mays. Diabrotica virgifera infested plants suffered less aboveground herbivory in the field and showed reduced growth of Spodoptera littoralis caterpillars in the laboratory. Root herbivory did not lead to a jasmonate-dependent response in the leaves, but specifically triggered water loss and abscisic acid (ABA) accumulation. The induction of ABA by itself was partly responsible for the induction of leaf defenses, but not for the resistance against S. littoralis. Root-herbivore induced hydraulic changes in the leaves, however, were crucial for the increase in insect resistance. We conclude that the induced leaf resistance after root feeding is the result of hydraulic changes, which reduce the quality of the leaves for chewing herbivores. This finding calls into question whether root-herbivore induced leaf-resistance is an evolved response. © The Authors (2010). Journal compilation © New Phytologist Trust (2010).

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Benzoxazinoids (BXs), such as 2,4-dihydroxy-7-methoxy-2H-1,4-benzoxazin-3(4H)-one (DIMBOA), are secondary metabolites in grasses. The first step in BX biosynthesis converts indole-3-glycerol phosphate into indole. In maize (Zea mays), this reaction is catalyzed by either BENZOXAZINELESS1 (BX1) or INDOLE GLYCEROL PHOSPHATE LYASE (IGL). The Bx1 gene is under developmental control and is mainly responsible for BX production, whereas the Igl gene is inducible by stress signals, such as wounding, herbivory, or jasmonates. To determine the role of BXs in defense against aphids and fungi, we compared basal resistance between Bx1 wild-type and bx1 mutant lines in the igl mutant background, thereby preventing BX production from IGL. Compared to Bx1 wild-type plants, BX-deficient bx1 mutant plants allowed better development of the cereal aphid Rhopalosiphum padi, and were affected in penetration resistance against the fungus Setosphaeria turtica. At stages preceding major tissue disruption, R. padi and S. turtica elicited increased accumulation of DIMBOA-glucoside, DIMBOA, and 2-hydroxy-4,7-dimethoxy-1,4-benzoxazin-3-one-glucoside (HDMBOA-glc), which was most pronounced in apoplastic leaf extracts. Treatment with the defense elicitor chitosan similarly enhanced apoplastic accumulation of DIMBOA and HDMBOA-glc, but repressed transcription of genes controlling BX biosynthesis downstream of BX1. This repression was also obtained after treatment with the BX precursor indole and DIMBOA, but not with HDMBOA-glc. Furthermore, BX-deficient bx1 mutant lines deposited less chitosan-induced callose than Bx1 wild-type lines, whereas apoplast infiltration with DIMBOA, but not HDMBOA-glc, mimicked chitosan-induced callose. Hence, DIMBOA functions as a defense regulatory signal in maize innate immunity, which acts in addition to its well-characterized activity as a biocidal defense metabolite.

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Determining links between plant defence strategies is important to understand plant evolution and to optimize crop breeding strategies. Although several examples of synergies and trade-offs between defence traits are known for plants that are under attack by multiple organisms, few studies have attempted to measure correlations of defensive strategies using specific single attackers. Such links are hard to detect in natural populations because they are inherently confounded by the evolutionary history of different ecotypes. We therefore used a range of 20 maize inbred lines with considerable differences in resistance traits to determine if correlations exist between leaf and root resistance against pathogens and insects. Aboveground resistance against insects was positively correlated with the plant's capacity to produce volatiles in response to insect attack. Resistance to herbivores and resistance to a pathogen, on the other hand, were negatively correlated. Our results also give first insights into the intraspecific variability of root volatiles release in maize and its positive correlation with leaf volatile production. We show that the breeding history of the different genotypes (dent versus flint) has influenced several defensive parameters. Taken together, our study demonstrates the importance of genetically determined synergies and trade-offs for plant resistance against insects and pathogens.

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Plants activate local and systemic defence mechanisms upon exposure to stress. This innate immune response is partially regulated by plant hormones, and involves the accumulation of defensive metabolites. Although local defence reactions to herbivores are well studied, less is known about the impact of root herbivory on shoot defence. Here, we examined the effects of belowground infestation by the western corn rootworm Diabrotica virgifera virgifera on aboveground resistance in maize. Belowground herbivory by D. v. virgifera induced aboveground resistance against the generalist herbivore Spodoptera littoralis, and the necrotrophic pathogen Setosphaeria turcica. Furthermore, D. v. virgifera increased shoot levels of 2,4-dihydroxy-7-methoxy-1,4-benzoxazin-3-one (DIMBOA), and primed the induction of chlorogenic acid upon subsequent infestation by S. littoralis. To gain insight into the signalling network behind this below- and aboveground defence interaction, we compiled a set of 32 defence-related genes, which can be used as transcriptional marker systems to detect activities of different hormone-response pathways. Belowground attack by D. v. virgifera triggered an ABA-inducible transcription pattern in the shoot. The quantification of defence hormones showed a local increase in the production of oxylipins after root and shoot infestation by D. v. virgifera and S. littoralis, respectively. On the other hand, ABA accumulated locally and systemically upon belowground attack by D. v. virgifera. Furthermore, D. v. virgifera reduced the aboveground water content, whereas the removal of similar quantities of root biomass had no effect. Our study shows that root herbivory by D. v. virgifera specifically alters the aboveground defence status of a maize, and suggests that ABA plays a role in the signalling network mediating this interaction.

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One hypothesis for the success of invasive species is reduced pathogen burden, resulting from a release from infections or high immunological fitness (low immunopathology) of invaders. Despite of strong selection exerted on the host, the evolutionary response of invaders to newly acquired pathogens has rarely been considered. The two independent and genetically distinct invasions of the Pacific oyster Crassostrea gigas into the North Sea represent an ideal model system to study fast evolutionary responses of invasive populations. By exposing both invasion sources to ubiquitous and phylogenetically diverse pathogens (Vibrio spp.) we demonstrate that within a few generations hosts adapted to sympatric pathogen communities. However, this local adaptation only became apparent in selective environments, i.e. at elevated temperatures reflecting patterns of disease outbreaks in natural populations. Resistance against sympatric and allopatric Vibrio spp. strains was dominantly inherited in crosses between both invasion sources, resulting in an overall higher resistance of admixed individuals than pure lines. Therefore we suggest that a simple genetic resistance mechanism of the host is matched to a common virulence mechanism shared by local Vibrio strains. This combination might have facilitated a fast evolutionary response that can explain another dimension of why invasive species can be so successful in newly invaded ranges.

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Esta tesis doctoral se centra principalmente en técnicas de ataque y contramedidas relacionadas con ataques de canal lateral (SCA por sus siglas en inglés), que han sido propuestas dentro del campo de investigación académica desde hace 17 años. Las investigaciones relacionadas han experimentado un notable crecimiento en las últimas décadas, mientras que los diseños enfocados en la protección sólida y eficaz contra dichos ataques aún se mantienen como un tema de investigación abierto, en el que se necesitan iniciativas más confiables para la protección de la información persona de empresa y de datos nacionales. El primer uso documentado de codificación secreta se remonta a alrededor de 1700 B.C., cuando los jeroglíficos del antiguo Egipto eran descritos en las inscripciones. La seguridad de la información siempre ha supuesto un factor clave en la transmisión de datos relacionados con inteligencia diplomática o militar. Debido a la evolución rápida de las técnicas modernas de comunicación, soluciones de cifrado se incorporaron por primera vez para garantizar la seguridad, integridad y confidencialidad de los contextos de transmisión a través de cables sin seguridad o medios inalámbricos. Debido a las restricciones de potencia de cálculo antes de la era del ordenador, la técnica de cifrado simple era un método más que suficiente para ocultar la información. Sin embargo, algunas vulnerabilidades algorítmicas pueden ser explotadas para restaurar la regla de codificación sin mucho esfuerzo. Esto ha motivado nuevas investigaciones en el área de la criptografía, con el fin de proteger el sistema de información ante sofisticados algoritmos. Con la invención de los ordenadores se ha acelerado en gran medida la implementación de criptografía segura, que ofrece resistencia eficiente encaminada a obtener mayores capacidades de computación altamente reforzadas. Igualmente, sofisticados cripto-análisis han impulsado las tecnologías de computación. Hoy en día, el mundo de la información ha estado involucrado con el campo de la criptografía, enfocada a proteger cualquier campo a través de diversas soluciones de cifrado. Estos enfoques se han fortalecido debido a la unificación optimizada de teorías matemáticas modernas y prácticas eficaces de hardware, siendo posible su implementación en varias plataformas (microprocesador, ASIC, FPGA, etc.). Las necesidades y requisitos de seguridad en la industria son las principales métricas de conducción en el diseño electrónico, con el objetivo de promover la fabricación de productos de gran alcance sin sacrificar la seguridad de los clientes. Sin embargo, una vulnerabilidad en la implementación práctica encontrada por el Prof. Paul Kocher, et al en 1996 implica que un circuito digital es inherentemente vulnerable a un ataque no convencional, lo cual fue nombrado posteriormente como ataque de canal lateral, debido a su fuente de análisis. Sin embargo, algunas críticas sobre los algoritmos criptográficos teóricamente seguros surgieron casi inmediatamente después de este descubrimiento. En este sentido, los circuitos digitales consisten típicamente en un gran número de celdas lógicas fundamentales (como MOS - Metal Oxide Semiconductor), construido sobre un sustrato de silicio durante la fabricación. La lógica de los circuitos se realiza en función de las innumerables conmutaciones de estas células. Este mecanismo provoca inevitablemente cierta emanación física especial que puede ser medida y correlacionada con el comportamiento interno del circuito. SCA se puede utilizar para revelar datos confidenciales (por ejemplo, la criptografía de claves), analizar la arquitectura lógica, el tiempo e incluso inyectar fallos malintencionados a los circuitos que se implementan en sistemas embebidos, como FPGAs, ASICs, o tarjetas inteligentes. Mediante el uso de la comparación de correlación entre la cantidad de fuga estimada y las fugas medidas de forma real, información confidencial puede ser reconstruida en mucho menos tiempo y computación. Para ser precisos, SCA básicamente cubre una amplia gama de tipos de ataques, como los análisis de consumo de energía y radiación ElectroMagnética (EM). Ambos se basan en análisis estadístico y, por lo tanto, requieren numerosas muestras. Los algoritmos de cifrado no están intrínsecamente preparados para ser resistentes ante SCA. Es por ello que se hace necesario durante la implementación de circuitos integrar medidas que permitan camuflar las fugas a través de "canales laterales". Las medidas contra SCA están evolucionando junto con el desarrollo de nuevas técnicas de ataque, así como la continua mejora de los dispositivos electrónicos. Las características físicas requieren contramedidas sobre la capa física, que generalmente se pueden clasificar en soluciones intrínsecas y extrínsecas. Contramedidas extrínsecas se ejecutan para confundir la fuente de ataque mediante la integración de ruido o mala alineación de la actividad interna. Comparativamente, las contramedidas intrínsecas están integradas en el propio algoritmo, para modificar la aplicación con el fin de minimizar las fugas medibles, o incluso hacer que dichas fugas no puedan ser medibles. Ocultación y Enmascaramiento son dos técnicas típicas incluidas en esta categoría. Concretamente, el enmascaramiento se aplica a nivel algorítmico, para alterar los datos intermedios sensibles con una máscara de manera reversible. A diferencia del enmascaramiento lineal, las operaciones no lineales que ampliamente existen en criptografías modernas son difíciles de enmascarar. Dicho método de ocultación, que ha sido verificado como una solución efectiva, comprende principalmente la codificación en doble carril, que está ideado especialmente para aplanar o eliminar la fuga dependiente de dato en potencia o en EM. En esta tesis doctoral, además de la descripción de las metodologías de ataque, se han dedicado grandes esfuerzos sobre la estructura del prototipo de la lógica propuesta, con el fin de realizar investigaciones enfocadas a la seguridad sobre contramedidas de arquitectura a nivel lógico. Una característica de SCA reside en el formato de las fuentes de fugas. Un típico ataque de canal lateral se refiere al análisis basado en la potencia, donde la capacidad fundamental del transistor MOS y otras capacidades parásitas son las fuentes esenciales de fugas. Por lo tanto, una lógica robusta resistente a SCA debe eliminar o mitigar las fugas de estas micro-unidades, como las puertas lógicas básicas, los puertos I/O y las rutas. Las herramientas EDA proporcionadas por los vendedores manipulan la lógica desde un nivel más alto, en lugar de realizarlo desde el nivel de puerta, donde las fugas de canal lateral se manifiestan. Por lo tanto, las implementaciones clásicas apenas satisfacen estas necesidades e inevitablemente atrofian el prototipo. Por todo ello, la implementación de un esquema de diseño personalizado y flexible ha de ser tomado en cuenta. En esta tesis se presenta el diseño y la implementación de una lógica innovadora para contrarrestar SCA, en la que se abordan 3 aspectos fundamentales: I. Se basa en ocultar la estrategia sobre el circuito en doble carril a nivel de puerta para obtener dinámicamente el equilibrio de las fugas en las capas inferiores; II. Esta lógica explota las características de la arquitectura de las FPGAs, para reducir al mínimo el gasto de recursos en la implementación; III. Se apoya en un conjunto de herramientas asistentes personalizadas, incorporadas al flujo genérico de diseño sobre FPGAs, con el fin de manipular los circuitos de forma automática. El kit de herramientas de diseño automático es compatible con la lógica de doble carril propuesta, para facilitar la aplicación práctica sobre la familia de FPGA del fabricante Xilinx. En este sentido, la metodología y las herramientas son flexibles para ser extendido a una amplia gama de aplicaciones en las que se desean obtener restricciones mucho más rígidas y sofisticadas a nivel de puerta o rutado. En esta tesis se realiza un gran esfuerzo para facilitar el proceso de implementación y reparación de lógica de doble carril genérica. La viabilidad de las soluciones propuestas es validada mediante la selección de algoritmos criptográficos ampliamente utilizados, y su evaluación exhaustiva en comparación con soluciones anteriores. Todas las propuestas están respaldadas eficazmente a través de ataques experimentales con el fin de validar las ventajas de seguridad del sistema. El presente trabajo de investigación tiene la intención de cerrar la brecha entre las barreras de implementación y la aplicación efectiva de lógica de doble carril. En esencia, a lo largo de esta tesis se describirá un conjunto de herramientas de implementación para FPGAs que se han desarrollado para trabajar junto con el flujo de diseño genérico de las mismas, con el fin de lograr crear de forma innovadora la lógica de doble carril. Un nuevo enfoque en el ámbito de la seguridad en el cifrado se propone para obtener personalización, automatización y flexibilidad en el prototipo de circuito de bajo nivel con granularidad fina. Las principales contribuciones del presente trabajo de investigación se resumen brevemente a continuación: Lógica de Precharge Absorbed-DPL logic: El uso de la conversión de netlist para reservar LUTs libres para ejecutar la señal de precharge y Ex en una lógica DPL. Posicionamiento entrelazado Row-crossed con pares idénticos de rutado en redes de doble carril, lo que ayuda a aumentar la resistencia frente a la medición EM selectiva y mitigar los impactos de las variaciones de proceso. Ejecución personalizada y herramientas de conversión automática para la generación de redes idénticas para la lógica de doble carril propuesta. (a) Para detectar y reparar conflictos en las conexiones; (b) Detectar y reparar las rutas asimétricas. (c) Para ser utilizado en otras lógicas donde se requiere un control estricto de las interconexiones en aplicaciones basadas en Xilinx. Plataforma CPA de pruebas personalizadas para el análisis de EM y potencia, incluyendo la construcción de dicha plataforma, el método de medición y análisis de los ataques. Análisis de tiempos para cuantificar los niveles de seguridad. División de Seguridad en la conversión parcial de un sistema de cifrado complejo para reducir los costes de la protección. Prueba de concepto de un sistema de calefacción auto-adaptativo para mitigar los impactos eléctricos debido a la variación del proceso de silicio de manera dinámica. La presente tesis doctoral se encuentra organizada tal y como se detalla a continuación: En el capítulo 1 se abordan los fundamentos de los ataques de canal lateral, que abarca desde conceptos básicos de teoría de modelos de análisis, además de la implementación de la plataforma y la ejecución de los ataques. En el capítulo 2 se incluyen las estrategias de resistencia SCA contra los ataques de potencia diferencial y de EM. Además de ello, en este capítulo se propone una lógica en doble carril compacta y segura como contribución de gran relevancia, así como también se presentará la transformación lógica basada en un diseño a nivel de puerta. Por otra parte, en el Capítulo 3 se abordan los desafíos relacionados con la implementación de lógica en doble carril genérica. Así mismo, se describirá un flujo de diseño personalizado para resolver los problemas de aplicación junto con una herramienta de desarrollo automático de aplicaciones propuesta, para mitigar las barreras de diseño y facilitar los procesos. En el capítulo 4 se describe de forma detallada la elaboración e implementación de las herramientas propuestas. Por otra parte, la verificación y validaciones de seguridad de la lógica propuesta, así como un sofisticado experimento de verificación de la seguridad del rutado, se describen en el capítulo 5. Por último, un resumen de las conclusiones de la tesis y las perspectivas como líneas futuras se incluyen en el capítulo 6. Con el fin de profundizar en el contenido de la tesis doctoral, cada capítulo se describe de forma más detallada a continuación: En el capítulo 1 se introduce plataforma de implementación hardware además las teorías básicas de ataque de canal lateral, y contiene principalmente: (a) La arquitectura genérica y las características de la FPGA a utilizar, en particular la Xilinx Virtex-5; (b) El algoritmo de cifrado seleccionado (un módulo comercial Advanced Encryption Standard (AES)); (c) Los elementos esenciales de los métodos de canal lateral, que permiten revelar las fugas de disipación correlacionadas con los comportamientos internos; y el método para recuperar esta relación entre las fluctuaciones físicas en los rastros de canal lateral y los datos internos procesados; (d) Las configuraciones de las plataformas de pruebas de potencia / EM abarcadas dentro de la presente tesis. El contenido de esta tesis se amplia y profundiza a partir del capítulo 2, en el cual se abordan varios aspectos claves. En primer lugar, el principio de protección de la compensación dinámica de la lógica genérica de precarga de doble carril (Dual-rail Precharge Logic-DPL) se explica mediante la descripción de los elementos compensados a nivel de puerta. En segundo lugar, la lógica PA-DPL es propuesta como aportación original, detallando el protocolo de la lógica y un caso de aplicación. En tercer lugar, dos flujos de diseño personalizados se muestran para realizar la conversión de doble carril. Junto con ello, se aclaran las definiciones técnicas relacionadas con la manipulación por encima de la netlist a nivel de LUT. Finalmente, una breve discusión sobre el proceso global se aborda en la parte final del capítulo. El Capítulo 3 estudia los principales retos durante la implementación de DPLs en FPGAs. El nivel de seguridad de las soluciones de resistencia a SCA encontradas en el estado del arte se ha degenerado debido a las barreras de implantación a través de herramientas EDA convencionales. En el escenario de la arquitectura FPGA estudiada, se discuten los problemas de los formatos de doble carril, impactos parásitos, sesgo tecnológico y la viabilidad de implementación. De acuerdo con estas elaboraciones, se plantean dos problemas: Cómo implementar la lógica propuesta sin penalizar los niveles de seguridad, y cómo manipular un gran número de celdas y automatizar el proceso. El PA-DPL propuesto en el capítulo 2 se valida con una serie de iniciativas, desde características estructurales como doble carril entrelazado o redes de rutado clonadas, hasta los métodos de aplicación tales como las herramientas de personalización y automatización de EDA. Por otra parte, un sistema de calefacción auto-adaptativo es representado y aplicado a una lógica de doble núcleo, con el fin de ajustar alternativamente la temperatura local para equilibrar los impactos negativos de la variación del proceso durante la operación en tiempo real. El capítulo 4 se centra en los detalles de la implementación del kit de herramientas. Desarrollado sobre una API third-party, el kit de herramientas personalizado es capaz de manipular los elementos de la lógica de circuito post P&R ncd (una versión binaria ilegible del xdl) convertido al formato XDL Xilinx. El mecanismo y razón de ser del conjunto de instrumentos propuestos son cuidadosamente descritos, que cubre la detección de enrutamiento y los enfoques para la reparación. El conjunto de herramientas desarrollado tiene como objetivo lograr redes de enrutamiento estrictamente idénticos para la lógica de doble carril, tanto para posicionamiento separado como para el entrelazado. Este capítulo particularmente especifica las bases técnicas para apoyar las implementaciones en los dispositivos de Xilinx y su flexibilidad para ser utilizado sobre otras aplicaciones. El capítulo 5 se enfoca en la aplicación de los casos de estudio para la validación de los grados de seguridad de la lógica propuesta. Se discuten los problemas técnicos detallados durante la ejecución y algunas nuevas técnicas de implementación. (a) Se discute el impacto en el proceso de posicionamiento de la lógica utilizando el kit de herramientas propuesto. Diferentes esquemas de implementación, tomando en cuenta la optimización global en seguridad y coste, se verifican con los experimentos con el fin de encontrar los planes de posicionamiento y reparación optimizados; (b) las validaciones de seguridad se realizan con los métodos de correlación y análisis de tiempo; (c) Una táctica asintótica se aplica a un núcleo AES sobre BCDL estructurado para validar de forma sofisticada el impacto de enrutamiento sobre métricas de seguridad; (d) Los resultados preliminares utilizando el sistema de calefacción auto-adaptativa sobre la variación del proceso son mostrados; (e) Se introduce una aplicación práctica de las herramientas para un diseño de cifrado completa. Capítulo 6 incluye el resumen general del trabajo presentado dentro de esta tesis doctoral. Por último, una breve perspectiva del trabajo futuro se expone, lo que puede ampliar el potencial de utilización de las contribuciones de esta tesis a un alcance más allá de los dominios de la criptografía en FPGAs. ABSTRACT This PhD thesis mainly concentrates on countermeasure techniques related to the Side Channel Attack (SCA), which has been put forward to academic exploitations since 17 years ago. The related research has seen a remarkable growth in the past decades, while the design of solid and efficient protection still curiously remain as an open research topic where more reliable initiatives are required for personal information privacy, enterprise and national data protections. The earliest documented usage of secret code can be traced back to around 1700 B.C., when the hieroglyphs in ancient Egypt are scribed in inscriptions. Information security always gained serious attention from diplomatic or military intelligence transmission. Due to the rapid evolvement of modern communication technique, crypto solution was first incorporated by electronic signal to ensure the confidentiality, integrity, availability, authenticity and non-repudiation of the transmitted contexts over unsecure cable or wireless channels. Restricted to the computation power before computer era, simple encryption tricks were practically sufficient to conceal information. However, algorithmic vulnerabilities can be excavated to restore the encoding rules with affordable efforts. This fact motivated the development of modern cryptography, aiming at guarding information system by complex and advanced algorithms. The appearance of computers has greatly pushed forward the invention of robust cryptographies, which efficiently offers resistance relying on highly strengthened computing capabilities. Likewise, advanced cryptanalysis has greatly driven the computing technologies in turn. Nowadays, the information world has been involved into a crypto world, protecting any fields by pervasive crypto solutions. These approaches are strong because of the optimized mergence between modern mathematical theories and effective hardware practices, being capable of implement crypto theories into various platforms (microprocessor, ASIC, FPGA, etc). Security needs from industries are actually the major driving metrics in electronic design, aiming at promoting the construction of systems with high performance without sacrificing security. Yet a vulnerability in practical implementation found by Prof. Paul Kocher, et al in 1996 implies that modern digital circuits are inherently vulnerable to an unconventional attack approach, which was named as side-channel attack since then from its analysis source. Critical suspicions to theoretically sound modern crypto algorithms surfaced almost immediately after this discovery. To be specifically, digital circuits typically consist of a great number of essential logic elements (as MOS - Metal Oxide Semiconductor), built upon a silicon substrate during the fabrication. Circuit logic is realized relying on the countless switch actions of these cells. This mechanism inevitably results in featured physical emanation that can be properly measured and correlated with internal circuit behaviors. SCAs can be used to reveal the confidential data (e.g. crypto-key), analyze the logic architecture, timing and even inject malicious faults to the circuits that are implemented in hardware system, like FPGA, ASIC, smart Card. Using various comparison solutions between the predicted leakage quantity and the measured leakage, secrets can be reconstructed at much less expense of time and computation. To be precisely, SCA basically encloses a wide range of attack types, typically as the analyses of power consumption or electromagnetic (EM) radiation. Both of them rely on statistical analyses, and hence require a number of samples. The crypto algorithms are not intrinsically fortified with SCA-resistance. Because of the severity, much attention has to be taken into the implementation so as to assemble countermeasures to camouflage the leakages via "side channels". Countermeasures against SCA are evolving along with the development of attack techniques. The physical characteristics requires countermeasures over physical layer, which can be generally classified into intrinsic and extrinsic vectors. Extrinsic countermeasures are executed to confuse the attacker by integrating noise, misalignment to the intra activities. Comparatively, intrinsic countermeasures are built into the algorithm itself, to modify the implementation for minimizing the measurable leakage, or making them not sensitive any more. Hiding and Masking are two typical techniques in this category. Concretely, masking applies to the algorithmic level, to alter the sensitive intermediate values with a mask in reversible ways. Unlike the linear masking, non-linear operations that widely exist in modern cryptographies are difficult to be masked. Approved to be an effective counter solution, hiding method mainly mentions dual-rail logic, which is specially devised for flattening or removing the data-dependent leakage in power or EM signatures. In this thesis, apart from the context describing the attack methodologies, efforts have also been dedicated to logic prototype, to mount extensive security investigations to countermeasures on logic-level. A characteristic of SCA resides on the format of leak sources. Typical side-channel attack concerns the power based analysis, where the fundamental capacitance from MOS transistors and other parasitic capacitances are the essential leak sources. Hence, a robust SCA-resistant logic must eliminate or mitigate the leakages from these micro units, such as basic logic gates, I/O ports and routings. The vendor provided EDA tools manipulate the logic from a higher behavioral-level, rather than the lower gate-level where side-channel leakage is generated. So, the classical implementations barely satisfy these needs and inevitably stunt the prototype. In this case, a customized and flexible design scheme is appealing to be devised. This thesis profiles an innovative logic style to counter SCA, which mainly addresses three major aspects: I. The proposed logic is based on the hiding strategy over gate-level dual-rail style to dynamically overbalance side-channel leakage from lower circuit layer; II. This logic exploits architectural features of modern FPGAs, to minimize the implementation expenses; III. It is supported by a set of assistant custom tools, incorporated by the generic FPGA design flow, to have circuit manipulations in an automatic manner. The automatic design toolkit supports the proposed dual-rail logic, facilitating the practical implementation on Xilinx FPGA families. While the methodologies and the tools are flexible to be expanded to a wide range of applications where rigid and sophisticated gate- or routing- constraints are desired. In this thesis a great effort is done to streamline the implementation workflow of generic dual-rail logic. The feasibility of the proposed solutions is validated by selected and widely used crypto algorithm, for thorough and fair evaluation w.r.t. prior solutions. All the proposals are effectively verified by security experiments. The presented research work attempts to solve the implementation troubles. The essence that will be formalized along this thesis is that a customized execution toolkit for modern FPGA systems is developed to work together with the generic FPGA design flow for creating innovative dual-rail logic. A method in crypto security area is constructed to obtain customization, automation and flexibility in low-level circuit prototype with fine-granularity in intractable routings. Main contributions of the presented work are summarized next: Precharge Absorbed-DPL logic: Using the netlist conversion to reserve free LUT inputs to execute the Precharge and Ex signal in a dual-rail logic style. A row-crossed interleaved placement method with identical routing pairs in dual-rail networks, which helps to increase the resistance against selective EM measurement and mitigate the impacts from process variations. Customized execution and automatic transformation tools for producing identical networks for the proposed dual-rail logic. (a) To detect and repair the conflict nets; (b) To detect and repair the asymmetric nets. (c) To be used in other logics where strict network control is required in Xilinx scenario. Customized correlation analysis testbed for EM and power attacks, including the platform construction, measurement method and attack analysis. A timing analysis based method for quantifying the security grades. A methodology of security partitions of complex crypto systems for reducing the protection cost. A proof-of-concept self-adaptive heating system to mitigate electrical impacts over process variations in dynamic dual-rail compensation manner. The thesis chapters are organized as follows: Chapter 1 discusses the side-channel attack fundamentals, which covers from theoretic basics to analysis models, and further to platform setup and attack execution. Chapter 2 centers to SCA-resistant strategies against generic power and EM attacks. In this chapter, a major contribution, a compact and secure dual-rail logic style, will be originally proposed. The logic transformation based on bottom-layer design will be presented. Chapter 3 is scheduled to elaborate the implementation challenges of generic dual-rail styles. A customized design flow to solve the implementation problems will be described along with a self-developed automatic implementation toolkit, for mitigating the design barriers and facilitating the processes. Chapter 4 will originally elaborate the tool specifics and construction details. The implementation case studies and security validations for the proposed logic style, as well as a sophisticated routing verification experiment, will be described in Chapter 5. Finally, a summary of thesis conclusions and perspectives for future work are included in Chapter 5. To better exhibit the thesis contents, each chapter is further described next: Chapter 1 provides the introduction of hardware implementation testbed and side-channel attack fundamentals, and mainly contains: (a) The FPGA generic architecture and device features, particularly of Virtex-5 FPGA; (b) The selected crypto algorithm - a commercially and extensively used Advanced Encryption Standard (AES) module - is detailed; (c) The essentials of Side-Channel methods are profiled. It reveals the correlated dissipation leakage to the internal behaviors, and the method to recover this relationship between the physical fluctuations in side-channel traces and the intra processed data; (d) The setups of the power/EM testing platforms enclosed inside the thesis work are given. The content of this thesis is expanded and deepened from chapter 2, which is divided into several aspects. First, the protection principle of dynamic compensation of the generic dual-rail precharge logic is explained by describing the compensated gate-level elements. Second, the novel DPL is originally proposed by detailing the logic protocol and an implementation case study. Third, a couple of custom workflows are shown next for realizing the rail conversion. Meanwhile, the technical definitions that are about to be manipulated above LUT-level netlist are clarified. A brief discussion about the batched process is given in the final part. Chapter 3 studies the implementation challenges of DPLs in FPGAs. The security level of state-of-the-art SCA-resistant solutions are decreased due to the implementation barriers using conventional EDA tools. In the studied FPGA scenario, problems are discussed from dual-rail format, parasitic impact, technological bias and implementation feasibility. According to these elaborations, two problems arise: How to implement the proposed logic without crippling the security level; and How to manipulate a large number of cells and automate the transformation. The proposed PA-DPL in chapter 2 is legalized with a series of initiatives, from structures to implementation methods. Furthermore, a self-adaptive heating system is depicted and implemented to a dual-core logic, assumed to alternatively adjust local temperature for balancing the negative impacts from silicon technological biases on real-time. Chapter 4 centers to the toolkit system. Built upon a third-party Application Program Interface (API) library, the customized toolkit is able to manipulate the logic elements from post P&R circuit (an unreadable binary version of the xdl one) converted to Xilinx xdl format. The mechanism and rationale of the proposed toolkit are carefully convoyed, covering the routing detection and repairing approaches. The developed toolkit aims to achieve very strictly identical routing networks for dual-rail logic both for separate and interleaved placement. This chapter particularly specifies the technical essentials to support the implementations in Xilinx devices and the flexibility to be expanded to other applications. Chapter 5 focuses on the implementation of the case studies for validating the security grades of the proposed logic style from the proposed toolkit. Comprehensive implementation techniques are discussed. (a) The placement impacts using the proposed toolkit are discussed. Different execution schemes, considering the global optimization in security and cost, are verified with experiments so as to find the optimized placement and repair schemes; (b) Security validations are realized with correlation, timing methods; (c) A systematic method is applied to a BCDL structured module to validate the routing impact over security metric; (d) The preliminary results using the self-adaptive heating system over process variation is given; (e) A practical implementation of the proposed toolkit to a large design is introduced. Chapter 6 includes the general summary of the complete work presented inside this thesis. Finally, a brief perspective for the future work is drawn which might expand the potential utilization of the thesis contributions to a wider range of implementation domains beyond cryptography on FPGAs.

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Conventional dual-rail precharge logic suffers from difficult implementations of dual-rail structure for obtaining strict compensation between the counterpart rails. As a light-weight and high-speed dual-rail style, balanced cell-based dual-rail logic (BCDL) uses synchronised compound gates with global precharge signal to provide high resistance against differential power or electromagnetic analyses. BCDL can be realised from generic field programmable gate array (FPGA) design flows with constraints. However, routings still exist as concerns because of the deficient flexibility on routing control, which unfavourably results in bias between complementary nets in security-sensitive parts. In this article, based on a routing repair technique, novel verifications towards routing effect are presented. An 8 bit simplified advanced encryption processing (AES)-co-processor is executed that is constructed on block random access memory (RAM)-based BCDL in Xilinx Virtex-5 FPGAs. Since imbalanced routing are major defects in BCDL, the authors can rule out other influences and fairly quantify the security variants. A series of asymptotic correlation electromagnetic (EM) analyses are launched towards a group of circuits with consecutive routing schemes to be able to verify routing impact on side channel analyses. After repairing the non-identical routings, Mutual information analyses are executed to further validate the concrete security increase obtained from identical routing pairs in BCDL.