934 resultados para VLSI architectures
Resumo:
Globalization is widely regarded as the rise of the borderless world. However in practice, true globalization points rather to a “spatial logic” by which globalization is manifested locally in the shape of insular space. Globalization in this sense is not merely about the creation of physical fragmentation of space but also the creation of social disintegration. This study tries to proof that global processes also create various forms of insular space leading also to specific social implications. In order to examine the problem this study looks at two cases: China’s Pearl River Delta (PRD) and Jakarta in Indonesia. The PRD case reveals three forms of insular space namely the modular, concealed and the hierarchical. The modular points to the form of enclosed factories where workers are vulnerable for human-right violations due to the absent of public control. The concealed refers to the production of insular space by subtle discrimination against certain social groups in urban space. And the hierarchical points to a production of insular space that is formed by an imbalanced population flow. The Jakarta case attempts to show more types of insularity in relation to the complexity of a mega-city which is shaped by a culture of exclusion. Those are dormant and hollow insularity. The dormant refers to the genesis of insular– radical – community from a culture of resistance. The last type, the hollow, points to the process of making a “pseudo community” where sense of community is not really developed as well as weak social relationship with its surrounding. Although global process creates various expressions of territorial insularization, however, this study finds that the “line of flight” is always present, where the border of insularity is crossed. The PRD’s produces vernacular modernization done by peasants which is less likely to be controlled by the politics of insularization. In Jakarta, the culture of insularization causes urban informalities that have no space, neither spatially nor socially; hence their state of ephemerality continues as a tactic of place-making. This study argues that these crossings possess the potential for reconciling venue to defuse the power of insularity.
Resumo:
General-purpose computing devices allow us to (1) customize computation after fabrication and (2) conserve area by reusing expensive active circuitry for different functions in time. We define RP-space, a restricted domain of the general-purpose architectural space focussed on reconfigurable computing architectures. Two dominant features differentiate reconfigurable from special-purpose architectures and account for most of the area overhead associated with RP devices: (1) instructions which tell the device how to behave, and (2) flexible interconnect which supports task dependent dataflow between operations. We can characterize RP-space by the allocation and structure of these resources and compare the efficiencies of architectural points across broad application characteristics. Conventional FPGAs fall at one extreme end of this space and their efficiency ranges over two orders of magnitude across the space of application characteristics. Understanding RP-space and its consequences allows us to pick the best architecture for a task and to search for more robust design points in the space. Our DPGA, a fine- grained computing device which adds small, on-chip instruction memories to FPGAs is one such design point. For typical logic applications and finite- state machines, a DPGA can implement tasks in one-third the area of a traditional FPGA. TSFPGA, a variant of the DPGA which focuses on heavily time-switched interconnect, achieves circuit densities close to the DPGA, while reducing typical physical mapping times from hours to seconds. Rigid, fabrication-time organization of instruction resources significantly narrows the range of efficiency for conventional architectures. To avoid this performance brittleness, we developed MATRIX, the first architecture to defer the binding of instruction resources until run-time, allowing the application to organize resources according to its needs. Our focus MATRIX design point is based on an array of 8-bit ALU and register-file building blocks interconnected via a byte-wide network. With today's silicon, a single chip MATRIX array can deliver over 10 Gop/s (8-bit ops). On sample image processing tasks, we show that MATRIX yields 10-20x the computational density of conventional processors. Understanding the cost structure of RP-space helps us identify these intermediate architectural points and may provide useful insight more broadly in guiding our continual search for robust and efficient general-purpose computing structures.
Resumo:
Traditionally, we've focussed on the question of how to make a system easy to code the first time, or perhaps on how to ease the system's continued evolution. But if we look at life cycle costs, then we must conclude that the important question is how to make a system easy to operate. To do this we need to make it easy for the operators to see what's going on and to then manipulate the system so that it does what it is supposed to. This is a radically different criterion for success. What makes a computer system visible and controllable? This is a difficult question, but it's clear that today's modern operating systems with nearly 50 million source lines of code are neither. Strikingly, the MIT Lisp Machine and its commercial successors provided almost the same functionality as today's mainstream sytsems, but with only 1 Million lines of code. This paper is a retrospective examination of the features of the Lisp Machine hardware and software system. Our key claim is that by building the Object Abstraction into the lowest tiers of the system, great synergy and clarity were obtained. It is our hope that this is a lesson that can impact tomorrow's designs. We also speculate on how the spirit of the Lisp Machine could be extended to include a comprehensive access control model and how new layers of abstraction could further enrich this model.
Resumo:
It is well known that image processing requires a huge amount of computation, mainly at low level processing where the algorithms are dealing with a great number of data-pixel. One of the solutions to estimate motions involves detection of the correspondences between two images. For normalised correlation criteria, previous experiments shown that the result is not altered in presence of nonuniform illumination. Usually, hardware for motion estimation has been limited to simple correlation criteria. The main goal of this paper is to propose a VLSI architecture for motion estimation using a matching criteria more complex than Sum of Absolute Differences (SAD) criteria. Today hardware devices provide many facilities for the integration of more and more complex designs as well as the possibility to easily communicate with general purpose processors
Resumo:
The dibenzodioxatetraazamacrocycle [26]pbz(2)N(4)O(2) was characterised by single crystal X-ray diffraction and the protonation constants of this compound and the stability constants of its copper(II) and lead(II) complexes were determined by potentiometry in water at 298.2 K in 0.10 mol dm(-3) in KNO3. Mono- and dinuclear complexes were found for both metal ions, the dinuclear complexes being the main species in the 5-7.5 pH range for copper(II) and 7.5-8.5 for lead(II). As expected the values of the stability constants for the copper(II) complexes are lower than those for related macrocycles containing only nitrogen atoms. The presence of mono- and dinuclear copper complexes was also confirmed by electrospray ionization mass spectrometry. These results suggest that the symmetric macrocyclic cavity of [26]pbZ(2)N(4)O(2) has enough space for the coordination of two metal ions. Additionally, NMR spectroscopy showed that the dinuclear complex of lead(II) has high symmetry. The equilibrium constants of the dinuclear copper(II) complexes and dicarboxylate anions (oxalate, malonate and succinate) were also determined in 0.10 mol dm-3 aqueous KNO3 solution. Only species containing one anion, Cu(2)H(h)LA((2+h)), were found, strongly suggesting that the anion bridges the two copper(II) ions. The binding constants of the cascade species formed by [Cu-2[26]pbZ(2)N(4)O(2)(H2O)(4+) with dicarboxylate anions decrease with the increase in length of the alkyl chain of the anion, a fact which was attributed to a higher conformational energy necessary for the rearrangement of the macrocycle to accommodate the larger anions bridging the two copper(II) centres. The variation of the magnetic susceptibility with temperature Of [Cu-2(H-2[26]pbz(2)N(4)O(2))(oxa)(3)]-4H(2)O and [Cu-2([26]pbz(2)N(4)O(2))(suc)Cl-2] were measured and the two complexes showed different behaviour. (c) 2007 Elsevier Ltd. All rights reserved.
Resumo:
Two mononuclear complexes of manganese(II), [Mn(OCN)(2)(phen)(2)] 1 and [Mn(NCO)(2)(bpy)(2)] 2 [1,10-phenanthroline (phen); 2,2'-bipyridine (bpy)], have been synthesized and characterized by single crystal X-ray analysis, infra-red spectroscopy and magnetic studies. The coordination structure of complex 2 is already reported. The cyanate anions are pendent in both the complexes. In 1, cyanate anion links manganese(II) through O-atom, whereas in 2 it coordinates through N-atom. The mononuclear fragments of 1 are built up to a supramolecular lamellar 3D architecture by pi-pi interactions only. On the other hand, mononuclear fragments of 2 are assembled to a 2D supramolecular brick-wall architecture by C-H-... pi interactions.
Resumo:
This mini-review outlines recent key developments in the use of dendritic architectures in self-assembly processes via utilisation of molecular recognition motifs.
Resumo:
With the latest advances in the area of advanced computer architectures we are seeing already large scale machines at petascale level and we are discussing exascale computing. All these require efficient scalable algorithms in order to bridge the performance gap. In this paper examples of various approaches of designing scalable algorithms for such advanced architectures will be given and the corresponding properties of these algorithms will be outlined and discussed. Examples will outline such scalable algorithms applied to large scale problems in the area Computational Biology, Environmental Modelling etc. The key properties of such advanced and scalable algorithms will be outlined.
Resumo:
This paper deals with the key issues encountered in testing during the development of high-speed networking hardware systems by documenting a practical method for "real-life like" testing. The proposed method is empowered by modern and commonly available Field Programmable Gate Array (FPGA) technology. Innovative application of standard FPGA blocks in combination with reconfigurability are used as a back-bone of the method. A detailed elaboration of the method is given so as to serve as a general reference. The method is fully characterised and compared to alternatives through a case study proving it to be the most efficient and effective one at a reasonable cost.
Resumo:
A polystyrene-block-poly(ferrocenylethylmethylsilane) diblock copolymer, displaying a double-gyroid morphology when self-assembled in the solid state, has been prepared with a PFEMS volume fraction phi(PFMS)=0.39 and a total molecular weight of 64 000 Da by sequential living anionic polymerisation. A block copolymer with a metal-containing block with iron and silicon in the main chain was selected due to its plasma etch resistance compared to the organic block. Self-assembly of the diblock copolymer in the bulk showed a stable, double-gyroid morphology as characterised by TEM. SAXS confirmed that the structure belonged to the Ia3d space group.