193 resultados para Rahul Sankritayan
Resumo:
Glasses of the composition 2TeO(2)-V2O5 were fabricated via the conventional melt-quenching technique. The amorphous and the glassy nature of the as-quenched samples were confirmed by X-ray powder diffraction (XRD) and differential scanning calorimetry (DSC), respectively. The glass transition and crystallization parameters were evaluated under non-isothermal conditions using DSC. X-ray diffraction studies confirmed the presence of partially oriented crystallites in the heat-treated glasses. Kauzmann temperature (lower bound for the kinetically observed glass transition) was deduced from the heating rate dependent glass transition and crystallization temperatures.
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Encapsulated and hollow closed-cage onion-like structures of WS2 and MoS2 were prepared by laser ablation of the corresponding layered structures in argon atmosphere at four varied temperatures. A detailed study for WS2 indicates that only metal-filled onion-like structures are produced at temperatures Tless-than-or-equals, slant650°C, whereas a mixture of metal-filled and hollow structures are produced at Tgreater-or-equal, slanted850°C. The encapsulated metal is identified to be predominantly the metastable β phase of tungsten. Very short tube-like or elongated polyhedral structures are also obtained at high temperatures.
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Multiple Clock Domain processors provide an attractive solution to the increasingly challenging problems of clock distribution and power dissipation. They allow their chips to be partitioned into different clock domains, and each domain’s frequency (voltage) to be independently configured. This flexibility adds new dimensions to the Dynamic Voltage and Frequency Scaling problem, while providing better scope for saving energy and meeting performance demands. In this paper, we propose a compiler directed approach for MCD-DVFS. We build a formal petri net based program performance model, parameterized by settings of microarchitectural components and resource configurations, and integrate it with our compiler passes for frequency selection.Our model estimates the performance impact of a frequency setting, unlike the existing best techniques which rely on weaker indicators of domain performance such as queue occupancies(used by online methods) and slack manifestation for a particular frequency setting (software based methods).We evaluate our method with subsets of SPECFP2000,Mediabench and Mibench benchmarks. Our mean energy savings is 60.39% (versus 33.91% of the best software technique)in a memory constrained system for cache miss dominated benchmarks, and we meet the performance demands.Our ED2 improves by 22.11% (versus 18.34%) for other benchmarks. For a CPU with restricted frequency settings, our energy consumption is within 4.69% of the optimal.
INTACTE: An Interconnect Area, Delay, and Energy Estimation Tool for Microarchitectural Explorations
Resumo:
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters. Hence these models are hard to use directly to make high level microarchitectural trade-offs in the initial exploration phase of a design. In this paper, we propose INTACTE, a tool that can be used by architects toget reasonably accurate interconnect area, delay, and power estimates based on a few architecture level parameters for the interconnect such as length, width (in number of bits), frequency, and latency for a specified technology and voltage. The tool uses well known models of interconnect delay and energy taking into account the wire pitch, repeater size, and spacing for a range of voltages and technologies.It then solves an optimization problem of finding the lowest energy interconnect design in terms of the low level circuit parameters, which meets the architectural constraintsgiven as inputs. In addition, the tool also provides the area, energy, and delay for a range of supply voltages and degrees of pipelining, which can be used for micro-architectural exploration of a chip. The delay and energy models used by the tool have been validated against low level circuit simulations. We discuss several potential applications of the tool and present an example of optimizing interconnect design in the context of clustered VLIW architectures. Copyright 2007 ACM.
Resumo:
Frequent accesses to the register file make it one of the major sources of energy consumption in ILP architectures. The large number of functional units connected to a large unified register file in VLIW architectures make power dissipation in the register file even worse because of the need for a large number of ports. High power dissipation in a relatively smaller area occupied by a register file leads to a high power density in the register file and makes it one of the prime hot-spots. This makes it highly susceptible to the possibility of a catastrophic heatstroke. This in turn impacts the performance and cost because of the need for periodic cool down and sophisticated packaging and cooling techniques respectively. Clustered VLIW architectures partition the register file among clusters of functional units and reduce the number of ports required thereby reducing the power dissipation. However, we observe that the aggregate accesses to register files in clustered VLIW architectures (and associated energy consumption) become very high compared to the centralized VLIW architectures and this can be attributed to a large number of explicit inter-cluster communications. Snooping based clustered VLIW architectures provide very limited but very fast way of inter-cluster communication by allowing some of the functional units to directly read some of the operands from the register file of some of the other clusters. In this paper, we propose instruction scheduling algorithms that exploit the limited snooping capability to reduce the register file energy consumption on an average by 12% and 18% and improve the overall performance by 5% and 11% for a 2-clustered and a 4-clustered machine respectively, over an earlier state-of-the-art clustered scheduling algorithm when evaluated in the context of snooping based clustered VLIW architectures.
Resumo:
Miniaturization of devices and the ensuing decrease in the threshold voltage has led to a substantial increase in the leakage component of the total processor energy consumption. Relatively simpler issue logic and the presence of a large number of function units in the VLIW and the clustered VLIW architectures attribute a large fraction of this leakage energy consumption in the functional units. However, functional units are not fully utilized in the VLIW architectures because of the inherent variations in the ILP of the programs. This underutilization is even more pronounced in the context of clustered VLIW architectures because of the contentions for the limited number of slow intercluster communication channels which lead to many short idle cycles.In the past, some architectural schemes have been proposed to obtain leakage energy bene .ts by aggressively exploiting the idleness of functional units. However, presence of many short idle cycles cause frequent transitions from the active mode to the sleep mode and vice-versa and adversely a ffects the energy benefits of a purely hardware based scheme. In this paper, we propose and evaluate a compiler instruction scheduling algorithm that assist such a hardware based scheme in the context of VLIW and clustered VLIW architectures. The proposed scheme exploits the scheduling slacks of instructions to orchestrate the functional unit mapping with the objective of reducing the number of transitions in functional units thereby keeping them off for a longer duration. The proposed compiler-assisted scheme obtains a further 12% reduction of energy consumption of functional units with negligible performance degradation over a hardware-only scheme for a VLIW architecture. The benefits are 15% and 17% in the context of a 2-clustered and a 4-clustered VLIW architecture respectively. Our test bed uses the Trimaran compiler infrastructure.
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A novel PCR based assay was devised to specifically detect contamination of any Salmonella serovar in milk, fruit juice and ice-cream without pre-enrichment. This method utilizes primers against hilA gene which is conserved in all Salmonella serovars and absent from the close relatives of Salmonella. An optimized protocol, in terms time and money, is provided for the reduction of PCR contaminants from milk, ice-cream and juice through the use of routine laboratory chemicals. The simplicity, efficiency (time taken 3-4 h) and sensitivity (to about 5-10 CFU/ml) of this technique confers a unique advantage over other previously used time consuming detection techniques. This technique does not involve pre-enrichment of the samples or extensive sample processing, which was a pre-requisite in most of the other reported studies. Hence, this assay can be ideal for adoption, after further fine tuning, by food quality control for timely detection of Salmonella contamination as well as other food-borne pathogens (with species specific primers) in food especially milk, ice-cream and fruit juice. (C) 2011 Elsevier Ltd. All rights reserved.
Resumo:
We obtain, by extensive direct numerical simulations, time-dependent and equal-time structure functions for the vorticity, in both quasi-Lagrangian and Eulerian frames, for the direct-cascade regime in two-dimensional fluid turbulence with air-drag-induced friction. We show that different ways of extracting time scales from these time-dependent structure functions lead to different dynamic-multiscaling exponents, which are related to equal-time multiscaling exponents by different classes of bridge relations; for a representative value of the friction we verify that, given our error bars, these bridge relations hold.
Resumo:
X-ray powder diffraction along with differential thermal analysis carried out on the as-quenched samples in the 3BaO–3TiO2–B2O3 system confirmed their amorphous and glassy nature, respectively. The dielectric constants in the 1 kHz–1 MHz frequency range were measured as a function of temperature (323–748 K). The dielectric constant and loss were found to be frequency independent in the 323–473 K temperature range. The temperature coefficient of dielectric constant was estimated using Havinga’s formula and found to be 16 ppm K−1. The electrical relaxation was rationalized using the electric modulus formalism. The dielectric constant and loss were 17±0.5 and 0.005±0.001, respectively at 323 K in the 1 kHz–1 MHz frequency range which may be of considerable interest to capacitor industry.
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The frequency and temperature dependences of the dielectric constant and the electrical conductivity of the transparent glasses in the composition Li2O–3B2O3 were investigated in the 100 Hz–10 MHz frequency range. The dielectric constant and the loss in the low frequency regime were electrode material dependent. Dielectric and electrical relaxations were, respectively, analyzed using the Cole–Cole and electric modulus formalisms. The dielectric relaxation mechanism was discussed in the framework of electrode and charge carrier (hopping of the ions) related polarization using generalized Cole–Cole expression. The frequency dependent electrical conductivity was rationalized using Jonscher’s power law. The activation energy associated with the dc conductivity was 0.80±0.02 eV, which was ascribed to the motion of Li+ ions in the glass matrix. The activation energy associated with dielectric relaxation was almost equal to that of the dc conductivity, indicating that the same species took part in both the processes. Temperature dependent behavior of the frequency exponent (n) suggested that the correlated barrier hopping model was the most apposite to rationalize the electrical transport phenomenon in Li2O–3B2O3 glasses. These glasses on heating at 933 K/10 h resulted in the known nonlinear optical phase LiB3O5.
Resumo:
Transparent glasses in the system 3BaO–3TiO2–B2O3 (BTBO) were fabricated via the conventional melt-quenching technique. The as-quenched samples were confirmed to be non-crystalline by differential thermal analysis (DTA). Thermal parameters were evaluated using non-isothermal DTA experiments. The Kauzmann temperature was found to be 759 K based on heating-rate-dependent glass transition and crystallization temperatures. A theoretical relation for the temperature-dependent viscosity is proposed for these glasses and glass-ceramics.
Resumo:
Dendrimers are ideal platforms to study multivalent effects due to the presence of uniform end groups at their peripheries. This report concerns with a study of multivalent dendritic catalysts, both within and across dendrimer generations, and their effects to mediate C-C bond forming reactions on multivalent substrates that have two and three acrylate reactive sites. As many as fourteen multivalent dendritic catalysts were prepared using 0-3 generations of poly(propyl ether imine) dendrimers, incorporated with Pd(II) catalytic sites, both within and across the dendrimer generations. C-C Bond forming reactions of these substrates with iodobenzene, mediated by uniform concentration of the metal across all catalysts, showed formation of partially and fully functionalized cinnamates in varying ratios, depending on the extent of clustering of catalytic moieties at the peripheries of dendrimers within a dendrimer generation. In a given generation, higher clustering of catalytic moieties greatly assisted multiple C-C bond formations than presenting the same in lesser number. The studies demonstrate true benefits of clustering catalytic moieties within a dendrimer generation and the beneficial effects applicable to catalysis of substrates presenting more than one reactive center. (C) 2011 Elsevier B.V. All rights reserved.
Resumo:
We introduce ToleRace, a runtime system that allows programs to detect and even tolerate asymmetric data races. Asymmetric races are race conditions where one thread correctly acquires and releases a lock for a shared variable while another thread improperly accesses the same variable. ToleRace provides approximate isolation in the critical sections of lock-based parallel programs by creating a local copy of each shared variable when entering a critical section, operating on the local copies, and propagating the appropriate copies upon leaving the critical section. We start by characterizing all possible interleavings that can cause races and precisely describe the effect of ToleRace in each case. Then, we study the theoretical aspects of an oracle that knows exactly what type of interleaving has occurred. Finally, we present software implementations of ToleRace and evaluate them on multithreaded applications from the SPLASH2 and PARSEC suites.