Trench MOS-gated power devices

MOS gated power devices are now available for power switching applications with voltage blocking requirements up to 1 kV and current ratings up to 300A. This is due to the invention of the IGBT, a device in which MOS gate turn-on leads to minority carrier injection to modulate the high resistance drift region required for voltage blocking. The paper presents current technologies being developed in order to expand the applications of MOS gated power devices. Also explained is the available trench gate technology that can be used to fabricate power devices.

p-MOS controlled lateral thyristor: A MOS controllable thyristor suitable for integration

A novel CMOS compatible lateral thyristor is proposed in this paper. Its thyristor conduction is fully controlled by a p-MOS gate. Loss of MOS control due to parasitic latch-up has been eliminated and triggering of the main thyristor at lower forward current achieved. The device operation has been verified by 2-D numerical simulations and experimental fabrication.

MOS and bipolar gated thyristor: A thyristor with IGBT switching characteristics

The IGBT has become the device of choice in many high-voltage-power electronic applications, by virtue of combining the ease of MOS gate control with an acceptable forward voltage drop. However, designers have retained an interest in MOS gated thyristor structures which have a turn-off capability. These offer low on-state losses as a result of their latching behaviour. Recently, there have been various proposals for dual-gate devices that have a thyristor on-state with IGBT-like switching. Many of these dual gated structures rely on advanced MOS technology, with inherent manufacturing difficulties. The MOS and bipolar gated thyristor offers all the advantages of dual gated performance, while employing standard IGBT processing techniques. The paper describes the MBGT in detail, and presents experimental and simulation results for devices based on realistic commercial processes. It is shown that the MBGT represents a viable power semiconductor device technology, suitable for a diverse range of applications. © IEE, 1998.

Modeling of MOS-side carrier injection in trench-gate IGBTs

A compact trench-gate IGBT model that captures MOS-side carrier injection is developed. The model retains the simplicity of a one-dimensional solution to the ambipolar diffusion equation, but at the same time captures MOS-side carrier injection and its effects on steady-state carrier distribution in the drift region and on switching waveforms. © 2007 IEEE.

CHANGES IN PREDICTED MOS DEVICE CHARACTERISTICS DUE TO THE USE OF TWO DIMENSIONAL SOURCE/DRAIN PROFILES.

Two-dimensional MOS device simulation programs such as MINIMOS left bracket 1 right bracket are limited in their validity due to assumptions made in defining the initial two-dimensional source/drain profiles. The two options available to define source/drain regions both construct a two-dimensional profile from one-dimensional profiles normal to the surface. Inaccuracies in forming these source/drain profiles can be expected to effect predicted device characteristics as channel dimensions of the device are reduced. This paper examines these changes by interfacing numerically similated two dimensional source/drain profiles to MINIMOS and comparing predicted I//D-V//D characteristics with 2-D interfacing, 2-D profiles constructed from interfaced 1-D profiles and MINIMOS self generated profiles. Data obtained for simulations of 3 mu m N and P channel devices are presented.

Hydrogen sensor based on silicon carbide (SiC) MOS capacitor

Silicon carbide (SiC) based MOS capacitor devices are used for gas sensing in high temperature and chemically reactive environments. A SiC MOS capacitor structure used as hydrogen sensor is defined and simulated. The effects of hydrogen concentration, temperature and interface traps on C-V characteristics were analysed. A comparison between structures with different oxide layer types (SiO2, TiO2 and ZnO) and thicknesses (50..10nm) was conducted. The TiO2 based structure has better performance than the SiO2 and ZnO structures. Also, the performance of the SiC MOS capacitor increases at thinner oxide layers. © 2012 IEEE.

2.1 GHz MOS mixer linearisation approach for IIP2 enhancement using multiple factor compensation

An integrated downconversion CMOS mixer incorporating a comprehensive compensation scheme is presented which aims to minimise second-order intermodulation distortion (IMD2). Unlike previously reported IMD2 calibration schemes which tune only one nonlinear factor at a time, the presented solution allows simultaneous adjustment of several different factors thus achieving a better compensation. The mixer has been implemented in UMC 0.18 μm CMOS to verify the proposed scheme and for comparison with alternative compensation methods. Measurements show that the solution described can improve the input intercept point (IIP2) by over 20 dB while maintaining good amplification and noise performance. IMD2 calibration results are presented and show useful advantages over other approaches. To the best of the authors' knowledge, this scheme for IMD2 calibration has not been previously reported. © The Institution of Engineering and Technology 2013.