992 resultados para Hardware reconfigurable
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This paper presents an analysis of a reconfigurable patch filter based on a triple-mode circular patch resonator with four radial slots. The analysis has been carried out thanks to the development of a new theoretical approach of the tunable patch filter based on the coupling matrix. The coefficients of the coupling matrix related to the tunable behavior have been identified and some rules for their evolution have been derived. For a proof-of-concept, a bandpass filter has been designed with a continuous tunability obtained with varactors connected across the slots. State-of-the-art results have been obtained, with a frequency tuning range of 27% from 1.95 to 2.43 GHz and a change in fractional bandwidth from 8.5% to 31.5% for the respective frequencies. In the entire tuning range, the return loss is better than 10 dB and the maximum insertion loss is 2 dB. Due to the newly developed coupling matrix, measurements, simulations, and theory showed great agreement.
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This paper presents the design and implementation of an embedded soft sensor, i. e., a generic and autonomous hardware module, which can be applied to many complex plants, wherein a certain variable cannot be directly measured. It is implemented based on a fuzzy identification algorithm called ""Limited Rules"", employed to model continuous nonlinear processes. The fuzzy model has a Takagi-Sugeno-Kang structure and the premise parameters are defined based on the Fuzzy C-Means (FCM) clustering algorithm. The firmware contains the soft sensor and it runs online, estimating the target variable from other available variables. Tests have been performed using a simulated pH neutralization plant. The results of the embedded soft sensor have been considered satisfactory. A complete embedded inferential control system is also presented, including a soft sensor and a PID controller. (c) 2007, ISA. Published by Elsevier Ltd. All rights reserved.
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O trabalho descrito nesta dissertação de mestrado foca-se em geral na investigação de antenas impressas. São apresentados conceitos básicos, em conjunto com alguns exemplos desenvolvidos. No entanto, o principal foco prende-se com técnicas de miniaturização e reconfigurabilidade de antenas. A miniaturização de antenas é um tema de investigação de longa data, no entanto, novas técnicas e soluções são apresentadas regularmente. Nesta tese, é aplicada uma técnica recente, baseada na introdução de indutores encapsulados no elemento ressonante de uma antena, que permite miniaturizar um monopólio impresso com uma frequência de ressonância de 2.5 GHz. Outro assunto abordado neste trabalho é a reconfigurabilidade de antenas. Algumas das técnicas mais comuns na investigação actual são apresentadas e debatidas. Uma solução com recurso a díodos PIN é usada para estudar esta capacidade. Os conceitos e características deste tipo de componentes são apresentadas sendo feito o desenho e fabrico de um possível monopólio impresso reconfigurável para operação em dupla banda. Por fim, são combinadas as técnicas de miniaturização com inductor encapsulado e reconfigurabilidade através de díodos PIN, por forma a projectar uma antena reconfigurável muito pequena, para operação em duas bandas distintas. Os resultados são discutidos e com base nestes, algumas possíveis otimizações são propostas. The work reported in this dissertation is focused in the printed antenna research. Basic concepts of printed antennas are presented, along with a few examples that were developed. The main focus however, is around miniaturization and reconfigurability of antennas. Antenna miniaturization is a long time research subject, however, new techniques and solutions are presented everyday. In this thesis, a recent technique based on the introduction of chip inductors in the resonating element of a printed antenna is used in order to miniaturize a monopole with a resonating frequency at 2.5 GHz. Another issue approached in this work is antenna reconfigurability. Some common techniques used in antenna reconfiguration are presented and debated. A solution with PIN diodes is used to study this capability. The concepts and characteristics of this type of components are presented and an example of a reconfigurable printed monopole for dual-band operation is designed and fabricated. At last, miniaturization with chip inductor and reconfigurability through PIN diodes are used together to create a very small antenna for dual-band operation. The simulated and measured results are discussed and upon these, some possible optimizations are proposed.
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Since the last decade research in Group Decision Making area have been focus in the building of meeting rooms that could support the decision making task and improve the quality of those decisions. However the emergence of Ambient Intelligence concept contributes with a new perspective, a different way of viewing traditional decision rooms. In this paper we will present an overview of Smart Decision Rooms providing Intelligence to the meeting environment, and we will also present LAID, an Ambient Intelligence Environment oriented to support Group Decision Making and some of the software tools that we already have installed in this environment.
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WDM multilayered SiC/Si devices based on a-Si:H and a-SiC:H filter design are approached from a reconfigurable point of view. Results show that the devices, under appropriated optical bias, act as reconfigurable active filters that allow optical switching and optoelectronic logic functions development. Under front violet irradiation the magnitude of the red and green channels are amplified and the blue and violet reduced. Violet back irradiation cuts the red channel, slightly influences the magnitude of the green and blue ones and strongly amplifies de violet channel. This nonlinearity provides the possibility for selective removal of useless wavelengths. Particular attention is given to the amplification coefficient weights, which allow taking into account the wavelength background effects when a band needs to be filtered from a wider range of mixed signals, or when optical active filter gates are used to select and filter input signals to specific output ports in WDM communication systems. A truth table of an encoder that performs 8-to-1 multiplexer (MUX) function is presented.
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Multilayered heterostructures based on embedded a-Si:H and a-SiC:H p-i-n filters are analyzed from differential voltage design perspective using short- and long-pass filters. The transfer functions characteristics are presented. A numerical simulation is presented to explain the filtering properties of the photonic devices. Several monochromatic pulsed lights, separately (input channels) or in a polychromatic mixture (multiplexed signal) at different bit rates, illuminated the device. Steady-state optical bias is superimposed from the front and the back side. Results show that depending on the wavelength of the external background and impinging side, the device acts either as a short- or a long-pass band filter or as a band-stop filter. Particular attention is given to the amplification coefficient weights, which allow to take into account the wavelength background effects when a band or frequency needs to be filtered or the gate switch, in which optical active filter gates are used to select and filter input signals to specific output ports in wavelength division multiplexing (WDM) communication systems. This nonlinearity provides the possibility for selective removal or addition of wavelengths. A truth table of an encoder that performs 8-to-1 MUX function exemplifies the optoelectronic conversion.
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A crescente complexidade dos sistemas electrónicos associada a um desenvolvimento nas tecnologias de encapsulamento levou à miniaturização dos circuitos integrados, provocando dificuldades e limitações no diagnóstico e detecção de falhas, diminuindo drasticamente a aplicabilidade dos equipamentos ICT. Como forma de lidar com este problema surgiu a infra-estrutura Boundary Scan descrita na norma IEEE1149.1 “Test Access Port and Boundary-Scan Architecture”, aprovada em 1990. Sendo esta solução tecnicamente viável e interessante economicamente para o diagnóstico de defeitos, efectua também outras aplicações. O SVF surgiu do desejo de incutir e fazer com que os fornecedores independentes incluíssem a norma IEEE 1149.1, é desenvolvido num formato ASCII, com o objectivo de enviar sinais, aguardar pela sua resposta, segundo a máscara de dados baseada na norma IEEE1149.1. Actualmente a incorporação do Boundary Scan nos circuitos integrados está em grande expansão e consequentemente usufrui de uma forte implementação no mercado. Neste contexto o objectivo da dissertação é o desenvolvimento de um controlador boundary scan que implemente uma interface com o PC e possibilite o controlo e monitorização da aplicação de teste ao PCB. A arquitectura do controlador desenvolvido contém um módulo de Memória de entrada, um Controlador TAP e uma Memória de saída. A implementação do controlador foi feita através da utilização de uma FPGA, é um dispositivo lógico reconfiguráveis constituído por blocos lógicos e por uma rede de interligações, ambos configuráveis, que permitem ao utilizador implementar as mais variadas funções digitais. A utilização de uma FPGA tem a vantagem de permitir a versatilidade do controlador, facilidade na alteração do seu código e possibilidade de inserir mais controladores dentro da FPGA. Foi desenvolvido o protocolo de comunicação e sincronização entre os vários módulos, permitindo o controlo e monitorização dos estímulos enviados e recebidos ao PCB, executados automaticamente através do software do Controlador TAP e de acordo com a norma IEEE 1149.1. A solução proposta foi validada por simulação utilizando o simulador da Xilinx. Foram analisados todos os sinais que constituem o controlador e verificado o correcto funcionamento de todos os seus módulos. Esta solução executa todas as sequências pretendidas e necessárias (envio de estímulos) à realização dos testes ao PCB. Recebe e armazena os dados obtidos, enviando-os posteriormente para a memória de saída. A execução do trabalho permitiu concluir que os projectos de componentes electrónicos tenderão a ser descritos num nível de abstracção mais elevado, recorrendo cada vez mais ao uso de linguagens de hardware, no qual o VHDL é uma excelente ferramenta de programação. O controlador desenvolvido será uma ferramenta bastante útil e versátil para o teste de PCBs e outras funcionalidades disponibilizadas pelas infra-estruturas BS.
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Conferência: 39th Annual Conference of the IEEE Industrial-Electronics-Society (IECON), Vienna, Austria, Nov 10-14, 2013
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Relatório do Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia de Electrónica e Telecomunicações
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The Robuter is a robotic mobile platform that is located in the “Hands-On” Laboratory of the IPP-Hurray! Research Group, at the School of Engineering of the Polytechnic Institute of Porto. Recently, the Robuter was subject of an upgrading process addressing two essential areas: the Hardware Architecture and the Software Architecture. This upgrade in process was triggered due to technical problems on-board of the robot and also to the fact that the hardware/software architecture has become obsolete. This Technical Report overviews the most important aspects of the new Hardware and Software Architectures of the Robuter. This document also presents a first approach on the first steps towards the use of the Robuter platform, and provides some hints on future work that may be carried out using this mobile platform.
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Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para obtenção do grau de Mestre em Engenharia Electrotécnica e de Computadores
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Due to the application of active components into antennas these became a source of distortion on wireless communication systems. In this paper we explore the nonlinear effects occurring in a frequency reconfigurable antenna operating with a PIN Diode. We describe the measurement setup used to check the antenna intermodulation products and the measured compression and third order intermodulation limitations of a frequency reconfigurable antenna, operating at the UMTS and WLAN frequencies.
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Physical computing has spun a true global revolution in the way in which the digital interfaces with the real world. From bicycle jackets with turn signal lights to twitter-controlled christmas trees, the Do-it-Yourself (DiY) hardware movement has been driving endless innovations and stimulating an age of creative engineering. This ongoing (r)evolution has been led by popular electronics platforms such as the Arduino, the Lilypad, or the Raspberry Pi, however, these are not designed taking into account the specific requirements of biosignal acquisition. To date, the physiological computing community has been severely lacking a parallel to that found in the DiY electronics realm, especially in what concerns suitable hardware frameworks. In this paper, we build on previous work developed within our group, focusing on an all-in-one, low-cost, and modular biosignal acquisition hardware platform, that makes it quicker and easier to build biomedical devices. We describe the main design considerations, experimental evaluation and circuit characterization results, together with the results from a usability study performed with volunteers from multiple target user groups, namely health sciences and electrical, biomedical, and computer engineering. Copyright © 2014 SCITEPRESS - Science and Technology Publications. All rights reserved.
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This paper proposes a multifunctional architecture to implement field-programmable gate array (FPGA) controllers for power converters and presents a prototype for a pulsed power generator based on a solid-state Marx topology. The massively parallel nature of reconfigurable hardware platforms provides very high processing power and fast response times allowing the implementation of many subsystems in the same device. The prototype includes the controller, a failure detection system, an interface with a safety/emergency subsystem, a graphical user interface, and a virtual oscilloscope to visualize the generated pulse waveforms, using a single FPGA. The proposed architecture employs a modular design that can be easily adapted to other power converter topologies.