Modelling the effect of temperature on product reliability

Reliability of electronic parts is a major concern for many manufacturers, since early failures in the field can cost an enormous amount to repair - in many cases far more than the original cost of the product. A great deal of effort is expended by manufacturers to determine the failure rates for a process or the fraction of parts that will fail in a period of time. It is widely recognized that the traditional approach to reliability predictions for electronic systems are not suitable for today's products. This approach, based on statistical methods only, does not address the physics governing the failure mechanisms in electronic systems. This paper discusses virtual prototyping technologies which can predict the physics taking place and relate this to appropriate failure mechanisms. Simulation results illustrate the effect of temperature on the assembly process of an electronic package and the lifetime of a flip-chip package.

Modelling the metal arc weldpool

Traditionally, before flip chips can be assembled the dies have to be attached with solder bumps. This process involves the deposition of metal layers on the Al pads on the dies and this is called the under bump metallurgy (UBM). In an alternative process, however, Copper (Cu) columns can be used to replace solder bumps and the UBM process may be omitted altogether. After the bumping process, the bumped dies can be assembled on to the printed circuit board (PCB) by using either solder or conductive adhesives. In this work, the reliability issues of flip chips with Cu column bumped dies have been studied. The flip chip lifetime associated with the solder fatigue failure has been modeled for a range of geometric parameters. The relative importance of these parameters is given and solder volume has been identified as the most important design parameter for long-term reliability. Another important problem that has been studied in this work is the dissolution of protection metals on the pad and Cu column in the reflow process. For small solder joints the amount of Cu which dissolves into the molten solder after the protection layers have worn out may significantly affect solder joint properties.

Correlation of solder paste rheology with computational simulations of the stencil printing process

Soldering technologies continue to evolve to meet the demands of the continuous miniaturisation of electronic products, particularly in the area of solder paste formulations used in the reflow soldering of surface mount devices. Stencil printing continues to be a leading process used for the deposition of solder paste onto printed circuit boards (PCBs) in the volume production of electronic assemblies, despite problems in achieving a consistent print quality at an ultra-fine pitch. In order to eliminate these defects a good understanding of the processes involved in printing is important. Computational simulations may complement experimental print trials and paste characterisation studies, and provide an extra dimension to the understanding of the process. The characteristics and flow properties of solder pastes depend primarily on their chemical and physical composition and good material property data is essential for meaningful results to be obtained by computational simulation.This paper describes paste characterisation and computational simulation studies that have been undertaken through the collaboration of the School of Aeronautical, Mechanical and Manufacturing Engineering at Salford University and the Centre for Numerical Modelling and Process Analysis at the University of Greenwich. The rheological profile of two different paste formulations (lead and lead-free) for sub 100 micron flip-chip devices are tested and applied to computational simulations of their flow behaviour during the printing process.

Reliability predictions for high density packaging

Predicting the reliability of newly designed products, before manufacture, is obviously highly desirable for many organisations. Understanding the impact of various design variables on reliability allows companies to optimise expenditure and release a package in minimum time. Reliability predictions originated in the early years of the electronics industry. These predictions were based on historical field data which has evolved into industrial databases and specifications such as the famous MIL-HDBK-217 standard, plus numerous others. Unfortunately the accuracy of such techniques is highly questionable especially for newly designed packages. This paper discusses the use of modelling to predict the reliability of high density flip-chip and BGA components. A number of design parameters are investigated at the assembly stage, during testing, and in-service.

Thermal, mechanical and optical modelling of VCSEL packaging

Hybrid OECB (Opto-Electrical Circuit Boards) are expected to make a significant impact in the telecomm switches arena within the next five years, creating optical backplanes with high speed point-to-point optical interconnects. OECB's incorporate short range optical interconnects, and are based on VCSEL (Vertical Cavity Surface Emitting Diode) and PD (Photo Diode) pairs, connected to each other via embedded waveguides in the OECB. The VCSEL device is flip-chip assembled onto an organic substrate with embedded optical waveguides. The performance of the VCSEL device is governed by the thermal, mechanical and optical characteristics of this assembly. During operation, the VCSEL device will heat up and the thermal change together with the CTE mismatch in the materials, will result in potential misalignment between the VCSEL apertures and the waveguide openings in the substrate. Any degree of misalignment will affect the optical performance of the package. This paper will present results from a highly coupled modelling analysis involving thermal, mechanical and optical models. The paper will also present results from an optimisation analysis based on Design of Experiments (DOE).

Response Surface Modeling and Optimisation for Reliable Electronic Products

The aim of integrating computational mechanics (FEA and CFD) and optimization tools is to speed up dramatically the design process in different application areas concerning reliability in electronic packaging. Design engineers in the electronics manufacturing sector may use these tools to predict key design parameters and configurations (i.e. material properties, product dimensions, design at PCB level. etc) that will guarantee the required product performance. In this paper a modeling strategy coupling computational mechanics techniques with numerical optimization is presented and demonstrated with two problems. The integrated modeling framework is obtained by coupling the multi-physics analysis tool PHYSICA - with the numerical optimization package - Visua/DOC into a fuJly automated design tool for applications in electronic packaging. Thermo-mechanical simulations of solder creep deformations are presented to predict flip-chip reliability and life-time under thermal cycling. Also a thermal management design based on multi-physics analysis with coupled thermal-flow-stress modeling is discussed. The Response Surface Modeling Approach in conjunction with Design of Experiments statistical tools is demonstrated and used subsequently by the numerical optimization techniques as a part of this modeling framework. Predictions for reliable electronic assemblies are achieved in an efficient and systematic manner.

Study of Anisotropic Conductive Adhesive Joint Behaviour under 3-Point Bending

Flip chip interconnections using anisotropic conductive film (ACF) are now a very attractive technique for electronic packaging assembly. Although ACF is environmentally friendly, many factors may influence the reliability of the final ACF joint. External mechanical loading is one of these factors. Finite element analysis (FEA) was carried out to understand the effect of mechanical loading on the ACF joint. A 3-dimensional model of adhesively bonded flip chip assembly was built and simulations were performed for the 3-point bending test. The results show that the stress at its highest value at the corners, where the chip and ACF were connected together. The ACF thickness was increased at these corner regions. It was found that higher mechanical loading results in higher stress that causes a greater gap between the chip and the substrate at the corner position. Experimental work was also carried out to study the electrical reliability of the ACF joint with the applied bending load. As per the prediction from FEA, it was found that at first the corner joint failed. Successive open joints from the corner towards the middle were also noticed with the increase of the applied load.

Modelling the Performance of Flexible Substrates for Lead-Free Applications

In this paper, the performance of flexible substrates for lead-free applications was studied using finite element method (FEM). Firstly, the thermal induced stress in the flex substrate during the lead free solder reflow process was predicted. The shear stress at the interface between the copper track and flex was plotted. This shear stress increases with the thickness of the copper track. Secondly, an ACF flip chip was taken as a typical lead-free application of the flex substrate. The reflow effect on the reliability of ACF interconnections was analyzed. Higher stress was identified along the interface between the conductive particle and the metallization, and the interfacial stress increases with the reflow peak temperature and the coefficient of thermal expansion (CTE) of the adhesive. The moisture effect on the reliability of ACF joints were studied using a macro-micro modeling technique, the predominantly tensile stress found at the interface between the conductive particle and metallization could reduce the contact area and even cause the electrical failure. Modeling results are consistent with the findings in the experimental work

Moisture Effects on the Reliability of Anisotropic Conductive Films

Anisotropic conductive film (ACF) which consists of an adhesive epoxy matrix and randomly distributed conductive particles are widely used as the connection material for electronic devices with high I/O counts. However, for the semiconductor industry the reliability of the ACF is still a major concern due to a lack of experimental reliability data. This paper reports an investigation into the moisture effects on the reliability of ACF interconnections in the flip-chip-on-flex (FCOF) applications. A macro-micro 3D finite element modeling technique was used in order to make the multi-length-scale modeling of the ACF flip chip possible. The purposes of this modeling work was to understand the role that moisture plays in the failure of ACF flip chips, and to look into the influence of physical properties and geometric characteristics, such as the coefficient of the moisture expansion (CME), Young's modulus of the adhesive matrix and the bump height on the reliability of the ACF interconnections in a humid environment. Simulation results suggest that moisture-induced swelling of the adhesive matrix is the major cause of the ACF joint opening. Modeling results are consistent with the findings in the experimental work.

Decision support systems for eco-friendly electronic products

This paper discusses an optimisation based decision support system and methodology for electronic packaging and product design and development which is capable of addressing in efficient manner specified environmental, reliability and cost requirements. A study which focuses on the design of a flip-chip package is presented. Different alternatives for the design of the flip-chip package are considered based on existing options for the applied underfill and volume of solder material used to form the interconnects. Variations in these design input parameters have simultaneous effect on package aspects such as cost, environmental impact and reliability. A decision system for the design of the flip-chip that uses numerical optimisation approach is used to identify the package optimal specification which satisfies the imposed requirements. The reliability aspect of interest is the fatigue of solder joints under thermal cycling. Transient nonlinear finite element analysis (FEA) is used to simulate the thermal fatigue damage in solder joints subject to thermal cycling. Simulation results are manipulated within design of experiments and response surface modelling framework to provide numerical model for reliability which can be used to quantify the package reliability. Assessment of the environmental impact of the package materials is performed by using so called Toxic Index (TI). In this paper we demonstrate the evaluation of the environmental impact only for underfill and lead-free solder materials. This evaluation is based on the amount of material per flip-chip package. Cost is the dominant factor in contemporary flip-chip packaging industry. In the optimisation based decision support system for the design of the flip-chip package, cost of materials which varies as a result of variations in the design parameters is considered.

Optimisation modelling for design of advanced interconnects

This paper describes a computational strategy for virtual design and prototyping of electronic components and assemblies. The design process is formulated as a design optimisation problem. The solution of this problem identifies not only the design which meets certain user specified requirements but also the design with the maximum possible improvement in particular aspects such as reliability, cost, etc. The modelling approach exploits numerical techniques for computational analysis (Finite Element Analysis) integrated with numerical methods for approximation, statistical analysis and optimisation. A software framework of modules that incorporates the required numerical techniques is developed and used to carry out the design optimisation modelling of fine-pitch flip-chip lead free solder interconnects.

Analyzing the performance of flexible substrates for lead-free applications

The performance of flexible substrates for lead-free applications was studied using finite element method (FEM). Firstly, the thermal induced stress in the flex substrate during the lead free solder reflow process was predicted. The shear stress at the interface between the copper track and flex was plotted. This shear stress increases with the thickness of the copper track and the thickness of the flex. Secondly, an anisotropic conductive film (ACF) flip chip was taken as a typical lead-free application of the flex substrate and the moisture effect on the reliability of ACF joints were studied using a 3D macro-micro modeling technique. It is found that the time to be saturated of an ACF flip chip is much dependent on the moisture diffusion rate in the polyimide substrate. The majority moisture diffuses into the ACF layer from the substrate side rather than the periphery of the ACF. The moisture induced stress was predicted and the predominant tensile stress was found at the interface between the conductive particle and metallization which could reduce the contact area and even cause the electrical failure

Microwave curing for high density package

Summary form only given. Currently the vast majority of adhesive materials in electronic products are bonded using convection heating or infra-red as well as UV-curing. These thermal processing steps can take several hours to perform, slowing throughput and contributing a significant portion of the cost of manufacturing. With the demand for lighter, faster, and smaller electronic devices, there is a need for innovative material processing techniques and control methodologies. The increasing demand for smaller and cheaper devices pose engineering challenges in designing a curing systems that minimize the time required between the curing of devices in a production line, allowing access to the components during curing for alignment and testing. Microwave radiation exhibits several favorable characteristics and over the past few years has attracted increased academic and industrial attention as an alternative solution to curing of flip-chip underfills, bumps, glob top and potting cure, structural bonding, die attach, wafer processing, opto-electronics assembly as well as RF-ID tag bonding. Microwave energy fundamentally accelerates the cure kinetics of polymer adhesives. It provides a route to focus heat into the polymer materials penetrating the substrates that typically remain transparent. Therefore microwave energy can be used to minimise the temperature increase in the surrounding materials. The short path between the energy source and the cured material ensures a rapid heating rate and an overall low thermal budget. In this keynote talk, we will review the principles of microwave curing of materials for high density packing. Emphasis will be placed on recent advances within ongoing research in the UK on the realization of "open-oven" cavities, tailored to address existing challenges. Open-ovens do not require positioning of the device into the cavity through a movable door, hence being more suitable for fully automated processing. Further potential advantages of op- - en-oven curing include the possibility for simultaneous fine placement and curing of the device into a larger assembly. These capabilities promise productivity gains by combining assembly, placement and bonding into a single processing step. Moreover, the proposed design allows for selective heating within a large substrate, which can be useful particularly when the latter includes parts sensitive to increased temperatures.

Open ended microwave oven for packaging

A novel open waveguide cavity resonator is presented for the combined variable frequency microwave curing of bumps, underfills and encapsulants, as well as the alignment of devices for fast flip-chip assembly, direct chip attach (DCA) or wafer-scale level packaging (WSLP). This technology achieves radio frequency (RF) curing of adhesives used in microelectronics, optoelectronics and medical devices with potential simultaneous micron-scale alignment accuracy and bonding of devices. In principle, the open oven cavity can be fitted directly onto a flip-chip or wafer scale bonder and, as such, will allow for the bonding of devices through localised heating thus reducing the risk to thermally sensitive devices. Variable frequency microwave (VFM) heating and curing of an idealised polymer load is numerically simulated using a multi-physics approach. Electro-magnetic fields within a novel open ended microwave oven developed for use in micro-electronics manufacturing applications are solved using a dedicated Yee scheme finite-difference time-domain (FDTD) solver. Temperature distribution, degree of cure and thermal stresses are analysed using an Unstructured Finite Volume method (UFVM) multi-physics package. The polymer load was meshed for thermophysical analysis, whilst the microwave cavity - encompassing the polymer load - was meshed for microwave irradiation. The two solution domains are linked using a cross mapping routine. The principle of heating using the evanescent fringing fields within the open-end of the cavity is demonstrated. A closed loop feedback routine is established allowing the temperature within a lossy sample to be controlled. A distribution of the temperature within the lossy sample is obtained by using a thermal imaging camera.

Megasonic agitation for enhanced electrodeposition of copper

In this paper we propose an agitation method based on megasonic acoustic streaming to overcome the limitations in plating rate and uniformity of the metal deposits during the electroplating process. Megasonic agitation at a frequency of 1 MHz allows the reduction of the thickness of the Nernst diffusion layer to less than 600 nm. Two applications that demonstrate the benefits of megasonic acoustic streaming are presented: the formation of uniform ultra-fine pitch flip-chip bumps and the metallisation of high aspect ratio microvias. For the latter application, a multi-physics based numerical simulation is implemented to describe the hydrodynamics introduced by the acoustic waves as they travel inside the deep microvias.