984 resultados para Confirmation Contention


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A convenient asymmetric total synthesis of the potent HIF-1 inhibitory antitumor natural product, (−)- or (+)-(8R)-mycothiazole (1), is described. Not only does our synthesis confirm the 2006 structural reassignment made by Crews (Crews, P., et al. J. Nat. Prod. 2006, 69, 145), it revises the [α]D data previously reported for this molecule in MeOH from −13.7° to +42.3°. The newly developed route to (8R)-1 sets the C(8)–OH stereocenter via Sharpless AE/2,3-epoxy alcohol reductive ring opening and utilizes two Baldwin–Lee CsF/cat. CuI Stille cross-coupling reactions with vinylstannanes 8 and 3 to efficiently elaborate the C(1)–C(4) and C(14)–C(18) sectors.

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Ranking problems arise from the knowledge of several binary relations defined on a set of alternatives, which we intend to rank. In a previous work, the authors introduced a tool to confirm the solutions of multi-attribute ranking problems as linear extensions of a weighted sum of preference relations. An extension of this technique allows the recognition of critical preference pairs of alternatives, which are often caused by inconsistencies. Herein, a confirmation procedure is introduced and applied to confirm the results obtained by a multi-attribute decision methodology on a tender for the supply of buses to the Porto Public Transport Operator. © 2005 Springer Science + Business Media, Inc.

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The use of multicores is becoming widespread inthe field of embedded systems, many of which have real-time requirements. Hence, ensuring that real-time applications meet their timing constraints is a pre-requisite before deploying them on these systems. This necessitates the consideration of the impact of the contention due to shared lowlevel hardware resources like the front-side bus (FSB) on the Worst-CaseExecution Time (WCET) of the tasks. Towards this aim, this paper proposes a method to determine an upper bound on the number of bus requests that tasks executing on a core can generate in a given time interval. We show that our method yields tighter upper bounds in comparison with the state of-the-art. We then apply our method to compute the extra contention delay incurred by tasks, when they are co-scheduled on different cores and access the shared main memory, using a shared bus, access to which is granted using a round-robin arbitration (RR) protocol.

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The usage of COTS-based multicores is becoming widespread in the field of embedded systems. Providing realtime guarantees at design-time is a pre-requisite to deploy real-time systems on these multicores. This necessitates the consideration of the impact of the contention due to shared low-level hardware resources on the Worst-Case Execution Time (WCET) of the tasks. As a step towards this aim, this paper first identifies the different factors that make the WCET analysis a challenging problem in a typical COTS-based multicore system. Then, we propose and prove, a mathematically correct method to determine tight upper bounds on the WCET of the tasks, when they are co-scheduled on different cores.

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The current industry trend is towards using Commercially available Off-The-Shelf (COTS) based multicores for developing real time embedded systems, as opposed to the usage of custom-made hardware. In typical implementation of such COTS-based multicores, multiple cores access the main memory via a shared bus. This often leads to contention on this shared channel, which results in an increase of the response time of the tasks. Analyzing this increased response time, considering the contention on the shared bus, is challenging on COTS-based systems mainly because bus arbitration protocols are often undocumented and the exact instants at which the shared bus is accessed by tasks are not explicitly controlled by the operating system scheduler; they are instead a result of cache misses. This paper makes three contributions towards analyzing tasks scheduled on COTS-based multicores. Firstly, we describe a method to model the memory access patterns of a task. Secondly, we apply this model to analyze the worst case response time for a set of tasks. Although the required parameters to obtain the request profile can be obtained by static analysis, we provide an alternative method to experimentally obtain them by using performance monitoring counters (PMCs). We also compare our work against an existing approach and show that our approach outperforms it by providing tighter upper-bound on the number of bus requests generated by a task.

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It is widely assumed that scheduling real-time tasks becomes more difficult as their deadlines get shorter. With deadlines shorter, however, tasks potentially compete less with each other for processors, and this could produce more contention-free slots at which the number of competing tasks is smaller than or equal to the number of available processors. This paper presents a policy (called CF policy) that utilizes such contention-free slots effectively. This policy can be employed by any work-conserving, preemptive scheduling algorithm, and we show that any algorithm extended with this policy dominates the original algorithm in terms of schedulability. We also present improved schedulability tests for algorithms that employ this policy, based on the observation that interference from tasks is reduced when their executions are postponed to contention-free slots. Finally, using the properties of the CF policy, we derive a counter-intuitive claim that shortening of task deadlines can help improve schedulability of task systems. We present heuristics that effectively reduce task deadlines for better scheduability without performing any exhaustive search.

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Contention on the memory bus in COTS based multicore systems is becoming a major determining factor of the execution time of a task. Analyzing this extra execution time is non-trivial because (i) bus arbitration protocols in such systems are often undocumented and (ii) the times when the memory bus is requested to be used are not explicitly controlled by the operating system scheduler; they are instead a result of cache misses. We present a method for finding an upper bound on the extra execution time of a task due to contention on the memory bus in COTS based multicore systems. This method makes no assumptions on the bus arbitration protocol (other than assuming that it is work-conserving).

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The last decade has witnessed a major shift towards the deployment of embedded applications on multi-core platforms. However, real-time applications have not been able to fully benefit from this transition, as the computational gains offered by multi-cores are often offset by performance degradation due to shared resources, such as main memory. To efficiently use multi-core platforms for real-time systems, it is hence essential to tightly bound the interference when accessing shared resources. Although there has been much recent work in this area, a remaining key problem is to address the diversity of memory arbiters in the analysis to make it applicable to a wide range of systems. This work handles diverse arbiters by proposing a general framework to compute the maximum interference caused by the shared memory bus and its impact on the execution time of the tasks running on the cores, considering different bus arbiters. Our novel approach clearly demarcates the arbiter-dependent and independent stages in the analysis of these upper bounds. The arbiter-dependent phase takes the arbiter and the task memory-traffic pattern as inputs and produces a model of the availability of the bus to a given task. Then, based on the availability of the bus, the arbiter-independent phase determines the worst-case request-release scenario that maximizes the interference experienced by the tasks due to the contention for the bus. We show that the framework addresses the diversity problem by applying it to a memory bus shared by a fixed-priority arbiter, a time-division multiplexing (TDM) arbiter, and an unspecified work-conserving arbiter using applications from the MediaBench test suite. We also experimentally evaluate the quality of the analysis by comparison with a state-of-the-art TDM analysis approach and consistently showing a considerable reduction in maximum interference.

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IEEE International Conference on Communications (IEEE ICC 2015). 8 to 12, Jun, 2015, IEEE ICC 2015 - Communications QoS, Reliability and Modeling, London, United Kingdom.

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Furosemide (FD: Lasix) is a loop diuretic which strongly increases both urine flow and electrolyte urinary excretion. Healthy volunteers were administered 40 mg orally (dissolved in water) and concentrations of FD were determined in serum and urine for up to 6 h for eight subjects, who absorbed water at a rate of 400 ml/h. Quantification was performed by HPLC with fluorescence detection (excitation at 233 nm, emission at 389 nm) with a limit of detection of 5 ng/ml for a 300-microliters sample. The elution of FD was completed within 4 min using a gradient of acetonitrile concentration rising from 30 to 50% in 0.08 M phosphoric acid. The delay to the peak serum concentration ranged from 60 to 120 min. FD was still easily measurable in the sera from all subjects 6 h after administration. In urine, the excretion rates reached their maximum between 1 and 3 h. The total amount of FD excreted in the urine averaged 11.2 mg (range 7.6-14.0 mg), with a mean urine volume of 3024 ml (range 2620-3596 ml). Moreover, the urine density was lower than 1.010 (recommended as an upper limit in doping analysis to screen diuretics) only for 2 h. An additional volunteer was administered 40 mg of FD and his urine was collected over a longer period. FD was still detectable 48 h after intake. Gas chromatography-mass spectrometry with different types of ionization was used to confirm the occurrence of FD after permethylation of the extract. Negative-ion chemical ionization, with ammonia as reactant gas, was found to be the most sensitive method of detection.