Multiphase transformer-coupled converter: two different strategies for energy conversion

The operation of a multiphase topology, ideally, without energy storage presents the advantage of achieving very high efficiency over a wide load range as well as a fast dynamic response. However, ideal no-energy storage operation also implies a limitation in the regulation capability of the topology, the output voltage can only take discrete values. These features (high efficiency and discrete regulation capability) of the proposed energy conversion strategy enable the topology as a candidate for `DC-DC transformer' applications. The advantages, drawbacks and the operating principle of this concept, implemented with a `closed chain' magnetic structure have been already presented. In this work, the minimum energy storage operation, is applied to two different magnetic structures. These magnetic structures are called `closed chain' and `pyramidal' the main advantage of the `pyramidal' coupling structure is to improve the size of the converter without increasing the operating frequency. Both magnetic structures are analyzed, compared and experimentally implemented.

New Considerations in the Input Filter Design of a Three-Phase Buck-Type PWM Rectifier for Aircraft Applications

An EMI filter for a three-phase buck-type medium power pulse-width modulation rectifier is designed. This filter considers differential mode noise and complies with MIL-STD-461E for the frequency range of 10kHz to 10MHz. In industrial applications, the frequency range of the standard starts at 150kHz and the designer typically uses a switching frequency of 28kHz because the fifth harmonic is out of the range. This approach is not valid for aircraft applications. In order to design the switching frequency in aircraft applications, the power losses in the semiconductors and the weight of the reactive components should be considered. The proposed design is based on a harmonic analysis of the rectifier input current and an analytical study of the input filter. The classical industrial design does not consider the inductive effect in the filter design because the grid frequency is 50/60Hz. However, in the aircraft applications, the grid frequency is 400Hz and the inductance cannot be neglected. The proposed design considers the inductance and the capacitance effect of the filter in order to obtain unitary power factor at full power. In the optimization process, several filters are designed for different switching frequencies of the converter. In addition, designs from single to five stages are considered. The power losses of the converter plus the EMI filter are estimated at these switching frequencies. Considering overall losses and minimal filter volume, the optimal switching frequency is selected.

Teaching digital control of switch mode power supplier

This paper explains the methodology followed to teach the subject `Digital control of power converters'. This subject belongs to the research master on `Industrial Electronics' of the Universidad Politécnica de Madrid. The subject is composed of several theoretical lessons plus the development of an actual digital control. For that purpose an ad hoc dc-dc converter has been designed and built. The use of this board together with some software tools seems a very powerful way for the students to learn the concepts from the design to the real world

On-chip Monitoring: A Light-Weight Interconnection Network Approach

Current nanometer technologies are subjected to several adverse effects that seriously impact the yield and performance of integrated circuits. Such is the case of within-die parameters uncertainties, varying workload conditions, aging, temperature, etc. Monitoring, calibration and dynamic adaptation have appeared as promising solutions to these issues and many kinds of monitors have been presented recently. In this scenario, where systems with hundreds of monitors of different types have been proposed, the need for light-weight monitoring networks has become essential. In this work we present a light-weight network architecture based on digitization resource sharing of nodes that require a time-to-digital conversion. Our proposal employs a single wire interface, shared among all the nodes in the network, and quantizes the time domain to perform the access multiplexing and transmit the information. It supposes a 16% improvement in area and power consumption compared to traditional approaches.

Energy/power consumption model for an embedded processor board

This dissertation, whose research has been conducted at the Group of Electronic and Microelectronic Design (GDEM) within the framework of the project Power Consumption Control in Multimedia Terminals (PCCMUTE), focuses on the development of an energy estimation model for the battery-powered embedded processor board. The main objectives and contributions of the work are summarized as follows: A model is proposed to obtain the accurate energy estimation results based on the linear correlation between the performance monitoring counters (PMCs) and energy consumption. the uniqueness of the appropriate PMCs for each different system, the modeling methodology is improved to obtain stable accuracies with slight variations among multiple scenarios and to be repeatable in other systems. It includes two steps: the former, the PMC-filter, to identify the most proper set among the available PMCs of a system and the latter, the k-fold cross validation method, to avoid the bias during the model training stage. The methodology is implemented on a commercial embedded board running the 2.6.34 Linux kernel and the PAPI, a cross-platform interface to configure and access PMCs. The results show that the methodology is able to keep a good stability in different scenarios and provide robust estimation results with the average relative error being less than 5%. Este trabajo fin de máster, cuya investigación se ha desarrollado en el Grupo de Diseño Electrónico y Microelectrónico (GDEM) en el marco del proyecto PccMuTe, se centra en el desarrollo de un modelo de estimación de energía para un sistema empotrado alimentado por batería. Los objetivos principales y las contribuciones de esta tesis se resumen como sigue: Se propone un modelo para obtener estimaciones precisas del consumo de energía de un sistema empotrado. El modelo se basa en la correlación lineal entre los valores de los contadores de prestaciones y el consumo de energía. Considerando la particularidad de los contadores de prestaciones en cada sistema, la metodología de modelado se ha mejorado para obtener precisiones estables, con ligeras variaciones entre escenarios múltiples y para replicar los resultados en diferentes sistemas. La metodología incluye dos etapas: la primera, filtrado-PMC, que consiste en identificar el conjunto más apropiado de contadores de prestaciones de entre los disponibles en un sistema y la segunda, el método de validación cruzada de K iteraciones, cuyo fin es evitar los sesgos durante la fase de entrenamiento. La metodología se implementa en un sistema empotrado que ejecuta el kernel 2.6.34 de Linux y PAPI, un interfaz multiplataforma para configurar y acceder a los contadores. Los resultados muestran que esta metodología consigue una buena estabilidad en diferentes escenarios y proporciona unos resultados robustos de estimación con un error medio relativo inferior al 5%.

Energy and power aware scheduling algorithm modeling for battery powered embedded systems

Energy management has always been recognized as a challenge in mobile systems, especially in modern OS-based mobile systems where multi-functioning are widely supported. Nowadays, it is common for a mobile system user to run multiple applications simultaneously while having a target battery lifetime in mind for a specific application. Traditional OS-level power management (PM) policies make their best effort to save energy under performance constraint, but fail to guarantee a target lifetime, leaving the painful trading off between the total performance of applications and the target lifetime to the user itself. This thesis provides a new way to deal with the problem. It is advocated that a strong energy-aware PM scheme should first guarantee a user-specified battery lifetime to a target application by restricting the average power of those less important applications, and in addition to that, maximize the total performance of applications without harming the lifetime guarantee. As a support, energy, instead of CPU or transmission bandwidth, should be globally managed as the first-class resource by the OS. As the first-stage work of a complete PM scheme, this thesis presents the energy-based fair queuing scheduling, a novel class of energy-aware scheduling algorithms which, in combination with a mechanism of battery discharge rate restricting, systematically manage energy as the first-class resource with the objective of guaranteeing a user-specified battery lifetime for a target application in OS-based mobile systems. Energy-based fair queuing is a cross-application of the traditional fair queuing in the energy management domain. It assigns a power share to each task, and manages energy by proportionally serving energy to tasks according to their assigned power shares. The proportional energy use establishes proportional share of the system power among tasks, which guarantees a minimum power for each task and thus, avoids energy starvation on any task. Energy-based fair queuing treats all tasks equally as one type and supports periodical time-sensitive tasks by allocating each of them a share of system power that is adequate to meet the highest energy demand in all periods. However, an overly conservative power share is usually required to guarantee the meeting of all time constraints. To provide more effective and flexible support for various types of time-sensitive tasks in general purpose operating systems, an extra real-time friendly mechanism is introduced to combine priority-based scheduling into the energy-based fair queuing. Since a method is available to control the maximum time one time-sensitive task can run with priority, the power control and time-constraint meeting can be flexibly traded off. A SystemC-based test-bench is designed to assess the algorithms. Simulation results show the success of the energy-based fair queuing in achieving proportional energy use, time-constraint meeting, and a proper trading off between them. La gestión de energía en los sistema móviles está considerada hoy en día como un reto fundamental, notándose, especialmente, en aquellos terminales que utilizando un sistema operativo implementan múltiples funciones. Es común en los sistemas móviles actuales ejecutar simultaneamente diferentes aplicaciones y tener, para una de ellas, un objetivo de tiempo de uso de la batería. Tradicionalmente, las políticas de gestión de consumo de potencia de los sistemas operativos hacen lo que está en sus manos para ahorrar energía y satisfacer sus requisitos de prestaciones, pero no son capaces de proporcionar un objetivo de tiempo de utilización del sistema, dejando al usuario la difícil tarea de buscar un compromiso entre prestaciones y tiempo de utilización del sistema. Esta tesis, como contribución, proporciona una nueva manera de afrontar el problema. En ella se establece que un esquema de gestión de consumo de energía debería, en primer lugar, garantizar, para una aplicación dada, un tiempo mínimo de utilización de la batería que estuviera especificado por el usuario, restringiendo la potencia media consumida por las aplicaciones que se puedan considerar menos importantes y, en segundo lugar, maximizar las prestaciones globales sin comprometer la garantía de utilización de la batería. Como soporte de lo anterior, la energía, en lugar del tiempo de CPU o el ancho de banda, debería gestionarse globalmente por el sistema operativo como recurso de primera clase. Como primera fase en el desarrollo completo de un esquema de gestión de consumo, esta tesis presenta un algoritmo de planificación de encolado equitativo (fair queueing) basado en el consumo de energía, es decir, una nueva clase de algoritmos de planificación que, en combinación con mecanismos que restrinjan la tasa de descarga de una batería, gestionen de forma sistemática la energía como recurso de primera clase, con el objetivo de garantizar, para una aplicación dada, un tiempo de uso de la batería, definido por el usuario, en sistemas móviles empotrados. El encolado equitativo de energía es una extensión al dominio de la energía del encolado equitativo tradicional. Esta clase de algoritmos asigna una reserva de potencia a cada tarea y gestiona la energía sirviéndola de manera proporcional a su reserva. Este uso proporcional de la energía garantiza que cada tarea reciba una porción de potencia y evita que haya tareas que se vean privadas de recibir energía por otras con un comportamiento más ambicioso. Esta clase de algoritmos trata a todas las tareas por igual y puede planificar tareas periódicas en tiempo real asignando a cada una de ellas una reserva de potencia que es adecuada para proporcionar la mayor de las cantidades de energía demandadas por período. Sin embargo, es posible demostrar que sólo se consigue cumplir con los requisitos impuestos por todos los plazos temporales con reservas de potencia extremadamente conservadoras. En esta tesis, para proporcionar un soporte más flexible y eficiente para diferentes tipos de tareas de tiempo real junto con el resto de tareas, se combina un mecanismo de planificación basado en prioridades con el encolado equitativo basado en energía. En esta clase de algoritmos, gracias al método introducido, que controla el tiempo que se ejecuta con prioridad una tarea de tiempo real, se puede establecer un compromiso entre el cumplimiento de los requisitos de tiempo real y el consumo de potencia. Para evaluar los algoritmos, se ha diseñado en SystemC un banco de pruebas. Los resultados muestran que el algoritmo de encolado equitativo basado en el consumo de energía consigue el balance entre el uso proporcional a la energía reservada y el cumplimiento de los requisitos de tiempo real.

On-Chip Thermal Monitoring: Design, Placement and Interconnection of Temperature Sensors

La temperatura es una preocupación que juega un papel protagonista en el diseño de circuitos integrados modernos. El importante aumento de las densidades de potencia que conllevan las últimas generaciones tecnológicas ha producido la aparición de gradientes térmicos y puntos calientes durante el funcionamiento normal de los chips. La temperatura tiene un impacto negativo en varios parámetros del circuito integrado como el retardo de las puertas, los gastos de disipación de calor, la fiabilidad, el consumo de energía, etc. Con el fin de luchar contra estos efectos nocivos, la técnicas de gestión dinámica de la temperatura (DTM) adaptan el comportamiento del chip en función en la información que proporciona un sistema de monitorización que mide en tiempo de ejecución la información térmica de la superficie del dado. El campo de la monitorización de la temperatura en el chip ha llamado la atención de la comunidad científica en los últimos años y es el objeto de estudio de esta tesis. Esta tesis aborda la temática de control de la temperatura en el chip desde diferentes perspectivas y niveles, ofreciendo soluciones a algunos de los temas más importantes. Los niveles físico y circuital se cubren con el diseño y la caracterización de dos nuevos sensores de temperatura especialmente diseñados para los propósitos de las técnicas DTM. El primer sensor está basado en un mecanismo que obtiene un pulso de anchura variable dependiente de la relación de las corrientes de fuga con la temperatura. De manera resumida, se carga un nodo del circuito y posteriormente se deja flotando de tal manera que se descarga a través de las corrientes de fugas de un transistor; el tiempo de descarga del nodo es la anchura del pulso. Dado que la anchura del pulso muestra una dependencia exponencial con la temperatura, la conversión a una palabra digital se realiza por medio de un contador logarítmico que realiza tanto la conversión tiempo a digital como la linealización de la salida. La estructura resultante de esta combinación de elementos se implementa en una tecnología de 0,35 _m. El sensor ocupa un área muy reducida, 10.250 nm2, y consume muy poca energía, 1.05-65.5nW a 5 muestras/s, estas cifras superaron todos los trabajos previos en el momento en que se publicó por primera vez y en el momento de la publicación de esta tesis, superan a todas las implementaciones anteriores fabricadas en el mismo nodo tecnológico. En cuanto a la precisión, el sensor ofrece una buena linealidad, incluso sin calibrar; se obtiene un error 3_ de 1,97oC, adecuado para tratar con las aplicaciones de DTM. Como se ha explicado, el sensor es completamente compatible con los procesos de fabricación CMOS, este hecho, junto con sus valores reducidos de área y consumo, lo hacen especialmente adecuado para la integración en un sistema de monitorización de DTM con un conjunto de monitores empotrados distribuidos a través del chip. Las crecientes incertidumbres de proceso asociadas a los últimos nodos tecnológicos comprometen las características de linealidad de nuestra primera propuesta de sensor. Con el objetivo de superar estos problemas, proponemos una nueva técnica para obtener la temperatura. La nueva técnica también está basada en las dependencias térmicas de las corrientes de fuga que se utilizan para descargar un nodo flotante. La novedad es que ahora la medida viene dada por el cociente de dos medidas diferentes, en una de las cuales se altera una característica del transistor de descarga |la tensión de puerta. Este cociente resulta ser muy robusto frente a variaciones de proceso y, además, la linealidad obtenida cumple ampliamente los requisitos impuestos por las políticas DTM |error 3_ de 1,17oC considerando variaciones del proceso y calibrando en dos puntos. La implementación de la parte sensora de esta nueva técnica implica varias consideraciones de diseño, tales como la generación de una referencia de tensión independiente de variaciones de proceso, que se analizan en profundidad en la tesis. Para la conversión tiempo-a-digital, se emplea la misma estructura de digitalización que en el primer sensor. Para la implementación física de la parte de digitalización, se ha construido una biblioteca de células estándar completamente nueva orientada a la reducción de área y consumo. El sensor resultante de la unión de todos los bloques se caracteriza por una energía por muestra ultra baja (48-640 pJ) y un área diminuta de 0,0016 mm2, esta cifra mejora todos los trabajos previos. Para probar esta afirmación, se realiza una comparación exhaustiva con más de 40 propuestas de sensores en la literatura científica. Subiendo el nivel de abstracción al sistema, la tercera contribución se centra en el modelado de un sistema de monitorización que consiste de un conjunto de sensores distribuidos por la superficie del chip. Todos los trabajos anteriores de la literatura tienen como objetivo maximizar la precisión del sistema con el mínimo número de monitores. Como novedad, en nuestra propuesta se introducen nuevos parámetros de calidad aparte del número de sensores, también se considera el consumo de energía, la frecuencia de muestreo, los costes de interconexión y la posibilidad de elegir diferentes tipos de monitores. El modelo se introduce en un algoritmo de recocido simulado que recibe la información térmica de un sistema, sus propiedades físicas, limitaciones de área, potencia e interconexión y una colección de tipos de monitor; el algoritmo proporciona el tipo seleccionado de monitor, el número de monitores, su posición y la velocidad de muestreo _optima. Para probar la validez del algoritmo, se presentan varios casos de estudio para el procesador Alpha 21364 considerando distintas restricciones. En comparación con otros trabajos previos en la literatura, el modelo que aquí se presenta es el más completo. Finalmente, la última contribución se dirige al nivel de red, partiendo de un conjunto de monitores de temperatura de posiciones conocidas, nos concentramos en resolver el problema de la conexión de los sensores de una forma eficiente en área y consumo. Nuestra primera propuesta en este campo es la introducción de un nuevo nivel en la jerarquía de interconexión, el nivel de trillado (o threshing en inglés), entre los monitores y los buses tradicionales de periféricos. En este nuevo nivel se aplica selectividad de datos para reducir la cantidad de información que se envía al controlador central. La idea detrás de este nuevo nivel es que en este tipo de redes la mayoría de los datos es inútil, porque desde el punto de vista del controlador sólo una pequeña cantidad de datos |normalmente sólo los valores extremos| es de interés. Para cubrir el nuevo nivel, proponemos una red de monitorización mono-conexión que se basa en un esquema de señalización en el dominio de tiempo. Este esquema reduce significativamente tanto la actividad de conmutación sobre la conexión como el consumo de energía de la red. Otra ventaja de este esquema es que los datos de los monitores llegan directamente ordenados al controlador. Si este tipo de señalización se aplica a sensores que realizan conversión tiempo-a-digital, se puede obtener compartición de recursos de digitalización tanto en tiempo como en espacio, lo que supone un importante ahorro de área y consumo. Finalmente, se presentan dos prototipos de sistemas de monitorización completos que de manera significativa superan la características de trabajos anteriores en términos de área y, especialmente, consumo de energía. Abstract Temperature is a first class design concern in modern integrated circuits. The important increase in power densities associated to recent technology evolutions has lead to the apparition of thermal gradients and hot spots during run time operation. Temperature impacts several circuit parameters such as speed, cooling budgets, reliability, power consumption, etc. In order to fight against these negative effects, dynamic thermal management (DTM) techniques adapt the behavior of the chip relying on the information of a monitoring system that provides run-time thermal information of the die surface. The field of on-chip temperature monitoring has drawn the attention of the scientific community in the recent years and is the object of study of this thesis. This thesis approaches the matter of on-chip temperature monitoring from different perspectives and levels, providing solutions to some of the most important issues. The physical and circuital levels are covered with the design and characterization of two novel temperature sensors specially tailored for DTM purposes. The first sensor is based upon a mechanism that obtains a pulse with a varying width based on the variations of the leakage currents on the temperature. In a nutshell, a circuit node is charged and subsequently left floating so that it discharges away through the subthreshold currents of a transistor; the time the node takes to discharge is the width of the pulse. Since the width of the pulse displays an exponential dependence on the temperature, the conversion into a digital word is realized by means of a logarithmic counter that performs both the timeto- digital conversion and the linearization of the output. The structure resulting from this combination of elements is implemented in a 0.35_m technology and is characterized by very reduced area, 10250 nm2, and power consumption, 1.05-65.5 nW at 5 samples/s, these figures outperformed all previous works by the time it was first published and still, by the time of the publication of this thesis, they outnumber all previous implementations in the same technology node. Concerning the accuracy, the sensor exhibits good linearity, even without calibration it displays a 3_ error of 1.97oC, appropriate to deal with DTM applications. As explained, the sensor is completely compatible with standard CMOS processes, this fact, along with its tiny area and power overhead, makes it specially suitable for the integration in a DTM monitoring system with a collection of on-chip monitors distributed across the chip. The exacerbated process fluctuations carried along with recent technology nodes jeop-ardize the linearity characteristics of the first sensor. In order to overcome these problems, a new temperature inferring technique is proposed. In this case, we also rely on the thermal dependencies of leakage currents that are used to discharge a floating node, but now, the result comes from the ratio of two different measures, in one of which we alter a characteristic of the discharging transistor |the gate voltage. This ratio proves to be very robust against process variations and displays a more than suficient linearity on the temperature |1.17oC 3_ error considering process variations and performing two-point calibration. The implementation of the sensing part based on this new technique implies several issues, such as the generation of process variations independent voltage reference, that are analyzed in depth in the thesis. In order to perform the time-to-digital conversion, we employ the same digitization structure the former sensor used. A completely new standard cell library targeting low area and power overhead is built from scratch to implement the digitization part. Putting all the pieces together, we achieve a complete sensor system that is characterized by ultra low energy per conversion of 48-640pJ and area of 0.0016mm2, this figure outperforms all previous works. To prove this statement, we perform a thorough comparison with over 40 works from the scientific literature. Moving up to the system level, the third contribution is centered on the modeling of a monitoring system consisting of set of thermal sensors distributed across the chip. All previous works from the literature target maximizing the accuracy of the system with the minimum number of monitors. In contrast, we introduce new metrics of quality apart form just the number of sensors; we consider the power consumption, the sampling frequency, the possibility to consider different types of monitors and the interconnection costs. The model is introduced in a simulated annealing algorithm that receives the thermal information of a system, its physical properties, area, power and interconnection constraints and a collection of monitor types; the algorithm yields the selected type of monitor, the number of monitors, their position and the optimum sampling rate. We test the algorithm with the Alpha 21364 processor under several constraint configurations to prove its validity. When compared to other previous works in the literature, the modeling presented here is the most complete. Finally, the last contribution targets the networking level, given an allocated set of temperature monitors, we focused on solving the problem of connecting them in an efficient way from the area and power perspectives. Our first proposal in this area is the introduction of a new interconnection hierarchy level, the threshing level, in between the monitors and the traditional peripheral buses that applies data selectivity to reduce the amount of information that is sent to the central controller. The idea behind this new level is that in this kind of networks most data are useless because from the controller viewpoint just a small amount of data |normally extreme values| is of interest. To cover the new interconnection level, we propose a single-wire monitoring network based on a time-domain signaling scheme that significantly reduces both the switching activity over the wire and the power consumption of the network. This scheme codes the information in the time domain and allows a straightforward obtention of an ordered list of values from the maximum to the minimum. If the scheme is applied to monitors that employ TDC, digitization resource sharing is achieved, producing an important saving in area and power consumption. Two prototypes of complete monitoring systems are presented, they significantly overcome previous works in terms of area and, specially, power consumption.

Análisis Integrado de Seguridad de un accidente de SGTR en un reactor nuclear tipo PWR

El accidente de rotura de tubos de un generador de vapor (Steam Generator Tube Rupture, SGTR) en los reactores de agua a presión es uno de los transitorios más exigentes desde el punto de vista de operación. Los transitorios de SGTR son especiales, ya que podría dar lugar a emisiones radiológicas al exterior sin necesidad de daño en el núcleo previo o sin que falle la contención, ya que los SG pueden constituir una vía directa desde el reactor al medio ambiente en este transitorio. En los análisis de seguridad, el SGTR se analiza desde un punto determinista y probabilista, con distintos enfoques con respecto a las acciones del operador y las consecuencias analizadas. Cuando comenzaron los Análisis Deterministas de Seguridad (DSA), la forma de analizar el SGTR fue sin dar crédito a la acción del operador durante los primeros 30 min del transitorio, lo que suponía que el grupo de operación era capaz de detener la fuga por el tubo roto dentro de ese tiempo. Sin embargo, los diferentes casos reales de accidentes de SGTR sucedidos en los EE.UU. y alrededor del mundo demostraron que los operadores pueden emplear más de 30 minutos para detener la fuga en la vida real. Algunas metodologías fueron desarrolladas en los EEUU y en Europa para abordar esa cuestión. En el Análisis Probabilista de Seguridad (PSA), las acciones del operador se tienen en cuenta para diseñar los cabeceros en el árbol de sucesos. Los tiempos disponibles se utilizan para establecer los criterios de éxito para dichos cabeceros. Sin embargo, en una secuencia dinámica como el SGTR, las acciones de un operador son muy dependientes del tiempo disponible por las acciones humanas anteriores. Además, algunas de las secuencias de SGTR puede conducir a la liberación de actividad radiológica al exterior sin daño previo en el núcleo y que no se tienen en cuenta en el APS, ya que desde el punto de vista de la integridad de núcleo son de éxito. Para ello, para analizar todos estos factores, la forma adecuada de analizar este tipo de secuencias pueden ser a través de una metodología que contemple Árboles de Sucesos Dinámicos (Dynamic Event Trees, DET). En esta Tesis Doctoral se compara el impacto en la evolución temporal y la dosis al exterior de la hipótesis más relevantes encontradas en los Análisis Deterministas a nivel mundial. La comparación se realiza con un modelo PWR Westinghouse de tres lazos (CN Almaraz) con el código termohidráulico TRACE, con hipótesis de estimación óptima, pero con hipótesis deterministas como criterio de fallo único o pérdida de energía eléctrica exterior. Las dosis al exterior se calculan con RADTRAD, ya que es uno de los códigos utilizados normalmente para los cálculos de dosis del SGTR. El comportamiento del reactor y las dosis al exterior son muy diversas, según las diferentes hipótesis en cada metodología. Por otra parte, los resultados están bastante lejos de los límites de regulación, pese a los conservadurismos introducidos. En el siguiente paso de la Tesis Doctoral, se ha realizado un análisis de seguridad integrado del SGTR según la metodología ISA, desarrollada por el Consejo de Seguridad Nuclear español (CSN). Para ello, se ha realizado un análisis termo-hidráulico con un modelo de PWR Westinghouse de 3 lazos con el código MAAP. La metodología ISA permite la obtención del árbol de eventos dinámico del SGTR, teniendo en cuenta las incertidumbres en los tiempos de actuación del operador. Las simulaciones se realizaron con SCAIS (sistema de simulación de códigos para la evaluación de la seguridad integrada), que incluye un acoplamiento dinámico con MAAP. Las dosis al exterior se calcularon también con RADTRAD. En los resultados, se han tenido en cuenta, por primera vez en la literatura, las consecuencias de las secuencias en términos no sólo de daños en el núcleo sino de dosis al exterior. Esta tesis doctoral demuestra la necesidad de analizar todas las consecuencias que contribuyen al riesgo en un accidente como el SGTR. Para ello se ha hecho uso de una metodología integrada como ISA-CSN. Con este enfoque, la visión del DSA del SGTR (consecuencias radiológicas) se une con la visión del PSA del SGTR (consecuencias de daño al núcleo) para evaluar el riesgo total del accidente. Abstract Steam Generator Tube Rupture accidents in Pressurized Water Reactors are known to be one of the most demanding transients for the operating crew. SGTR are special transient as they could lead to radiological releases without core damage or containment failure, as they can constitute a direct path to the environment. The SGTR is analyzed from a Deterministic and Probabilistic point of view in the Safety Analysis, although the assumptions of the different approaches regarding the operator actions are quite different. In the beginning of Deterministic Safety Analysis, the way of analyzing the SGTR was not crediting the operator action for the first 30 min of the transient, assuming that the operating crew was able to stop the primary to secondary leakage within that time. However, the different real SGTR accident cases happened in the USA and over the world demonstrated that operators can took more than 30 min to stop the leakage in actual sequences. Some methodologies were raised in the USA and in Europe to cover that issue. In the Probabilistic Safety Analysis, the operator actions are taken into account to set the headers in the event tree. The available times are used to establish the success criteria for the headers. However, in such a dynamic sequence as SGTR, the operator actions are very dependent on the time available left by the other human actions. Moreover, some of the SGTR sequences can lead to offsite doses without previous core damage and they are not taken into account in PSA as from the point of view of core integrity are successful. Therefore, to analyze all this factors, the appropriate way of analyzing that kind of sequences could be through a Dynamic Event Tree methodology. This Thesis compares the impact on transient evolution and the offsite dose of the most relevant hypothesis of the different SGTR analysis included in the Deterministic Safety Analysis. The comparison is done with a PWR Westinghouse three loop model in TRACE code (Almaraz NPP), with best estimate assumptions but including deterministic hypothesis such as single failure criteria or loss of offsite power. The offsite doses are calculated with RADTRAD code, as it is one of the codes normally used for SGTR offsite dose calculations. The behaviour of the reactor and the offsite doses are quite diverse depending on the different assumptions made in each methodology. On the other hand, although the high conservatism, such as the single failure criteria, the results are quite far from the regulatory limits. In the next stage of the Thesis, the Integrated Safety Assessment (ISA) methodology, developed by the Spanish Nuclear Safety Council (CSN), has been applied to a thermohydraulical analysis of a Westinghouse 3-loop PWR plant with the MAAP code. The ISA methodology allows obtaining the SGTR Dynamic Event Tree taking into account the uncertainties on the operator actuation times. Simulations are performed with SCAIS (Simulation Code system for Integrated Safety Assessment), which includes a dynamic coupling with MAAP thermal hydraulic code. The offsite doses are calculated also with RADTRAD. The results shows the consequences of the sequences in terms not only of core damage but of offsite doses. This Thesis shows the need of analyzing all the consequences in an accident such as SGTR. For that, an it has been used an integral methodology like ISA-CSN. With this approach, the DSA vision of the SGTR (radiological consequences) is joined with the PSA vision of the SGTR (core damage consequences) to measure the total risk of the accident.

High-peak-power pulse generation from a monolithic master oscillator power amplifier at 1.5 μm

We present an experimental study on the generation of high-peak-power short optical pulses from a fully integrated master-oscillator power-amplifier emitting at 1.5 μm. High-peak-power (2.7 W) optical pulses with short duration (100 ps) have been generated by gain switching the master oscillator under optimized driving conditions. The static and dynamic characteristics of the device have been studied as a function of the driving conditions. The ripples appearing in the power-current characteristics under cw conditions have been attributed to mode hopping between the master oscillator resonant mode and the Fabry-Perot modes of the entire device cavity. Although compound cavity effects have been evidenced to affect the static and dynamic performance of the device, we have demonstrated that trains of single-mode short optical pulses at gigahertz frequencies can be conveniently generated in these devices.

Smoothing of PV power fluctuations by geographical dispersion

The quality and the reliability of the power generated by large grid-connected photovoltaic (PV) plants are negatively affected by the source characteristic variability. This paper deals with the smoothing of power fluctuations because of geographical dispersion of PV systems. The fluctuation frequency and the maximum fluctuation registered at a PV plant ensemble are analyzed to study these effects. We propose an empirical expression to compare the fluctuation attenuation because of both the size and the number of PV plants grouped. The convolution of single PV plants frequency distribution functions has turned out to be a successful tool to statistically describe the behavior of an ensemble of PV plants and determine their maximum output fluctuation. Our work is based on experimental 1-s data collected throughout 2009 from seven PV plants, 20 MWp in total, separated between 6 and 360 km.

Optimal design of AC EMI filters with damping networks and effect on the systems power factor

The cutoff frequencies of an EMI filter are normally given by the noise attenuation requirements the filter has to fulfill. In order to select the component values of the filter elements, i.e. inductances and capacitances, an additional design criterium is needed. In this paper the effect of the EMI filter input and output impedances are considered. The input impedance influences the filters effect on the system displacement power factor and the output impedance plays a key role in the system stability. The effect of filter element values, the number of filter stages as well as additional damping networks are considered and a design procedure is provided. For this analysis a two-port description of the input filters employing ABCD-parameters is used.

Analysis and optimized design of a distributed multi-stage EMC filter for an interleaved three-phase PWM-rectifier system for aircraft applications

Different possible input filter configurations for a modular three-phase PWM rectifier system consisting of three interleaved converter cells are studied. The system is designed for an aircraft application where MIL-STD-461E conducted EMI standards have to be met and system weight is a critical design issue. The importance of a LISN model on the simulated noise levels and the effect of interleaving and power unbalance between the different converter modules is discussed. The effect of the number of filter stages and the degree of distribution of the filter stages among the individual converter modules on the weight and losses of the input filter is studied and optimal filter structures are proposed.

Measurement of transmitted power in untapered multifibre unions oscillatory spectral behaviour

Shows a new structure, the untapered multifibre union, with similar oscillation behaviour to that of tapered single-mode fibres. As a consequences conical regions are not relevant to the final results. This oscillatory behaviour opens the way to low-cost all-fibre devices such as optical filters

Analysis of the operator action and the single failure criteria in a SGTR sequence using best estimate assumptions with TRACE 5.0

Steam Generator Tube Rupture (SGTR) sequences in Pressurized Water Reactors are known to be one of the most demanding transients for the operating crew. SGTR are a special kind of transient as they could lead to radiological releases without core damage or containment failure, as they can constitute a direct path from the reactor coolant system to the environment. The first methodology used to perform the Deterministic Safety Analysis (DSA) of a SGTR did not credit the operator action for the first 30 min of the transient, assuming that the operating crew was able to stop the primary to secondary leakage within that period of time. However, the different real SGTR accident cases happened in the USA and over the world demonstrated that the operators usually take more than 30 min to stop the leakage in actual sequences. Some methodologies were raised to overcome that fact, considering operator actions from the beginning of the transient, as it is done in Probabilistic Safety Analysis. This paper presents the results of comparing different assumptions regarding the single failure criteria and the operator action taken from the most common methodologies included in the different Deterministic Safety Analysis. One single failure criteria that has not been analysed previously in the literature is proposed and analysed in this paper too. The comparison is done with a PWR Westinghouse three loop model in TRACE code (Almaraz NPP) with best estimate assumptions but including deterministic hypothesis such as single failure criteria or loss of offsite power. The behaviour of the reactor is quite diverse depending on the different assumptions made regarding the operator actions. On the other hand, although there are high conservatisms included in the hypothesis, as the single failure criteria, all the results are quite far from the regulatory limits. In addition, some improvements to the Emergency Operating Procedures to minimize the offsite release from the damaged SG in case of a SGTR are outlined taking into account the offsite dose sensitivity results.

Development and characterization of an FK photovoltaic concentrator for maximum conversion efficiency

The outdoor measurements of a single-cell concentrator PV module reaching a regressed 35.6% efficiency and a maximum peak efficiency of 36.0% (both corrected @Tcell=25ºC) are presented. This is the result of the joint effort by LPI and Solar Junction to demonstrate the potential of combining their respective state-of-the-art concentrator optics and solar cells. The LPI concentrator used is an FK, which is an advanced nonimaging concentrator using 4-channel Köhler homogenization, with a primary Fresnel lens and a refractive secondary made of glass. Solar Junction’s cell is a triplejunction solar cell with the A-SLAMTM architecture using dilute-nitrides.