DCE@urLAB: a dynamic contrast-enhanced MRI pharmacokinetic analysis tool for preclinical data

Background DCE@urLAB is a software application for analysis of dynamic contrast-enhanced magnetic resonance imaging data (DCE-MRI). The tool incorporates a friendly graphical user interface (GUI) to interactively select and analyze a region of interest (ROI) within the image set, taking into account the tissue concentration of the contrast agent (CA) and its effect on pixel intensity. Results Pixel-wise model-based quantitative parameters are estimated by fitting DCE-MRI data to several pharmacokinetic models using the Levenberg-Marquardt algorithm (LMA). DCE@urLAB also includes the semi-quantitative parametric and heuristic analysis approaches commonly used in practice. This software application has been programmed in the Interactive Data Language (IDL) and tested both with publicly available simulated data and preclinical studies from tumor-bearing mouse brains. Conclusions A user-friendly solution for applying pharmacokinetic and non-quantitative analysis DCE-MRI in preclinical studies has been implemented and tested. The proposed tool has been specially designed for easy selection of multi-pixel ROIs. A public release of DCE@urLAB, together with the open source code and sample datasets, is available at http://www.die.upm.es/im/archives/DCEurLAB/ webcite.

Arquitecturas desplazadas. Rafael Bergamín y las arquitecturas del exilio español en Venezuela

El siglo XX ha sido el siglo de los desplazamientos. Una ingente cantidad de personas fueron forzadas por motivos políticos, o se vieron obligadas por motivos económicos, a abandonar sus territorios de origen, generando un distanciamiento que en la mayoría de los casos resultaría irrecuperable. Las penurias vividas en Europa, las oportunidades que se abrían en países americanos, o la presión ejercida por los regímenes totalitarios, llevaron a un buen número de profesionales, artistas e intelectuales europeos a territorio americano. El presente trabajo se propone indagar sobre una de esas migraciones que se establecieron en Latinoamérica en la primera mitad del siglo XX: la de los arquitectos españoles que se vieron forzados al exilio. Para ello se busca poner en evidencia no sólo sus aportaciones sino también la influencia que ejerció en su obra la cultura de los países de adopción. Venezuela recibió gran parte del contingente de arquitectos españoles desplazados como consecuencia de la Guerra Civil. Tras México fue el país que mayor número acogió. La llegada de dichos exiliados coincidió con el momento en que la sociedad venezolana, de base agrícola y comercial, pasaría a evidenciar el impacto de la revolución petrolera. Así pues, dicha llegada supuso no sólo la dramática pérdida del mundo previo, implícita en todo exilio, sino el arribo a una sociedad en profundo proceso de cambio. En ambos casos se trataba de “mundos que se desvanecen”. Se propone la asunción de la obra de dichos profesionales como una arquitectura desplazada. Un desplazamiento que se produce en dos sentidos: por un lado, se trata de un desplazamiento físico, por otro, la palabra desplazada habla también de la condición secundaria que adquiere la arquitectura ante el drama vital y de supervivencia que afectó a los exiliados. Así pues, a un desplazamiento físico, verificable, se une un desplazamiento en cuanto al nivel de importancia y de atención asignado a la arquitectura. El trabajo comprende una introducción, cuatro capítulos, y un epílogo, a modo de conclusión. A lo largo de dichos capítulos se conjugan el enfoque individual en la obra de uno de estos arquitectos desterrados, Rafael Bergamín, y la visión “coral” de diversas trayectorias vitales que enfrentaron un destino común. Se elige la figura de Bergamín como eje de desarrollo debido a la presencia significativa que tuvo su obra tanto en España como en Venezuela, y por la caracterización de la misma como obra construida en colaboración. La introducción, “Exilios arquitectónicos”, muestra el sustrato estructural, la fundamentación y la metodología empleada, incluyendo “problematizaciones” sobre el exilio arquitectónico. El primer capítulo, “Memoria de partida”, da cuenta de la formación y actuación, durante la preguerra, de los arquitectos españoles que saldrían al exilio. Se introduce un esquema de base generacional y se revela un panorama para nada unívoco. El segundo capítulo, “Guerra y salida al exilio”, aborda la actuación de dichos arquitectos durante la contienda bélica así como la posterior dispersión general del exilio. El tercer capítulo, “Construir desde lo que se desvanece. Arquitectos del exilio español en Venezuela”, propone diversos presupuestos conceptuales en torno al tema del desplazamiento en la arquitectura, revisando la adscripción disciplinar y profesional de los arquitectos españoles exiliados en Venezuela. El cuarto capítulo, “El regreso”, versa sobre el recorrido final de estos arquitectos. Como marco general, se revisa su itinerario de regreso o, en muchos casos, la imposibilidad de retorno. Por último, se dispone la fuente de los diversos documentos de archivos y repositorios, así como el aparato bibliográfico y referencial, empleados en la investigación. Tres anexos se adjuntan al corpus del trabajo. El primero presenta documentos inéditos, hallados durante el pertinente proceso de investigación; el segundo, dibujos de Bergamín, básicamente de las primeras décadas del siglo XX: caricaturas, anuncios y trabajos de la Escuela; el tercero, un esbozo biográfico de los arquitectos del exilio español. ABSTRACT The 20th Century has been the century of displacements. An enormous number of people were forced to leave their homelands for political or economic reasons, which generated a gap that in most of the cases would be unrecoverable. The hardships that people had to endure in Europe, the opportunities that emerged in American countries, or the pressure exerted by totalitarian regimes drove a good number of European professionals, artists and intellectuals to American territory. This research study is intended to investigate one of those migrations that settled in Latin America during the first half of the 20th century: the one of the Spanish architects that were forced into exile. To achieve this, an attempt was made to expose not only their contributions but also the influence that the culture of the countries which welcomed them exerted in their work. Venezuela received a large portion of Spanish architects who were displaced as a consequence of the Civil War. After Mexico, it was the country that sheltered the greatest number of persons. The arrival of these exiled Spanish architects coincided with the moment in which the Venezuelan society – based on agriculture and commerce – would witness the impact of the revolution of the oil industry. Thus, their arrival supposed not only experiencing the dramatic loss of their previous world – implicit in the notion of the exile – but also settling in a society going through a profound change process. In both cases it was about “two worlds that were vanishing.” The assumption of these architects’ work is regarded as a displaced architecture. A displacement that takes place in two ways: on one hand, there was a physical displacement, and on the other hand, the word displaced also talks about the second place that architecture is given when confronted with the urgent drama of survival that affected the exiled community. Hence, a physical, verifiable displacement is combined with a displacement that has to do with the importance and the attention given to architecture. This research study encompasses an introduction, four chapters, and an epilogue as a conclusion. Throughout the chapters, the individual approach to the work of one of these exiled architects, Rafael Bergamín, runs in parallel to an overall view of various other architects’ career paths that faced a common destiny. The work of the architect Bergamín was chosen as the center of this research study due to the significant presence that his work had in Spain as well as in Venezuela, and because its main characteristic was that it was built in collaboration with other architects. The introduction, “Architectural exiles”, shows the structural contextualization, the explanatory thesis statement and the methodology used, including “problematizations” about the architectural exile. The first chapter, “Memory of departure”, contains the academic background and performance during the pre-war time of the Spanish architects that would go into exile. An outline based on different generations and revealing an unambiguous perspective is introduced. The second chapter, “War and departure into exile”, tackles the performance of the Spanish architects during the war, as well as the following general diaspora into exile. The third chapter, “Building from what vanishes. Architects of the Spanish exile in Venezuela”, proposes various conceptual assumptions concerning the topic of displacement in architecture according to the doctrine and professional affiliations of the Spanish architects exiled in Venezuela. The fourth chapter, “The return”, deals with the end of these architects’ careers. As a general framework, their itineraries to return, or in many cases, the impossibility of returning, are reviewed. Finally, the sources to the various documents of files and repositories, as well as the bibliographical references consulted for the research, are provided. Three annexes have been attached to this research study. The first annex contains unpublished documents found during the research process; the second includes Bergamín’s drawings, basically from the first decades of the 20th century, such as, caricatures, advertisements and assignments done when he was a university student; and the third annex presents a biographical outline of the architects of the Spanish exile.

Analysis of alternative tendering mechanisms for transportation Public-Private Partnerships

This paper describes a theoretical model based primarily on transaction costs, for comparing the various tendering mechanisms used for transportation Public-Private Partnership (PPP) projects. In particular, the model contrasts negotiated procedures with the open procedure, as defined by the current European Union legislation on public tendering. The model includes both ex ante transaction costs (borne during the tendering stage) and ex post transaction costs (such as enforcement costs, re-negotiation costs, and costs arising from litigation between partners), explaining the trade-off between them. Generally speaking, it is assumed that the open procedure implies lower transaction costs ex ante, while the negotiated procedure reduces the probability of the appearance of new contingencies not foreseen in the contract, hence diminishing the expected value of transaction costs ex post. Therefore, the balance between ex ante and ex post transaction costs is the main criterion for deciding whether the open or negotiated procedure would be optimal. Notwithstanding, empirical evidence currently exists only on ex ante transaction costs in transportation infrastructure projects. This evidence has shown a relevant difference between the two procedures as far as ex ante costs are concerned, favouring the open procedure. The model developed in this paper also demonstrates that a larger degree of complexity in a contract does not unequivocally favour the use of a negotiated procedure. Only in those cases dealing with very innovative projects, where important dimensions of the quality of the asset or service are not verifiable, may we observe an advantage in favour of the negotiated procedure. The bottom line is that we find it difficult to justify the employment of negotiated procedures in most transportation PPP contracts, especially in the field of roads. Nevertheless, the field remains open for future empirical work and research on the levels of transaction costs borne ex post in PPP contracts, as well as on the probabilities of such costs appearing under any of the procurement procedures.

Region-dependent vehicle classification using PCA features

Video-based vehicle detection is the focus of increasing interest due to its potential towards collision avoidance. In particular, vehicle verification is especially challenging due to the enormous variability of vehicles in size, color, pose, etc. In this paper, a new approach based on supervised learning using Principal Component Analysis (PCA) is proposed that addresses the main limitations of existing methods. Namely, in contrast to classical approaches which train a single classifier regardless of the relative position of the candidate (thus ignoring valuable pose information), a region-dependent analysis is performed by considering four different areas. In addition, a study on the evolution of the classification performance according to the dimensionality of the principal subspace is carried out using PCA features within a SVM-based classification scheme. Indeed, the experiments performed on a publicly available database prove that PCA dimensionality requirements are region-dependent. Hence, in this work, the optimal configuration is adapted to each of them, rendering very good vehicle verification results.

High reynolds numbers turbulent boundary layers

Esta tesis estudia las similitudes y diferencias entre los flujos turbulentos de pared de tipo externo e interno, en régimen incompresible, y a números de Reynolds moderada¬mente altos. Para ello consideramos tanto simulaciones numéricas como experimentos de capas límites con gradiente de presiones nulo y de flujos de canal, ambos a números de Reynolds en el rango δ+ ~ 500 - 2000. Estos flujos de cortadura son objeto de numerosas investigaciones debido a la gran importancia que tienen tanto a nivel tecnológico como a nivel de física fundamental. No obstante, todavía existen muchos interrogantes sobre aspectos básicos tales como la universalidad de los perfiles medios y de fluctuación de las velocidades o de la presión, tanto en la zona cercana a la pared como en la zona logarítmica, el escalado y el efecto del número de Reynolds, o las diferencias entre los flujos internos y externos en la zona exterior. En éste estudio hemos utilizado simulaciones numéricas ya existentes de canales y capas límites a números de Reynolds δ+ ~ 2000 y δ+ ~ 700, respectivamente. Para poder comparar ambos flujos a igual número de Reynolds hemos realizado una nueva simulación directa de capa límite en el rango δ+ ~ 1000-2000. Los resultados de la misma son presentados y analizados en detalle. Los datos sin postprocesar y las estadísticas ya postprocesadas están públicamente disponibles en nuestro sitio web.162 El análisis de las estadísticas usando un único punto confirma la existencia de perfiles logarítmicos para las fluctuaciones de la velocidad transversal w'2+ y de la presión p'2+ en ambos tipos de flujos, pero no para la velocidad normal v'2+ o la velocidad longitudinal u'2+. Para aceptar o rechazar la existencia de un rango logarítmico en u'2+ se requieren números de Reynolds más altos que los considerados en éste trabajo. Una de las conse¬cuencias más importantes de poseer tales perfiles es que el valor máximo de la intensidad, que se alcanza cerca de la pared, depende explícitamente del número de Reynolds. Esto ha sido confirmado tras analizar un gran número de datos experimentales y numéricos, cor¬roborando que el máximo de u'2+, p/2+, y w'2+ aumenta proporcionalmente con el log(δ+). Por otro lado, éste máximo es más intenso en los flujos externos que en los internos. La máxima diferencia ocurre en torno a y/δ ~ 0.3-0.5, siendo esta altura prácticamente independiente del número de Reynolds considerado. Estas diferencias se originan como consecuencia del carácter intermitente de las capas límites, que es inexistente en los flujos internos. La estructura de las fluctuaciones de velocidad y de presión, junto con la de los esfuer¬zos de Reynolds, se han investigado por medio de correlaciones espaciales tridimensionales considerando dos puntos de medida. Hemos obtenido que el tamaño de las mismas es gen¬eralmente mayor en canales que en capas límites, especialmente en el caso de la correlación longitudinal Cuu en la dirección del flujo. Para esta correlación se demuestra que las es¬tructuras débilmente correladas presentan longitudes de hasta 0(75), en el caso de capas límites, y de hasta 0(185) en el caso de canales. Estas longitudes se obtienen respecti-vamente en la zona logarítmica y en la zona exterior. Las longitudes correspondientes en la dirección transversal son significativamente menores en ambos flujos, 0(5 — 25). La organización espacial de las correlaciones es compatible con la de una pareja de rollos casi paralelos con dimensiones que escalan en unidades exteriores. Esta organización se mantiene al menos hasta y ~ 0.65, altura a la cual las capas límites comienzan a organi¬zarse en rollos transversales. Este comportamiento es sin embargo más débil en canales, pudiéndose observar parcialmente a partir de y ~ 0.85. Para estudiar si estas estructuras están onduladas a lo largo de la dirección transver¬sal, hemos calculado las correlaciones condicionadas a eventos intensos de la velocidad transversal w'. Estas correlaciones revelan que la ondulación de la velocidad longitudinal aumenta conforme nos alejamos de la pared, sugiriendo que las estructuras están más alineadas en la zona cercana a la pared que en la zona lejana a ella. El por qué de esta ondulación se encuentra posiblemente en la configuración a lo largo de diagonales que presenta w'. Estas estructuras no sólo están onduladas, sino que también están inclinadas respecto a la pared con ángulos que dependen de la variable considerada, de la altura, y de el contorno de correlación seleccionado. Por encima de la zona tampón e independien¬temente del número de Reynolds y tipo de flujo, Cuu presenta una inclinación máxima de unos 10°, las correlaciones Cvv y Cm son esencialmente verticales, y Cww está inclinada a unos 35°. Summary This thesis studies the similitudes and differences between external and internal in¬compressible wall-bounded turbulent flows at moderately-high Reynolds numbers. We consider numerical and experimental zero-pressure-gradient boundary layers and chan¬nels in the range of δ+ ~ 500 — 2000. These shear flows are subjects of intensive research because of their technological importance and fundamental physical interest. However, there are still open questions regarding basic aspects such as the universality of the mean and fluctuating velocity and pressure profiles at the near-wall and logarithmic regions, their scaling and the effect of the Reynolds numbers, or the differences between internal and external flows at the outer layer, to name but a few. For this study, we made use of available direct numerical simulations of channel and boundary layers reaching δ+ ~ 2000 and δ+ ~ 700, respectively. To fill the gap in the Reynolds number, a new boundary layer simulation in the range δ+ ~ 1000-2000 is presented and discussed. The original raw data and the post-processed statistics are publicly available on our website.162 The analysis of the one-point statistic confirms the existence of logarithmic profiles for the spanwise w'2+ and pressure p'2+ fluctuations for both type of flows, but not for the wall-normal v'2+ or the streamwise u'2+ velocities. To accept or reject the existence of a logarithmic range in u'2+ requires higher Reynolds numbers than the ones considered in this work. An important consequence of having such profiles is that the maximum value of the intensities, reached near the wall, depends on the Reynolds number. This was confirmed after surveying a wide number of experimental and numerical datasets, corrob¬orating that the maximum of ul2+, p'2+, and w'2+ increases proportionally to log(δ+). On the other hand, that maximum is more intense in external flows than in internal ones, differing the most around y/δ ~ 0.3-0.5, and essentially independent of the Reynolds number. We discuss that those differences are originated as a consequence of the inter¬mittent character of boundary layers that is absent in internal flows. The structure of the velocity and pressure fluctuations, together with those of the Reynolds shear stress, were investigated using three-dimensional two-point spatial correlations. We find that the correlations extend over longer distances in channels than in boundary layers, especially in the case of the streamwise correlation Cuu in the flow direc-tion. For weakly correlated structures, the maximum streamwise length of Cuu is O(78) for boundary layers and O(188) for channels, attained at the logarithmic and outer regions respectively. The corresponding lengths for the transverse velocities and for the pressure are shorter, 0(8 — 28), and of the same order for both flows. The spatial organization of the velocity correlations is shown to be consistent with a pair of quasi-streamwise rollers that scales in outer units. That organization is observed until y ~ 0.68, from which boundary layers start to organize into spanwise rollers. This effect is weaker in channels, and it appears at y ~ 0.88. We present correlations conditioned to intense events of the transversal velocity, w', to study if these structures meander along the spanwise direction. The results indicate that the streamwise velocity streaks increase their meandering proportionally to the distance to the wall, suggesting that the structures are more aligned close to the wall than far from it. The reason behind this meandering is probably due to the characteristic organization along diagonals of w'. These structures not only meander along the spanwise direction, but they are also inclined to the wall at angles that depend on the distance from the wall, on the variable being considered, and on the correlation level used to define them. Above the buffer layer and independent of the Reynolds numbers and type of flow, the maximum inclination of Cuu is about 10°, Cvv and Cpp are roughly vertical, and Cww is inclined by 35°.

Nueva estrategia de mercado en el sector de la moda: "Caso Blanco"

Este proyecto está realizado bajo el punto de vista del director de estrategia de la compañía, y tomando como punto de partida la situación de la marca a fecha de la adquisición por parte del grupo Alhokair, Enero del 2014. El objetivo es presentar al nuevo propietario de Blanco la estrategia a seguir, para no perder la esencia de la marca y a su vez generar valor, tanto económico como corporativo. Para su desarrollo es necesario disponer de información del sector veraz y contrastable. Por ello el estudio se realizará en base a la documentación obtenida de entidades fiables (cifras de negocio, situación de los mercados correspondientes al sector de la moda, entre otros datos mostrados); como son ACOTEX (Asociación Empresarial del Comercio Textil y Complementos, representativa de los empresarios y autónomos del sector y fundada en 1977), el ICEX (entidad pública empresarial de ámbito nacional encargada de promover la internacionalización de las empresas españolas), el INE (Instituto Nacional de Estadística) y el BORME (Boletín Oficial del Registro Mercantil). También en base a potenciales publicaciones web del sector como Modaes.es2, y prensa económica; Expansión3, Cinco días4 y el Economista5. Además de estas publicaciones y organismos, existen una gran cantidad de especialistas del sector que escriben artículos en prensa y en blogs, y que realizan charlas en importantes escuelas de moda y eventos, que han sido de gran ayuda para poder posicionarme con ‘comodidad’ en el rol que he asumido. Toda esta información; cuantitativa y cualitativa, basada en cifras, datos, estadísticas, conocimientos, experiencia y opiniones, junto con los conocimientos adquiridos en el Máster de Consultoría de Gestión de Empresas, principalmente en el módulo de estrategia, pero apoyándome e hilando con en el resto de módulos, he realizado este análisis y plan de acción con el fin de hacer renacer a Blanco. ---ABSTRACT---This project is conducted by the view of the director of company strategy, and taking as starting point the status of the brand as of the acquisition by the Alhokair group in January 2014. Aims to present the new owner Blanco's strategy to continue to keep the essence of the brand and in turn create economic and corporate value. For its development is necessary to have accurate and verifiable information of the sector. Therefore, the study will be based on documentation obtained from reliable entities. All quantitative and qualitative information based on facts, figures, statistics, knowledge, experience and views, along with the knowledge acquired in the Máster de Consultoría de Gestión de Empresas, mainly in the form of strategy, but leaning and spinning with the other modules, I have performed this analysis and action plan in order to be reborn Blanco.

A machine learning approach to identify clinical trials involving nanodrugs and nanodevices from ClinicalTrials.gov

BACKGROUND: Clinical Trials (CTs) are essential for bridging the gap between experimental research on new drugs and their clinical application. Just like CTs for traditional drugs and biologics have helped accelerate the translation of biomedical findings into medical practice, CTs for nanodrugs and nanodevices could advance novel nanomaterials as agents for diagnosis and therapy. Although there is publicly available information about nanomedicine-related CTs, the online archiving of this information is carried out without adhering to criteria that discriminate between studies involving nanomaterials or nanotechnology-based processes (nano), and CTs that do not involve nanotechnology (non-nano). Finding out whether nanodrugs and nanodevices were involved in a study from CT summaries alone is a challenging task. At the time of writing, CTs archived in the well-known online registry ClinicalTrials.gov are not easily told apart as to whether they are nano or non-nano CTs-even when performed by domain experts, due to the lack of both a common definition for nanotechnology and of standards for reporting nanomedical experiments and results. METHODS: We propose a supervised learning approach for classifying CT summaries from ClinicalTrials.gov according to whether they fall into the nano or the non-nano categories. Our method involves several stages: i) extraction and manual annotation of CTs as nano vs. non-nano, ii) pre-processing and automatic classification, and iii) performance evaluation using several state-of-the-art classifiers under different transformations of the original dataset. RESULTS AND CONCLUSIONS: The performance of the best automated classifier closely matches that of experts (AUC over 0.95), suggesting that it is feasible to automatically detect the presence of nanotechnology products in CT summaries with a high degree of accuracy. This can significantly speed up the process of finding whether reports on ClinicalTrials.gov might be relevant to a particular nanoparticle or nanodevice, which is essential to discover any precedents for nanotoxicity events or advantages for targeted drug therapy.

A new label fusion method using graph cuts: application to hippocampus segmentation

The aim of this paper is to develop a probabilistic modeling framework for the segmentation of structures of interest from a collection of atlases. Given a subset of registered atlases into the target image for a particular Region of Interest (ROI), a statistical model of appearance and shape is computed for fusing the labels. Segmentations are obtained by minimizing an energy function associated with the proposed model, using a graph-cut technique. We test different label fusion methods on publicly available MR images of human brains.

A free real-time hourly tilted solar irradiation data Website for Europe

The engineering of solar power applications, such as photovoltaic energy (PV) or thermal solar energy requires the knowledge of the solar resource available for the solar energy system. This solar resource is generally obtained from datasets, and is either measured by ground-stations, through the use of pyranometers, or by satellites. The solar irradiation data are generally not free, and their cost can be high, in particular if high temporal resolution is required, such as hourly data. In this work, we present an alternative method to provide free hourly global solar tilted irradiation data for the whole European territory through a web platform. The method that we have developed generates solar irradiation data from a combination of clear-sky simulations and weather conditions data. The results are publicly available for free through Soweda, a Web interface. To our knowledge, this is the first time that hourly solar irradiation data are made available online, in real-time, and for free, to the public. The accuracy of these data is not suitable for applications that require high data accuracy, but can be very useful for other applications that only require a rough estimate of solar irradiation.

A digital framework to build, visualize and analyze a gene expression atlas with cellular resolution in zebrafish early embryogenesis

A gene expression atlas is an essential resource to quantify and understand the multiscale processes of embryogenesis in time and space. The automated reconstruction of a prototypic 4D atlas for vertebrate early embryos, using multicolor fluorescence in situ hybridization with nuclear counterstain, requires dedicated computational strategies. To this goal, we designed an original methodological framework implemented in a software tool called Match-IT. With only minimal human supervision, our system is able to gather gene expression patterns observed in different analyzed embryos with phenotypic variability and map them onto a series of common 3D templates over time, creating a 4D atlas. This framework was used to construct an atlas composed of 6 gene expression templates from a cohort of zebrafish early embryos spanning 6 developmental stages from 4 to 6.3 hpf (hours post fertilization). They included 53 specimens, 181,415 detected cell nuclei and the segmentation of 98 gene expression patterns observed in 3D for 9 different genes. In addition, an interactive visualization software, Atlas-IT, was developed to inspect, supervise and analyze the atlas. Match-IT and Atlas-IT, including user manuals, representative datasets and video tutorials, are publicly and freely available online. We also propose computational methods and tools for the quantitative assessment of the gene expression templates at the cellular scale, with the identification, visualization and analysis of coexpression patterns, synexpression groups and their dynamics through developmental stages.

Background foreground segmentation with RGB-D Kinect data: An efficient combination of classifiers

Low cost RGB-D cameras such as the Microsoft’s Kinect or the Asus’s Xtion Pro are completely changing the computer vision world, as they are being successfully used in several applications and research areas. Depth data are particularly attractive and suitable for applications based on moving objects detection through foreground/background segmentation approaches; the RGB-D applications proposed in literature employ, in general, state of the art foreground/background segmentation techniques based on the depth information without taking into account the color information. The novel approach that we propose is based on a combination of classifiers that allows improving background subtraction accuracy with respect to state of the art algorithms by jointly considering color and depth data. In particular, the combination of classifiers is based on a weighted average that allows to adaptively modifying the support of each classifier in the ensemble by considering foreground detections in the previous frames and the depth and color edges. In this way, it is possible to reduce false detections due to critical issues that can not be tackled by the individual classifiers such as: shadows and illumination changes, color and depth camouflage, moved background objects and noisy depth measurements. Moreover, we propose, for the best of the author’s knowledge, the first publicly available RGB-D benchmark dataset with hand-labeled ground truth of several challenging scenarios to test background/foreground segmentation algorithms.

Mining mobile apps reviews to support release planning

The mobile apps market is a tremendous success, with millions of apps downloaded and used every day by users spread all around the world. For apps’ developers, having their apps published on one of the major app stores (e.g. Google Play market) is just the beginning of the apps lifecycle. Indeed, in order to successfully compete with the other apps in the market, an app has to be updated frequently by adding new attractive features and by fixing existing bugs. Clearly, any developer interested in increasing the success of her app should try to implement features desired by the app’s users and to fix bugs affecting the user experience of many of them. A precious source of information to decide how to collect users’ opinions and wishes is represented by the reviews left by users on the store from which they downloaded the app. However, to exploit such information the app’s developer should manually read each user review and verify if it contains useful information (e.g. suggestions for new features). This is something not doable if the app receives hundreds of reviews per day, as happens for the very popular apps on the market. In this work, our aim is to provide support to mobile apps developers by proposing a novel approach exploiting data mining, natural language processing, machine learning, and clustering techniques in order to classify the user reviews on the basis of the information they contain (e.g. useless, suggestion for new features, bugs reporting). Such an approach has been empirically evaluated and made available in a web-­‐based tool publicly available to all apps’ developers. The achieved results showed that the developed tool: (i) is able to correctly categorise user reviews on the basis of their content (e.g. isolating those reporting bugs) with 78% of accuracy, (ii) produces clusters of reviews (e.g. groups together reviews indicating exactly the same bug to be fixed) that are meaningful from a developer’s point-­‐of-­‐view, and (iii) is considered useful by a software company working in the mobile apps’ development market.

Parametric and structural self-adaptation of embedded systems using evolvable hardware

Los sistemas empotrados han sido concebidos tradicionalmente como sistemas de procesamiento específicos que realizan una tarea fija durante toda su vida útil. Para cumplir con requisitos estrictos de coste, tamaño y peso, el equipo de diseño debe optimizar su funcionamiento para condiciones muy específicas. Sin embargo, la demanda de mayor versatilidad, un funcionamiento más inteligente y, en definitiva, una mayor capacidad de procesamiento comenzaron a chocar con estas limitaciones, agravado por la incertidumbre asociada a entornos de operación cada vez más dinámicos donde comenzaban a ser desplegados progresivamente. Esto trajo como resultado una necesidad creciente de que los sistemas pudieran responder por si solos a eventos inesperados en tiempo diseño tales como: cambios en las características de los datos de entrada y el entorno del sistema en general; cambios en la propia plataforma de cómputo, por ejemplo debido a fallos o defectos de fabricación; y cambios en las propias especificaciones funcionales causados por unos objetivos del sistema dinámicos y cambiantes. Como consecuencia, la complejidad del sistema aumenta, pero a cambio se habilita progresivamente una capacidad de adaptación autónoma sin intervención humana a lo largo de la vida útil, permitiendo que tomen sus propias decisiones en tiempo de ejecución. Éstos sistemas se conocen, en general, como sistemas auto-adaptativos y tienen, entre otras características, las de auto-configuración, auto-optimización y auto-reparación. Típicamente, la parte soft de un sistema es mayoritariamente la única utilizada para proporcionar algunas capacidades de adaptación a un sistema. Sin embargo, la proporción rendimiento/potencia en dispositivos software como microprocesadores en muchas ocasiones no es adecuada para sistemas empotrados. En este escenario, el aumento resultante en la complejidad de las aplicaciones está siendo abordado parcialmente mediante un aumento en la complejidad de los dispositivos en forma de multi/many-cores; pero desafortunadamente, esto hace que el consumo de potencia también aumente. Además, la mejora en metodologías de diseño no ha sido acorde como para poder utilizar toda la capacidad de cómputo disponible proporcionada por los núcleos. Por todo ello, no se están satisfaciendo adecuadamente las demandas de cómputo que imponen las nuevas aplicaciones. La solución tradicional para mejorar la proporción rendimiento/potencia ha sido el cambio a unas especificaciones hardware, principalmente usando ASICs. Sin embargo, los costes de un ASIC son altamente prohibitivos excepto en algunos casos de producción en masa y además la naturaleza estática de su estructura complica la solución a las necesidades de adaptación. Los avances en tecnologías de fabricación han hecho que la FPGA, una vez lenta y pequeña, usada como glue logic en sistemas mayores, haya crecido hasta convertirse en un dispositivo de cómputo reconfigurable de gran potencia, con una cantidad enorme de recursos lógicos computacionales y cores hardware empotrados de procesamiento de señal y de propósito general. Sus capacidades de reconfiguración han permitido combinar la flexibilidad propia del software con el rendimiento del procesamiento en hardware, lo que tiene la potencialidad de provocar un cambio de paradigma en arquitectura de computadores, pues el hardware no puede ya ser considerado más como estático. El motivo es que como en el caso de las FPGAs basadas en tecnología SRAM, la reconfiguración parcial dinámica (DPR, Dynamic Partial Reconfiguration) es posible. Esto significa que se puede modificar (reconfigurar) un subconjunto de los recursos computacionales en tiempo de ejecución mientras el resto permanecen activos. Además, este proceso de reconfiguración puede ser ejecutado internamente por el propio dispositivo. El avance tecnológico en dispositivos hardware reconfigurables se encuentra recogido bajo el campo conocido como Computación Reconfigurable (RC, Reconfigurable Computing). Uno de los campos de aplicación más exóticos y menos convencionales que ha posibilitado la computación reconfigurable es el conocido como Hardware Evolutivo (EHW, Evolvable Hardware), en el cual se encuentra enmarcada esta tesis. La idea principal del concepto consiste en convertir hardware que es adaptable a través de reconfiguración en una entidad evolutiva sujeta a las fuerzas de un proceso evolutivo inspirado en el de las especies biológicas naturales, que guía la dirección del cambio. Es una aplicación más del campo de la Computación Evolutiva (EC, Evolutionary Computation), que comprende una serie de algoritmos de optimización global conocidos como Algoritmos Evolutivos (EA, Evolutionary Algorithms), y que son considerados como algoritmos universales de resolución de problemas. En analogía al proceso biológico de la evolución, en el hardware evolutivo el sujeto de la evolución es una población de circuitos que intenta adaptarse a su entorno mediante una adecuación progresiva generación tras generación. Los individuos pasan a ser configuraciones de circuitos en forma de bitstreams caracterizados por descripciones de circuitos reconfigurables. Seleccionando aquellos que se comportan mejor, es decir, que tienen una mejor adecuación (o fitness) después de ser evaluados, y usándolos como padres de la siguiente generación, el algoritmo evolutivo crea una nueva población hija usando operadores genéticos como la mutación y la recombinación. Según se van sucediendo generaciones, se espera que la población en conjunto se aproxime a la solución óptima al problema de encontrar una configuración del circuito adecuada que satisfaga las especificaciones. El estado de la tecnología de reconfiguración después de que la familia de FPGAs XC6200 de Xilinx fuera retirada y reemplazada por las familias Virtex a finales de los 90, supuso un gran obstáculo para el avance en hardware evolutivo; formatos de bitstream cerrados (no conocidos públicamente); dependencia de herramientas del fabricante con soporte limitado de DPR; una velocidad de reconfiguración lenta; y el hecho de que modificaciones aleatorias del bitstream pudieran resultar peligrosas para la integridad del dispositivo, son algunas de estas razones. Sin embargo, una propuesta a principios de los años 2000 permitió mantener la investigación en el campo mientras la tecnología de DPR continuaba madurando, el Circuito Virtual Reconfigurable (VRC, Virtual Reconfigurable Circuit). En esencia, un VRC en una FPGA es una capa virtual que actúa como un circuito reconfigurable de aplicación específica sobre la estructura nativa de la FPGA que reduce la complejidad del proceso reconfiguración y aumenta su velocidad (comparada con la reconfiguración nativa). Es un array de nodos computacionales especificados usando descripciones HDL estándar que define recursos reconfigurables ad-hoc: multiplexores de rutado y un conjunto de elementos de procesamiento configurables, cada uno de los cuales tiene implementadas todas las funciones requeridas, que pueden seleccionarse a través de multiplexores tal y como ocurre en una ALU de un microprocesador. Un registro grande actúa como memoria de configuración, por lo que la reconfiguración del VRC es muy rápida ya que tan sólo implica la escritura de este registro, el cual controla las señales de selección del conjunto de multiplexores. Sin embargo, esta capa virtual provoca: un incremento de área debido a la implementación simultánea de cada función en cada nodo del array más los multiplexores y un aumento del retardo debido a los multiplexores, reduciendo la frecuencia de funcionamiento máxima. La naturaleza del hardware evolutivo, capaz de optimizar su propio comportamiento computacional, le convierten en un buen candidato para avanzar en la investigación sobre sistemas auto-adaptativos. Combinar un sustrato de cómputo auto-reconfigurable capaz de ser modificado dinámicamente en tiempo de ejecución con un algoritmo empotrado que proporcione una dirección de cambio, puede ayudar a satisfacer los requisitos de adaptación autónoma de sistemas empotrados basados en FPGA. La propuesta principal de esta tesis está por tanto dirigida a contribuir a la auto-adaptación del hardware de procesamiento de sistemas empotrados basados en FPGA mediante hardware evolutivo. Esto se ha abordado considerando que el comportamiento computacional de un sistema puede ser modificado cambiando cualquiera de sus dos partes constitutivas: una estructura hard subyacente y un conjunto de parámetros soft. De esta distinción, se derivan dos lineas de trabajo. Por un lado, auto-adaptación paramétrica, y por otro auto-adaptación estructural. El objetivo perseguido en el caso de la auto-adaptación paramétrica es la implementación de técnicas de optimización evolutiva complejas en sistemas empotrados con recursos limitados para la adaptación paramétrica online de circuitos de procesamiento de señal. La aplicación seleccionada como prueba de concepto es la optimización para tipos muy específicos de imágenes de los coeficientes de los filtros de transformadas wavelet discretas (DWT, DiscreteWavelet Transform), orientada a la compresión de imágenes. Por tanto, el objetivo requerido de la evolución es una compresión adaptativa y más eficiente comparada con los procedimientos estándar. El principal reto radica en reducir la necesidad de recursos de supercomputación para el proceso de optimización propuesto en trabajos previos, de modo que se adecúe para la ejecución en sistemas empotrados. En cuanto a la auto-adaptación estructural, el objetivo de la tesis es la implementación de circuitos auto-adaptativos en sistemas evolutivos basados en FPGA mediante un uso eficiente de sus capacidades de reconfiguración nativas. En este caso, la prueba de concepto es la evolución de tareas de procesamiento de imagen tales como el filtrado de tipos desconocidos y cambiantes de ruido y la detección de bordes en la imagen. En general, el objetivo es la evolución en tiempo de ejecución de tareas de procesamiento de imagen desconocidas en tiempo de diseño (dentro de un cierto grado de complejidad). En este caso, el objetivo de la propuesta es la incorporación de DPR en EHW para evolucionar la arquitectura de un array sistólico adaptable mediante reconfiguración cuya capacidad de evolución no había sido estudiada previamente. Para conseguir los dos objetivos mencionados, esta tesis propone originalmente una plataforma evolutiva que integra un motor de adaptación (AE, Adaptation Engine), un motor de reconfiguración (RE, Reconfiguration Engine) y un motor computacional (CE, Computing Engine) adaptable. El el caso de adaptación paramétrica, la plataforma propuesta está caracterizada por: • un CE caracterizado por un núcleo de procesamiento hardware de DWT adaptable mediante registros reconfigurables que contienen los coeficientes de los filtros wavelet • un algoritmo evolutivo como AE que busca filtros wavelet candidatos a través de un proceso de optimización paramétrica desarrollado específicamente para sistemas caracterizados por recursos de procesamiento limitados • un nuevo operador de mutación simplificado para el algoritmo evolutivo utilizado, que junto con un mecanismo de evaluación rápida de filtros wavelet candidatos derivado de la literatura actual, asegura la viabilidad de la búsqueda evolutiva asociada a la adaptación de wavelets. En el caso de adaptación estructural, la plataforma propuesta toma la forma de: • un CE basado en una plantilla de array sistólico reconfigurable de 2 dimensiones compuesto de nodos de procesamiento reconfigurables • un algoritmo evolutivo como AE que busca configuraciones candidatas del array usando un conjunto de funcionalidades de procesamiento para los nodos disponible en una biblioteca accesible en tiempo de ejecución • un RE hardware que explota la capacidad de reconfiguración nativa de las FPGAs haciendo un uso eficiente de los recursos reconfigurables del dispositivo para cambiar el comportamiento del CE en tiempo de ejecución • una biblioteca de elementos de procesamiento reconfigurables caracterizada por bitstreams parciales independientes de la posición, usados como el conjunto de configuraciones disponibles para los nodos de procesamiento del array Las contribuciones principales de esta tesis se pueden resumir en la siguiente lista: • Una plataforma evolutiva basada en FPGA para la auto-adaptación paramétrica y estructural de sistemas empotrados compuesta por un motor computacional (CE), un motor de adaptación (AE) evolutivo y un motor de reconfiguración (RE). Esta plataforma se ha desarrollado y particularizado para los casos de auto-adaptación paramétrica y estructural. • En cuanto a la auto-adaptación paramétrica, las contribuciones principales son: – Un motor computacional adaptable mediante registros que permite la adaptación paramétrica de los coeficientes de una implementación hardware adaptativa de un núcleo de DWT. – Un motor de adaptación basado en un algoritmo evolutivo desarrollado específicamente para optimización numérica, aplicada a los coeficientes de filtros wavelet en sistemas empotrados con recursos limitados. – Un núcleo IP de DWT auto-adaptativo en tiempo de ejecución para sistemas empotrados que permite la optimización online del rendimiento de la transformada para compresión de imágenes en entornos específicos de despliegue, caracterizados por tipos diferentes de señal de entrada. – Un modelo software y una implementación hardware de una herramienta para la construcción evolutiva automática de transformadas wavelet específicas. • Por último, en cuanto a la auto-adaptación estructural, las contribuciones principales son: – Un motor computacional adaptable mediante reconfiguración nativa de FPGAs caracterizado por una plantilla de array sistólico en dos dimensiones de nodos de procesamiento reconfigurables. Es posible mapear diferentes tareas de cómputo en el array usando una biblioteca de elementos sencillos de procesamiento reconfigurables. – Definición de una biblioteca de elementos de procesamiento apropiada para la síntesis autónoma en tiempo de ejecución de diferentes tareas de procesamiento de imagen. – Incorporación eficiente de la reconfiguración parcial dinámica (DPR) en sistemas de hardware evolutivo, superando los principales inconvenientes de propuestas previas como los circuitos reconfigurables virtuales (VRCs). En este trabajo también se comparan originalmente los detalles de implementación de ambas propuestas. – Una plataforma tolerante a fallos, auto-curativa, que permite la recuperación funcional online en entornos peligrosos. La plataforma ha sido caracterizada desde una perspectiva de tolerancia a fallos: se proponen modelos de fallo a nivel de CLB y de elemento de procesamiento, y usando el motor de reconfiguración, se hace un análisis sistemático de fallos para un fallo en cada elemento de procesamiento y para dos fallos acumulados. – Una plataforma con calidad de filtrado dinámica que permite la adaptación online a tipos de ruido diferentes y diferentes comportamientos computacionales teniendo en cuenta los recursos de procesamiento disponibles. Por un lado, se evolucionan filtros con comportamientos no destructivos, que permiten esquemas de filtrado en cascada escalables; y por otro, también se evolucionan filtros escalables teniendo en cuenta requisitos computacionales de filtrado cambiantes dinámicamente. Este documento está organizado en cuatro partes y nueve capítulos. La primera parte contiene el capítulo 1, una introducción y motivación sobre este trabajo de tesis. A continuación, el marco de referencia en el que se enmarca esta tesis se analiza en la segunda parte: el capítulo 2 contiene una introducción a los conceptos de auto-adaptación y computación autonómica (autonomic computing) como un campo de investigación más general que el muy específico de este trabajo; el capítulo 3 introduce la computación evolutiva como la técnica para dirigir la adaptación; el capítulo 4 analiza las plataformas de computación reconfigurables como la tecnología para albergar hardware auto-adaptativo; y finalmente, el capítulo 5 define, clasifica y hace un sondeo del campo del hardware evolutivo. Seguidamente, la tercera parte de este trabajo contiene la propuesta, desarrollo y resultados obtenidos: mientras que el capítulo 6 contiene una declaración de los objetivos de la tesis y la descripción de la propuesta en su conjunto, los capítulos 7 y 8 abordan la auto-adaptación paramétrica y estructural, respectivamente. Finalmente, el capítulo 9 de la parte 4 concluye el trabajo y describe caminos de investigación futuros. ABSTRACT Embedded systems have traditionally been conceived to be specific-purpose computers with one, fixed computational task for their whole lifetime. Stringent requirements in terms of cost, size and weight forced designers to highly optimise their operation for very specific conditions. However, demands for versatility, more intelligent behaviour and, in summary, an increased computing capability began to clash with these limitations, intensified by the uncertainty associated to the more dynamic operating environments where they were progressively being deployed. This brought as a result an increasing need for systems to respond by themselves to unexpected events at design time, such as: changes in input data characteristics and system environment in general; changes in the computing platform itself, e.g., due to faults and fabrication defects; and changes in functional specifications caused by dynamically changing system objectives. As a consequence, systems complexity is increasing, but in turn, autonomous lifetime adaptation without human intervention is being progressively enabled, allowing them to take their own decisions at run-time. This type of systems is known, in general, as selfadaptive, and are able, among others, of self-configuration, self-optimisation and self-repair. Traditionally, the soft part of a system has mostly been so far the only place to provide systems with some degree of adaptation capabilities. However, the performance to power ratios of software driven devices like microprocessors are not adequate for embedded systems in many situations. In this scenario, the resulting rise in applications complexity is being partly addressed by rising devices complexity in the form of multi and many core devices; but sadly, this keeps on increasing power consumption. Besides, design methodologies have not been improved accordingly to completely leverage the available computational power from all these cores. Altogether, these factors make that the computing demands new applications pose are not being wholly satisfied. The traditional solution to improve performance to power ratios has been the switch to hardware driven specifications, mainly using ASICs. However, their costs are highly prohibitive except for some mass production cases and besidesthe static nature of its structure complicates the solution to the adaptation needs. The advancements in fabrication technologies have made that the once slow, small FPGA used as glue logic in bigger systems, had grown to be a very powerful, reconfigurable computing device with a vast amount of computational logic resources and embedded, hardened signal and general purpose processing cores. Its reconfiguration capabilities have enabled software-like flexibility to be combined with hardware-like computing performance, which has the potential to cause a paradigm shift in computer architecture since hardware cannot be considered as static anymore. This is so, since, as is the case with SRAMbased FPGAs, Dynamic Partial Reconfiguration (DPR) is possible. This means that subsets of the FPGA computational resources can now be changed (reconfigured) at run-time while the rest remains active. Besides, this reconfiguration process can be triggered internally by the device itself. This technological boost in reconfigurable hardware devices is actually covered under the field known as Reconfigurable Computing. One of the most exotic fields of application that Reconfigurable Computing has enabled is the known as Evolvable Hardware (EHW), in which this dissertation is framed. The main idea behind the concept is turning hardware that is adaptable through reconfiguration into an evolvable entity subject to the forces of an evolutionary process, inspired by that of natural, biological species, that guides the direction of change. It is yet another application of the field of Evolutionary Computation (EC), which comprises a set of global optimisation algorithms known as Evolutionary Algorithms (EAs), considered as universal problem solvers. In analogy to the biological process of evolution, in EHW the subject of evolution is a population of circuits that tries to get adapted to its surrounding environment by progressively getting better fitted to it generation after generation. Individuals become circuit configurations representing bitstreams that feature reconfigurable circuit descriptions. By selecting those that behave better, i.e., with a higher fitness value after being evaluated, and using them as parents of the following generation, the EA creates a new offspring population by using so called genetic operators like mutation and recombination. As generations succeed one another, the whole population is expected to approach to the optimum solution to the problem of finding an adequate circuit configuration that fulfils system objectives. The state of reconfiguration technology after Xilinx XC6200 FPGA family was discontinued and replaced by Virtex families in the late 90s, was a major obstacle for advancements in EHW; closed (non publicly known) bitstream formats; dependence on manufacturer tools with highly limiting support of DPR; slow speed of reconfiguration; and random bitstream modifications being potentially hazardous for device integrity, are some of these reasons. However, a proposal in the first 2000s allowed to keep investigating in this field while DPR technology kept maturing, the Virtual Reconfigurable Circuit (VRC). In essence, a VRC in an FPGA is a virtual layer acting as an application specific reconfigurable circuit on top of an FPGA fabric that reduces the complexity of the reconfiguration process and increases its speed (compared to native reconfiguration). It is an array of computational nodes specified using standard HDL descriptions that define ad-hoc reconfigurable resources; routing multiplexers and a set of configurable processing elements, each one containing all the required functions, which are selectable through functionality multiplexers as in microprocessor ALUs. A large register acts as configuration memory, so VRC reconfiguration is very fast given it only involves writing this register, which drives the selection signals of the set of multiplexers. However, large overheads are introduced by this virtual layer; an area overhead due to the simultaneous implementation of every function in every node of the array plus the multiplexers, and a delay overhead due to the multiplexers, which also reduces maximum frequency of operation. The very nature of Evolvable Hardware, able to optimise its own computational behaviour, makes it a good candidate to advance research in self-adaptive systems. Combining a selfreconfigurable computing substrate able to be dynamically changed at run-time with an embedded algorithm that provides a direction for change, can help fulfilling requirements for autonomous lifetime adaptation of FPGA-based embedded systems. The main proposal of this thesis is hence directed to contribute to autonomous self-adaptation of the underlying computational hardware of FPGA-based embedded systems by means of Evolvable Hardware. This is tackled by considering that the computational behaviour of a system can be modified by changing any of its two constituent parts: an underlying hard structure and a set of soft parameters. Two main lines of work derive from this distinction. On one side, parametric self-adaptation and, on the other side, structural self-adaptation. The goal pursued in the case of parametric self-adaptation is the implementation of complex evolutionary optimisation techniques in resource constrained embedded systems for online parameter adaptation of signal processing circuits. The application selected as proof of concept is the optimisation of Discrete Wavelet Transforms (DWT) filters coefficients for very specific types of images, oriented to image compression. Hence, adaptive and improved compression efficiency, as compared to standard techniques, is the required goal of evolution. The main quest lies in reducing the supercomputing resources reported in previous works for the optimisation process in order to make it suitable for embedded systems. Regarding structural self-adaptation, the thesis goal is the implementation of self-adaptive circuits in FPGA-based evolvable systems through an efficient use of native reconfiguration capabilities. In this case, evolution of image processing tasks such as filtering of unknown and changing types of noise and edge detection are the selected proofs of concept. In general, evolving unknown image processing behaviours (within a certain complexity range) at design time is the required goal. In this case, the mission of the proposal is the incorporation of DPR in EHW to evolve a systolic array architecture adaptable through reconfiguration whose evolvability had not been previously checked. In order to achieve the two stated goals, this thesis originally proposes an evolvable platform that integrates an Adaptation Engine (AE), a Reconfiguration Engine (RE) and an adaptable Computing Engine (CE). In the case of parametric adaptation, the proposed platform is characterised by: • a CE featuring a DWT hardware processing core adaptable through reconfigurable registers that holds wavelet filters coefficients • an evolutionary algorithm as AE that searches for candidate wavelet filters through a parametric optimisation process specifically developed for systems featured by scarce computing resources • a new, simplified mutation operator for the selected EA, that together with a fast evaluation mechanism of candidate wavelet filters derived from existing literature, assures the feasibility of the evolutionary search involved in wavelets adaptation In the case of structural adaptation, the platform proposal takes the form of: • a CE based on a reconfigurable 2D systolic array template composed of reconfigurable processing nodes • an evolutionary algorithm as AE that searches for candidate configurations of the array using a set of computational functionalities for the nodes available in a run time accessible library • a hardware RE that exploits native DPR capabilities of FPGAs and makes an efficient use of the available reconfigurable resources of the device to change the behaviour of the CE at run time • a library of reconfigurable processing elements featured by position-independent partial bitstreams used as the set of available configurations for the processing nodes of the array Main contributions of this thesis can be summarised in the following list. • An FPGA-based evolvable platform for parametric and structural self-adaptation of embedded systems composed of a Computing Engine, an evolutionary Adaptation Engine and a Reconfiguration Engine. This platform is further developed and tailored for both parametric and structural self-adaptation. • Regarding parametric self-adaptation, main contributions are: – A CE adaptable through reconfigurable registers that enables parametric adaptation of the coefficients of an adaptive hardware implementation of a DWT core. – An AE based on an Evolutionary Algorithm specifically developed for numerical optimisation applied to wavelet filter coefficients in resource constrained embedded systems. – A run-time self-adaptive DWT IP core for embedded systems that allows for online optimisation of transform performance for image compression for specific deployment environments characterised by different types of input signals. – A software model and hardware implementation of a tool for the automatic, evolutionary construction of custom wavelet transforms. • Lastly, regarding structural self-adaptation, main contributions are: – A CE adaptable through native FPGA fabric reconfiguration featured by a two dimensional systolic array template of reconfigurable processing nodes. Different processing behaviours can be automatically mapped in the array by using a library of simple reconfigurable processing elements. – Definition of a library of such processing elements suited for autonomous runtime synthesis of different image processing tasks. – Efficient incorporation of DPR in EHW systems, overcoming main drawbacks from the previous approach of virtual reconfigurable circuits. Implementation details for both approaches are also originally compared in this work. – A fault tolerant, self-healing platform that enables online functional recovery in hazardous environments. The platform has been characterised from a fault tolerance perspective: fault models at FPGA CLB level and processing elements level are proposed, and using the RE, a systematic fault analysis for one fault in every processing element and for two accumulated faults is done. – A dynamic filtering quality platform that permits on-line adaptation to different types of noise and different computing behaviours considering the available computing resources. On one side, non-destructive filters are evolved, enabling scalable cascaded filtering schemes; and on the other, size-scalable filters are also evolved considering dynamically changing computational filtering requirements. This dissertation is organized in four parts and nine chapters. First part contains chapter 1, the introduction to and motivation of this PhD work. Following, the reference framework in which this dissertation is framed is analysed in the second part: chapter 2 features an introduction to the notions of self-adaptation and autonomic computing as a more general research field to the very specific one of this work; chapter 3 introduces evolutionary computation as the technique to drive adaptation; chapter 4 analyses platforms for reconfigurable computing as the technology to hold self-adaptive hardware; and finally chapter 5 defines, classifies and surveys the field of Evolvable Hardware. Third part of the work follows, which contains the proposal, development and results obtained: while chapter 6 contains an statement of the thesis goals and the description of the proposal as a whole, chapters 7 and 8 address parametric and structural self-adaptation, respectively. Finally, chapter 9 in part 4 concludes the work and describes future research paths.

Estrategias de desarrollo de la personalidad de marca en función de su consumo público y privado

Las empresas realizan fuertes inversiones en la construcción de las personalidades de las marcas bajo el supuesto –entre otros- de que las personalidades de las marcas influyen en las preferencias y decisiones de los consumidores. Existe una necesidad de expandir el conocimiento en esta área y en lugar de trabajar bajo supuestos, hacerlo bajo teorías apoyadas en evidencia empírica. Esta tesis aborda la teoría de la congruencia incorporando dimensiones hasta ahora no exploradas: la cultura latina y el sexo de los consumidores, y cómo moderan el impacto de la congruencia en las evaluaciones de marcas de consumo privado y marcas de consumo público. Si bien estudios anteriores han abordado este tema, la mayor parte de los estudios han utilizado marcas de productos adictivos (por ejemplo cerveza y cigarrillos) y solamente en los Estados Unidos. Esta tesis extiende el conocimiento existente al proponer un modelo comprehensivo y aportar evidencia que apoya la tesis de que dos tipos de congruencia (de marca y de usuario) influencian positivamente las evaluaciones (preferencias de marca e intenciones de compra) con mayor intensidad en el caso de las marcas de consumo público que en las de consumo privado, en el contexto de culturas latinas. También contribuye a la teoría existente al encontrar que el sexo de los consumidores influye en el impacto de la congruencia en las preferencias e intenciones de compra. ABSTRACT Investments are allocated to brand building on the assumption –among others- that brand personalities impact consumer choices. However, research has concentrated on the study of brand personalities but little on their impact on preference and choice. There is a need to further advance knowledge about the impact of congruence on consumer decisions so that decisions are based not on assumptions but on theories supported by evidence. This thesis addresses congruence theory incorporating dimensions not previously addressed: Latin cultures and gender, and how they moderate the impact of congruence on brand evaluations for privately and publicly consumed brands. While prior research has touched on these attributes, most of it has explored publicly consumed products in the context of addictive products (e.g., beer or alcohol) and only within the United States. This research extends prior knowledge by proposing a comprehensive model and by providing evidence that two types of congruence (brand-personality and user-image) positively influence brand evaluations more so for publicly consumed brands than for privately consumed brands, in the context of Latin cultures. Also, it contributes to current theory by finding that sex influences the impact of congruence on brand preferences and on intention to buy.

Religion, Democracy and the Public Sphere

Throughout the development and maturation of the American democratic experience, religiously inspired conduct has contributed significantly to democratically progressive political concerns such as the abolition of slavery and campaigns for civil rights, but also the encouragement and perpetuation pf anti-democratic practices such as the institution of slavery and policies of racial segregation. It may be rarely admitted, but there is no essential conceptual affinity between conduct proper to democratic political association. It may, therefore, be useful in our own political circumstances to try to determine boundaries for conduct that expresses and satisfies compatibly both religious and democratic commitments. Perhaps most Americans do recognize – if not in their own cases, at least in reference to the beliefs and actions of others – that religiously inspired conduct is neither thereby justified morally or legally nor absolved from further critical appraisal. Certainly, the history of American legal practice shows that religious belief or inspiration does not serve as acceptable legal defense for conduct charged as criminal infraction. The U.S. Constitution contains only two references to religion: the non-establishment clause prohibits governmental institutionalization of religious beliefs or liberty rights – is limited in scope and application both by other constitutional rights of individuals and by constitutionally authorized powers of government. As the U.S.S.C. has repeatedly held, individual constitutional features must be understood in a manner that harmonizes all stated and implied constitutional features, not by unbridled abstractions of selected phrases. Under the American legal system, there is no absolute or unlimited right to free exercise of religion: not everything done publicly under religious inspiration is legally permissible; what is otherwise illegal conduct is not legalized by religious inspiration. In important respects, general features of the legal boundaries concerning religiously inspired conduct in public life are reasonably clear; nevertheless, broader issues concerning further moral or ethical constraints upon religiously inspired conduct remain unresolved and rarely addressed explicitly.