882 resultados para cooling chip for handheld electronic devices


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This thesis work has been carried out at Clarkson University in Potsdam NY, USA and involved the design of a low elongation wing, consisting of parts made by polylactide (PLA) using the fused deposition model (FDM) technology of Rapid Prototyping, then assembled together in a thin aluminum spar. The aim of the research is to evaluate the feasibility of collecting electrical energy by converting mechanical energy from the vibration of the wing flutter. With this aim piezoelectric stripes were glued in the inner part of the wing, as well as on the aluminum spar, as monomorphic configuration. During the phases of the project, particular attention was given to the geometry and the materials used, in order to trigger the flutter for low flow velocity. The CAD software SolidWorks® was used for the design of the wing and then the drawings were sent to the Clarkson machine shop in order to to produce the parts required by the wing assembly. FEM simulations were performed, using software MSC NASTRAN/PATRAN®, to evaluate the stiffness of the whole wing as well as the natural vibration modes of the structure. These data, in a first approximation, were used to predict the flutter speed. Finally, experimental tests in the Clarkson wind tunnel facility were carried out in order to validate the results obtained from FEM analysis. The power collected by the piezoelectrics under flutter condition was addressed by tuning the resistors downstream the electronic circuit of the piezoelectrics.

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To present the auditory implant manipulator, a navigation-controlled mechanical and electronic system which enables minimally invasive ('keyhole') transmastoid access to the tympanic cavity.

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BACKGROUND AND PURPOSE: Daily use of conventional electronic portal imaging devices (EPID) for organ tracking is limited due to the relatively high dose required for high quality image acquisition. We studied the use of a novel dose saving acquisition mode (RadMode) allowing to take images with one monitor unit per image in prostate cancer patients undergoing intensity-modulated radiotherapy (IMRT) and tracking of implanted fiducial gold markers. PATIENTS AND METHODS: Twenty five patients underwent implantation of three fiducial gold markers prior to the planning CT. Before each treatment of a course of 37 fractions, orthogonal localization images from the antero-posterior and from the lateral direction were acquired. Portal images of both the setup procedure and the five IMRT treatment beams were analyzed. RESULTS: On average, four localization images were needed for a correct patient setup, resulting in four monitor units extra dose per fraction. The mean extra dose delivered to the patient was thereby increased by 1.2%. The procedure was precise enough to reduce the mean displacements prior to treatment to < o =0.3 mm. CONCLUSIONS: The use of a new dose saving acquisition mode enables to perform daily EPID-based prostate tracking with a cumulative extra dose of below 1 Gy. This concept is efficiently used in IMRT-treated patients, where separation of setup beams from treatment beams is mandatory.

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The goal of this study was to propose a general numerical analysis methodology to evaluate the magnetic resonance imaging (MRI)-safety of active implants. Numerical models based on the finite element (FE) technique were used to estimate if the normal operation of an active device was altered during MRI imaging. An active implanted pump was chosen to illustrate the method. A set of controlled experiments were proposed and performed to validate the numerical model. The calculated induced voltages in the important electronic components of the device showed dependence with the MRI field strength. For the MRI radiofrequency fields, significant induced voltages of up to 20 V were calculated for a 0.3T field-strength MRI. For the 1.5 and 3.0T MRIs, the calculated voltages were insignificant. On the other hand, induced voltages up to 11 V were calculated in the critical electronic components for the 3.0T MRI due to the gradient fields. Values obtained in this work reflect to the worst case situation which is virtually impossible to achieve in normal scanning situations. Since the calculated voltages may be removed by appropriate protection circuits, no critical problems affecting the normal operation of the pump were identified. This study showed that the proposed methodology helps the identification of the possible incompatibilities between active implants and MR imaging, and can be used to aid the design of critical electronic systems to ensure MRI-safety

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Carbon nanotubes (CNTs) are interesting materials with extraordinary properties for various applications. Here, vertically-aligned multiwalled CNTs (VA-MWCNTs) are grown by our dual radio frequency plasma enhanced chemical vapor deposition (PECVD). After optimizing the synthesis processes, these VA-MWCNTs were fabricated in to a series of devices for applications in vacuum electronics, glucose biosensors, glucose biofuel cells, and supercapacitors In particular, we have created the so-called PMMA-CNT matrices (opened-tip CNTs embedded in poly-methyl methacrylate) that are promising components in a novel energy sensing, generation and storage (SGS) system that integrate glucose biosensors, biofuel cells, and supercapacitors. The content of this thesis work is described as follows: 1. We have first optimized the synthesis of VA-MWCNTs by our PECVD technique. The effects of CH4 flow rate and growth duration on the lengths of these CNTs were studied. 2. We have characterized these VA-MWCNTs for electron field emission. We noticed that as grown CNTs suffers from high emission threshold, poor emission density and poor long-term stability. We attempted a series of experiments to understand ways to overcome these problems. First, we decrease the screening effects on VA-MWCNTs by creating arrays of self-assembled CNT bundles that are catalyst-free and opened tips. These bundles are found to enhance the field emission stability and emission density. Subsequently, we have created PMMA-CNT matrices that are excellent electron field emitters with an emission threshold field of more than two-fold lower than that of the as-grown sample. Furthermore, no significant emission degradation was observed after a continuous emission test of 40 hours (versus much shorter tests in reported literatures). Based on the new understanding we learnt from the PMMA-CNT matrices, we further created PMMA-STO-CNT matrices by embedding opened-tip VA-MWCNTs that are coated with strontium titanate (SrTiO3) with PMMA. We found that the PMMA-STO-CNT matrices have all the desired properties of the PMMA-CNT matrices. Furthermore, PMMA-STO-CNT matrices offer much lower emission threshold field, about five-fold lower than that of as grown VA-MWCNTs. The new understandings we obtained are important for practical application of VA-MWCNTs in field emission devices. 3. Subsequently, we have functionalized PMMA-CNT matrices for glucose biosensing. Our biosensor was developed by immobilized glucose oxidase (GOχ) on the opened-tip CNTs exposed on the matrices. The durability, stability and sensitivity of the biosensor were studied. In order to understand the performance of miniaturized glucose biosensors, we have then investigated the effect of working electrode area on the sensitivity and current level of our biosensors. 4. Next, functionalized PMMA-CNT matrices were utilized for energy generation and storage. We found that PMMA-CNT matrices are promising component in glucose/O2 biofuel cells (BFCs) for energy generation. The construction of these BFCs and the effect of the electrode area on the power density of these BFCs were investigated. Then, we have attempted to use PMMA-CNT matrices as supercapacitors for energy storage devices. The performance of these supercapacitors and ways to enhance their performance are discussed. 5. Finally, we further evaluated the concept of energy SGS system that integrated glucose biosensors, biofuel cells, and supercapacitors. This SGS system may be implantable to monitor and control the blood glucose level in our body.

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ZnO has proven to be a multifunctional material with important nanotechnological applications. ZnO nanostructures can be grown in various forms such as nanowires, nanorods, nanobelts, nanocombs etc. In this work, ZnO nanostructures are grown in a double quartz tube configuration thermal Chemical Vapor Deposition (CVD) system. We focus on functionalized ZnO Nanostructures by controlling their structures and tuning their properties for various applications. The following topics have been investigated: 1. We have fabricated various ZnO nanostructures using a thermal CVD technique. The growth parameters were optimized and studied for different nanostructures. 2. We have studied the application of ZnO nanowires (ZnONWs) for field effect transistors (FETs). Unintentional n-type conductivity was observed in our FETs based on as-grown ZnO NWs. We have then shown for the first time that controlled incorporation of hydrogen into ZnO NWs can introduce p-type characters to the nanowires. We further found that the n-type behaviors remained, leading to the ambipolar behaviors of hydrogen incorporated ZnO NWs. Importantly, the detected p- and n- type behaviors are stable for longer than two years when devices were kept in ambient conditions. All these can be explained by an ab initio model of Zn vacancy-Hydrogen complexes, which can serve as the donor, acceptors, or green photoluminescence quencher, depend on the number of hydrogen atoms involved. 3. Next ZnONWs were tested for electron field emission. We focus on reducing the threshold field (Eth) of field emission from non-aligned ZnO NWs. As encouraged by our results on enhancing the conductivity of ZnO NWs by hydrogen annealing described in Chapter 3, we have studied the effect of hydrogen annealing for improving field emission behavior of our ZnO NWs. We found that optimally annealed ZnO NWs offered much lower threshold electric field and improved emission stability. We also studied field emission from ZnO NWs at moderate vacuum levels. We found that there exists a minimum Eth as we scale the threshold field with pressure. This behavior is explained by referring to Paschen’s law. 4. We have studied the application of ZnO nanostructures for solar energy harvesting. First, as-grown and (CdSe) ZnS QDs decorated ZnO NBs and ZnONWs were tested for photocurrent generation. All these nanostructures offered fast response time to solar radiation. The decoration of QDs decreases the stable current level produced by ZnONWs but increases that generated by NBs. It is possible that NBs offer more stable surfaces for the attachment of QDs. In addition, our results suggests that performance degradation of solar cells made by growing ZnO NWs on ITO is due to the increase in resistance of ITO after the high temperature growth process. Hydrogen annealing also improve the efficiency of the solar cells by decreasing the resistance of ITO. Due to the issues on ITO, we use Ni foil as the growth substrates. Performance of solar cells made by growing ZnO NWs on Ni foils degraded after Hydrogen annealing at both low (300 °C) and high (600 °C) temperatures since annealing passivates native defects in ZnONWs and thus reduce the absorption of visible spectra from our solar simulator. Decoration of QDs improves the efficiency of such solar cells by increasing absorption of light in the visible region. Using a better electrolyte than phosphate buffer solution (PBS) such as KI also improves the solar cell efficiency. 5. Finally, we have attempted p-type doping of ZnO NWs using various growth precursors including phosphorus pentoxide, sodium fluoride, and zinc fluoride. We have also attempted to create p-type carriers via introducing interstitial fluorine by annealing ZnO nanostructures in diluted fluorine gas. In brief, we are unable to reproduce the growth of reported p-type ZnO nanostructures. However; we have identified the window of temperature and duration of post-growth annealing of ZnO NWs in dilute fluorine gas which leads to suppression of native defects. This is the first experimental effort on post-growth annealing of ZnO NWs in dilute fluorine gas although this has been suggested by a recent theory for creating p-type semiconductors. In our experiments the defect band peak due to native defects is found to decrease by annealing at 300 °C for 10 – 30 minutes. One of the major future works will be to determine the type of charge carriers in our annealed ZnONWs.

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AIM: The purpose of this study was to systematically review the literature on the survival rates of palatal implants, Onplants((R)), miniplates and mini screws. MATERIAL AND METHODS: An electronic MEDLINE search supplemented by manual searching was conducted to identify randomized clinical trials, prospective and retrospective cohort studies on palatal implants, Onplants((R)), miniplates and miniscrews with a mean follow-up time of at least 12 weeks and of at least 10 units per modality having been examined clinically at a follow-up visit. Assessment of studies and data abstraction was performed independently by two reviewers. Reported failures of used devices were analyzed using random-effects Poisson regression models to obtain summary estimates and 95% confidence intervals (CI) of failure and survival proportions. RESULTS: The search up to January 2009 provided 390 titles and 71 abstracts with full-text analysis of 34 articles, yielding 27 studies that met the inclusion criteria. In meta-analysis, the failure rate for Onplants((R)) was 17.2% (95% CI: 5.9-35.8%), 10.5% for palatal implants (95% CI: 6.1-18.1%), 16.4% for miniscrews (95% CI: 13.4-20.1%) and 7.3% for miniplates (95% CI: 5.4-9.9%). Miniplates and palatal implants, representing torque-resisting temporary anchorage devices (TADs), when grouped together, showed a 1.92-fold (95% CI: 1.06-2.78) lower clinical failure rate than miniscrews. CONCLUSION: Based on the available evidence in the literature, palatal implants and miniplates showed comparable survival rates of >or=90% over a period of at least 12 weeks, and yielded superior survival than miniscrews. Palatal implants and miniplates for temporary anchorage provide reliable absolute orthodontic anchorage. If the intended orthodontic treatment would require multiple miniscrew placement to provide adequate anchorage, the reliability of such systems is questionable. For patients who are undergoing extensive orthodontic treatment, force vectors may need to be varied or the roots of the teeth to be moved may need to slide past the anchors. In this context, palatal implants or miniplates should be the TADs of choice.

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This article deals with embodied user interfaces for handheld augmented reality games, which consist of both physical and virtual components. We have developed a number of spatial interaction techniques that optically capture the device's movement and orientation relative to a visual marker. Such physical interactions in 3-D space enable manipulative control of mobile games. In addition to acting as a physical controller that recognizes multiple game-dependent gestures, the mobile device augments the camera view with graphical overlays. We describe three game prototypes that use ubiquitous product packaging and other passive media as backgrounds for handheld augmentation. The prototypes can be realized on widely available off-the-shelf hardware and require only minimal setup and infrastructure support.

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An electronic identification system involving placement of transponders in rumen boluses was evaluated in thirty feedlot steers. All the devices were retained and remained functional in the steers. Twenty-eight of the devices were recovered at the packing plant. Two of them were lost because of an incomplete understanding that attempts were being made to recover the boluses from rumen contents. Use of rumen boluses is a practical alternative for electronic identification of cattle that is permanent and nearly tamper proof.

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The successful management of cancer with radiation relies on the accurate deposition of a prescribed dose to a prescribed anatomical volume within the patient. Treatment set-up errors are inevitable because the alignment of field shaping devices with the patient must be repeated daily up to eighty times during the course of a fractionated radiotherapy treatment. With the invention of electronic portal imaging devices (EPIDs), patient's portal images can be visualized daily in real-time after only a small fraction of the radiation dose has been delivered to each treatment field. However, the accuracy of human visual evaluation of low-contrast portal images has been found to be inadequate. The goal of this research is to develop automated image analysis tools to detect both treatment field shape errors and patient anatomy placement errors with an EPID. A moments method has been developed to align treatment field images to compensate for lack of repositioning precision of the image detector. A figure of merit has also been established to verify the shape and rotation of the treatment fields. Following proper alignment of treatment field boundaries, a cross-correlation method has been developed to detect shifts of the patient's anatomy relative to the treatment field boundary. Phantom studies showed that the moments method aligned the radiation fields to within 0.5mm of translation and 0.5$\sp\circ$ of rotation and that the cross-correlation method aligned anatomical structures inside the radiation field to within 1 mm of translation and 1$\sp\circ$ of rotation. A new procedure of generating and using digitally reconstructed radiographs (DRRs) at megavoltage energies as reference images was also investigated. The procedure allowed a direct comparison between a designed treatment portal and the actual patient setup positions detected by an EPID. Phantom studies confirmed the feasibility of the methodology. Both the moments method and the cross-correlation technique were implemented within an experimental radiotherapy picture archival and communication system (RT-PACS) and were used clinically to evaluate the setup variability of two groups of cancer patients treated with and without an alpha-cradle immobilization aid. The tools developed in this project have proven to be very effective and have played an important role in detecting patient alignment errors and field-shape errors in treatment fields formed by a multileaf collimator (MLC). ^

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CMOS-sensors, or in general Active Pixel Sensors (APS), are rapidly replacing CCDs in the consumer camera market. Due to significant technological advances during the past years these devices start to compete with CCDs also for demanding scientific imaging applications, in particular in the astronomy community. CMOS detectors offer a series of inherent advantages compared to CCDs, due to the structure of their basic pixel cells, which each contains their own amplifier and readout electronics. The most prominent advantages for space object observations are the extremely fast and flexible readout capabilities, feasibility for electronic shuttering and precise epoch registration,and the potential to perform image processing operations on-chip and in real-time. Here, the major challenges and design drivers for ground-based and space-based optical observation strategies for objects in Earth orbit have been analyzed. CMOS detector characteristics were critically evaluated and compared with the established CCD technology, especially with respect to the above mentioned observations. Finally, we simulated several observation scenarios for ground- and space-based sensor by assuming different observation and sensor properties. We will introduce the analyzed end-to-end simulations of the ground- and spacebased strategies in order to investigate the orbit determination accuracy and its sensitivity which may result from different values for the frame-rate, pixel scale, astrometric and epoch registration accuracies. Two cases were simulated, a survey assuming a ground-based sensor to observe objects in LEO for surveillance applications, and a statistical survey with a space-based sensor orbiting in LEO observing small-size debris in LEO. The ground-based LEO survey uses a dynamical fence close to the Earth shadow a few hours after sunset. For the space-based scenario a sensor in a sun-synchronous LEO orbit, always pointing in the anti-sun direction to achieve optimum illumination conditions for small LEO debris was simulated.

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Se trata de estudiar el comportamiento de un sistema basado en el chip CC1110 de Texas Instruments, para aplicaciones inalámbricas. Los dispositivos basados en este tipo de chips tienen actualmente gran profusión, dada la demanda cada vez mayor de aplicaciones de gestión y control inalámbrico. Por ello, en la primera parte del proyecto se presenta el estado del arte referente a este aspecto, haciendo mención a los sistemas operativos embebidos, FPGAs, etc. También se realiza una introducción sobre la historia de los aviones no tripulados, que son el vehículo elegido para el uso del enlace de datos. En una segunda parte se realiza el estudio del dispositivo mediante una placa de desarrollo, verificando y comprobando mediante el software suministrado, el alcance del mismo. Cabe resaltar en este punto que el control con la placa mencionada se debe hacer mediante programación de bajo nivel (lenguaje C), lo que aporta gran versatilidad a las aplicaciones que se pueden desarrollar. Por ello, en una tercera parte se realiza un programa funcional, basado en necesidades aportadas por la empresa con la que se colabora en el proyecto (INDRA). Este programa es realizado sobre el entorno de Matlab, muy útil para este tipo de aplicaciones, dada su versatilidad y gran capacidad de cálculo con variables. Para terminar, con la realización de dichos programas, se realizan pruebas específicas para cada uno de ellos, realizando pruebas de campo en algunas ocasiones, con vehículos los más similares a los del entorno real en el que se prevé utilizar. Como implementación al programa realizado, se incluye un manual de usuario con un formato muy gráfico, para que la toma de contacto se realice de una manera rápida y sencilla. Para terminar, se plantean líneas futuras de aplicación del sistema, conclusiones, presupuesto y un anexo con los códigos de programación más importantes. Abstract In this document studied the system behavior based on chip CC1110 of Texas Instruments, for wireless applications. These devices currently have profusion. Right the increasing demand for control and management wireless applications. In the first part of project presents the state of art of this aspect, with reference to the embedded systems, FPGAs, etc. It also makes a history introduction of UAVs, which are the vehicle for use data link. In the second part is studied the device through development board, verifying and checking with provided software the scope. The board programming is C language; this gives a good versatility to develop applications. Thus, in third part performing a functionally program, it based on requirements provided by company with which it collaborates, INDRA Company. This program is developed with Matlab, very useful for such applications because of its versatility and ability to use variables. Finally, with the implementation of such programs, specific tests are performed for each of them, field tests are performed in several cases, and vehicles used for this are the most similar to the actual environment plain to use. Like implementing with the program made, includes a graphical user manual, so your understanding is conducted quickly and easily. Ultimately, present future targets for system applications, conclusions, budget and annex of the most important programming codes.

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La constante evolución de dispositivos portátiles multimedia que se ha producido en la última década ha provocado que hoy en día se disponga de una amplia variedad de dispositivos con capacidad para reproducir contenidos multimedia. En consecuencia, la reproducción de esos contenidos en dichos terminales lleva asociada disponer de procesadores que soporten una alta carga computacional, ya que las tareas de descodificación y presentación de video así lo requieren. Sin embargo, un procesador potente trabajando a elevadas frecuencias provoca un elevado consumo de la batería, y dado que se pretende trabajar con dispositivos portátiles, la vida útil de la batería se convierte en un asunto de especial importancia. La problemática que se plantea se ha convertido en una de las principales líneas de investigación del Grupo de Investigación GDEM (Grupo de Diseño Electrónico y Microelectrónico). En esta línea de trabajo, se persigue cómo optimizar el consumo de energía en terminales portables desde el punto de vista de la reducción de la calidad de experiencia del usuario a cambio de una mayor autonomía del terminal. Por tanto, para lograr esa reducción de la calidad de experiencia mencionada, se requiere un estándar de codificación de vídeo que así lo permita. El Grupo de Investigación GDEM cuenta con experiencia en el estándar de vídeo escalable H.264/SVC, el cual permite degradar la calidad de experiencia en función de las necesidades/características del dispositivo. Más concretamente, un video escalable contiene embebidas distintas versiones del video original que pueden ser descodificadas en diferentes resoluciones, tasas de cuadro y calidades (escalabilidades espacial, temporal y de calidad respectivamente), permitiendo una adaptación rápida y muy flexible. Seleccionado el estándar H.264/SVC para las tareas de vídeo, se propone trabajar con Mplayer, un reproductor de vídeos de código abierto (open source), al cual se le ha integrado un descodificador para vídeo escalable denominado OpenSVC. Por último, como dispositivo portable se trabajará con la plataforma de desarrollo BeagleBoard, un sistema embebido basado en el procesador OMAP3530 que permite modificar la frecuencia de reloj y la tensión de alimentación dinámicamente reduciendo de este modo el consumo del terminal. Este procesador a su vez contiene integrados un procesador de propósito general (ARM Cortex-A8) y un procesador digital de señal (DSP TMS320C64+TM). Debido a la alta carga computacional de la descodificación de vídeos escalables y la escasa optimización del ARM para procesamiento de datos, se propone llevar a cabo la ejecución de Mplayer en el ARM y encargar la tarea de descodificación al DSP, con la finalidad de reducir el consumo y por tanto aumentar la vida útil del sistema embebido sobre el cual se ejecutará la aplicación desarrollada. Una vez realizada esa integración, se llevará a cabo una caracterización del descodificador alojado en el DSP a través de una serie de medidas de rendimiento y se compararán los resultados con los obtenidos en el proceso de descodificación realizado únicamente en el ARM. ABSTRACT During the last years, the multimedia portable terminals have gradually evolved causing that nowadays a several range of devices with the ability of playing multimedia contents are easily available for everyone. Consequently, those multimedia terminals must have high-performance processors to play those contents because the coding and decoding tasks demand high computational load. However, a powerful processor performing to high frequencies implies higher battery consumption, and this issue has become one of the most important problems in the development cycle of a portable terminal. The power/energy consumption optimization on multimedia terminals has become in one the most significant work lines in the Electronic and Microelectronic Research Group of the Universidad Politécnica de Madrid. In particular, the group is researching how to reduce the user‟s Quality of Experience (QoE) quality in exchange for increased battery life. In order to reduce the Quality of Experience (QoE), a standard video coding that allows this operation is required. The H.264/SVC allows reducing the QoE according to the needs/characteristics of the terminal. Specifically, a scalable video contains different versions of original video embedded in an only one video stream, and each one of them can be decoded in different resolutions, frame rates and qualities (spatial, temporal and quality scalabilities respectively). Once the standard video coding is selected, a multimedia player with support for scalable video is needed. Mplayer has been proposed as a multimedia player, whose characteristics (open-source, enormous flexibility and scalable video decoder called OpenSVC) are the most suitable for the aims of this Master Thesis. Lastly, the embedded system BeagleBoard, based on the multi-core processor OMAP3530, will be the development platform used in this project. The multimedia terminal architecture is based on a commercial chip having a General Purpose Processor (GPP – ARM Cortex A8) and a Digital Signal Processor (DSP, TMS320C64+™). Moreover, the processor OMAP3530 has the ability to modify the operating frequency and the supply voltage in a dynamic way in order to reduce the power consumption of the embedded system. So, the main goal of this Master Thesis is the integration of the multimedia player, MPlayer, executed at the GPP, and scalable video decoder, OpenSVC, executed at the DSP in order to distribute the computational load associated with the scalable video decoding task and to reduce the power consumption of the terminal. Once the integration is accomplished, the performance of the OpenSVC decoder executed at the DSP will be measured using different combinations of scalability values. The obtained results will be compared with the scalable video decoding performed at the GPP in order to show the low optimization of this kind of architecture for decoding tasks in contrast to DSP architecture.

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La temperatura es una preocupación que juega un papel protagonista en el diseño de circuitos integrados modernos. El importante aumento de las densidades de potencia que conllevan las últimas generaciones tecnológicas ha producido la aparición de gradientes térmicos y puntos calientes durante el funcionamiento normal de los chips. La temperatura tiene un impacto negativo en varios parámetros del circuito integrado como el retardo de las puertas, los gastos de disipación de calor, la fiabilidad, el consumo de energía, etc. Con el fin de luchar contra estos efectos nocivos, la técnicas de gestión dinámica de la temperatura (DTM) adaptan el comportamiento del chip en función en la información que proporciona un sistema de monitorización que mide en tiempo de ejecución la información térmica de la superficie del dado. El campo de la monitorización de la temperatura en el chip ha llamado la atención de la comunidad científica en los últimos años y es el objeto de estudio de esta tesis. Esta tesis aborda la temática de control de la temperatura en el chip desde diferentes perspectivas y niveles, ofreciendo soluciones a algunos de los temas más importantes. Los niveles físico y circuital se cubren con el diseño y la caracterización de dos nuevos sensores de temperatura especialmente diseñados para los propósitos de las técnicas DTM. El primer sensor está basado en un mecanismo que obtiene un pulso de anchura variable dependiente de la relación de las corrientes de fuga con la temperatura. De manera resumida, se carga un nodo del circuito y posteriormente se deja flotando de tal manera que se descarga a través de las corrientes de fugas de un transistor; el tiempo de descarga del nodo es la anchura del pulso. Dado que la anchura del pulso muestra una dependencia exponencial con la temperatura, la conversión a una palabra digital se realiza por medio de un contador logarítmico que realiza tanto la conversión tiempo a digital como la linealización de la salida. La estructura resultante de esta combinación de elementos se implementa en una tecnología de 0,35 _m. El sensor ocupa un área muy reducida, 10.250 nm2, y consume muy poca energía, 1.05-65.5nW a 5 muestras/s, estas cifras superaron todos los trabajos previos en el momento en que se publicó por primera vez y en el momento de la publicación de esta tesis, superan a todas las implementaciones anteriores fabricadas en el mismo nodo tecnológico. En cuanto a la precisión, el sensor ofrece una buena linealidad, incluso sin calibrar; se obtiene un error 3_ de 1,97oC, adecuado para tratar con las aplicaciones de DTM. Como se ha explicado, el sensor es completamente compatible con los procesos de fabricación CMOS, este hecho, junto con sus valores reducidos de área y consumo, lo hacen especialmente adecuado para la integración en un sistema de monitorización de DTM con un conjunto de monitores empotrados distribuidos a través del chip. Las crecientes incertidumbres de proceso asociadas a los últimos nodos tecnológicos comprometen las características de linealidad de nuestra primera propuesta de sensor. Con el objetivo de superar estos problemas, proponemos una nueva técnica para obtener la temperatura. La nueva técnica también está basada en las dependencias térmicas de las corrientes de fuga que se utilizan para descargar un nodo flotante. La novedad es que ahora la medida viene dada por el cociente de dos medidas diferentes, en una de las cuales se altera una característica del transistor de descarga |la tensión de puerta. Este cociente resulta ser muy robusto frente a variaciones de proceso y, además, la linealidad obtenida cumple ampliamente los requisitos impuestos por las políticas DTM |error 3_ de 1,17oC considerando variaciones del proceso y calibrando en dos puntos. La implementación de la parte sensora de esta nueva técnica implica varias consideraciones de diseño, tales como la generación de una referencia de tensión independiente de variaciones de proceso, que se analizan en profundidad en la tesis. Para la conversión tiempo-a-digital, se emplea la misma estructura de digitalización que en el primer sensor. Para la implementación física de la parte de digitalización, se ha construido una biblioteca de células estándar completamente nueva orientada a la reducción de área y consumo. El sensor resultante de la unión de todos los bloques se caracteriza por una energía por muestra ultra baja (48-640 pJ) y un área diminuta de 0,0016 mm2, esta cifra mejora todos los trabajos previos. Para probar esta afirmación, se realiza una comparación exhaustiva con más de 40 propuestas de sensores en la literatura científica. Subiendo el nivel de abstracción al sistema, la tercera contribución se centra en el modelado de un sistema de monitorización que consiste de un conjunto de sensores distribuidos por la superficie del chip. Todos los trabajos anteriores de la literatura tienen como objetivo maximizar la precisión del sistema con el mínimo número de monitores. Como novedad, en nuestra propuesta se introducen nuevos parámetros de calidad aparte del número de sensores, también se considera el consumo de energía, la frecuencia de muestreo, los costes de interconexión y la posibilidad de elegir diferentes tipos de monitores. El modelo se introduce en un algoritmo de recocido simulado que recibe la información térmica de un sistema, sus propiedades físicas, limitaciones de área, potencia e interconexión y una colección de tipos de monitor; el algoritmo proporciona el tipo seleccionado de monitor, el número de monitores, su posición y la velocidad de muestreo _optima. Para probar la validez del algoritmo, se presentan varios casos de estudio para el procesador Alpha 21364 considerando distintas restricciones. En comparación con otros trabajos previos en la literatura, el modelo que aquí se presenta es el más completo. Finalmente, la última contribución se dirige al nivel de red, partiendo de un conjunto de monitores de temperatura de posiciones conocidas, nos concentramos en resolver el problema de la conexión de los sensores de una forma eficiente en área y consumo. Nuestra primera propuesta en este campo es la introducción de un nuevo nivel en la jerarquía de interconexión, el nivel de trillado (o threshing en inglés), entre los monitores y los buses tradicionales de periféricos. En este nuevo nivel se aplica selectividad de datos para reducir la cantidad de información que se envía al controlador central. La idea detrás de este nuevo nivel es que en este tipo de redes la mayoría de los datos es inútil, porque desde el punto de vista del controlador sólo una pequeña cantidad de datos |normalmente sólo los valores extremos| es de interés. Para cubrir el nuevo nivel, proponemos una red de monitorización mono-conexión que se basa en un esquema de señalización en el dominio de tiempo. Este esquema reduce significativamente tanto la actividad de conmutación sobre la conexión como el consumo de energía de la red. Otra ventaja de este esquema es que los datos de los monitores llegan directamente ordenados al controlador. Si este tipo de señalización se aplica a sensores que realizan conversión tiempo-a-digital, se puede obtener compartición de recursos de digitalización tanto en tiempo como en espacio, lo que supone un importante ahorro de área y consumo. Finalmente, se presentan dos prototipos de sistemas de monitorización completos que de manera significativa superan la características de trabajos anteriores en términos de área y, especialmente, consumo de energía. Abstract Temperature is a first class design concern in modern integrated circuits. The important increase in power densities associated to recent technology evolutions has lead to the apparition of thermal gradients and hot spots during run time operation. Temperature impacts several circuit parameters such as speed, cooling budgets, reliability, power consumption, etc. In order to fight against these negative effects, dynamic thermal management (DTM) techniques adapt the behavior of the chip relying on the information of a monitoring system that provides run-time thermal information of the die surface. The field of on-chip temperature monitoring has drawn the attention of the scientific community in the recent years and is the object of study of this thesis. This thesis approaches the matter of on-chip temperature monitoring from different perspectives and levels, providing solutions to some of the most important issues. The physical and circuital levels are covered with the design and characterization of two novel temperature sensors specially tailored for DTM purposes. The first sensor is based upon a mechanism that obtains a pulse with a varying width based on the variations of the leakage currents on the temperature. In a nutshell, a circuit node is charged and subsequently left floating so that it discharges away through the subthreshold currents of a transistor; the time the node takes to discharge is the width of the pulse. Since the width of the pulse displays an exponential dependence on the temperature, the conversion into a digital word is realized by means of a logarithmic counter that performs both the timeto- digital conversion and the linearization of the output. The structure resulting from this combination of elements is implemented in a 0.35_m technology and is characterized by very reduced area, 10250 nm2, and power consumption, 1.05-65.5 nW at 5 samples/s, these figures outperformed all previous works by the time it was first published and still, by the time of the publication of this thesis, they outnumber all previous implementations in the same technology node. Concerning the accuracy, the sensor exhibits good linearity, even without calibration it displays a 3_ error of 1.97oC, appropriate to deal with DTM applications. As explained, the sensor is completely compatible with standard CMOS processes, this fact, along with its tiny area and power overhead, makes it specially suitable for the integration in a DTM monitoring system with a collection of on-chip monitors distributed across the chip. The exacerbated process fluctuations carried along with recent technology nodes jeop-ardize the linearity characteristics of the first sensor. In order to overcome these problems, a new temperature inferring technique is proposed. In this case, we also rely on the thermal dependencies of leakage currents that are used to discharge a floating node, but now, the result comes from the ratio of two different measures, in one of which we alter a characteristic of the discharging transistor |the gate voltage. This ratio proves to be very robust against process variations and displays a more than suficient linearity on the temperature |1.17oC 3_ error considering process variations and performing two-point calibration. The implementation of the sensing part based on this new technique implies several issues, such as the generation of process variations independent voltage reference, that are analyzed in depth in the thesis. In order to perform the time-to-digital conversion, we employ the same digitization structure the former sensor used. A completely new standard cell library targeting low area and power overhead is built from scratch to implement the digitization part. Putting all the pieces together, we achieve a complete sensor system that is characterized by ultra low energy per conversion of 48-640pJ and area of 0.0016mm2, this figure outperforms all previous works. To prove this statement, we perform a thorough comparison with over 40 works from the scientific literature. Moving up to the system level, the third contribution is centered on the modeling of a monitoring system consisting of set of thermal sensors distributed across the chip. All previous works from the literature target maximizing the accuracy of the system with the minimum number of monitors. In contrast, we introduce new metrics of quality apart form just the number of sensors; we consider the power consumption, the sampling frequency, the possibility to consider different types of monitors and the interconnection costs. The model is introduced in a simulated annealing algorithm that receives the thermal information of a system, its physical properties, area, power and interconnection constraints and a collection of monitor types; the algorithm yields the selected type of monitor, the number of monitors, their position and the optimum sampling rate. We test the algorithm with the Alpha 21364 processor under several constraint configurations to prove its validity. When compared to other previous works in the literature, the modeling presented here is the most complete. Finally, the last contribution targets the networking level, given an allocated set of temperature monitors, we focused on solving the problem of connecting them in an efficient way from the area and power perspectives. Our first proposal in this area is the introduction of a new interconnection hierarchy level, the threshing level, in between the monitors and the traditional peripheral buses that applies data selectivity to reduce the amount of information that is sent to the central controller. The idea behind this new level is that in this kind of networks most data are useless because from the controller viewpoint just a small amount of data |normally extreme values| is of interest. To cover the new interconnection level, we propose a single-wire monitoring network based on a time-domain signaling scheme that significantly reduces both the switching activity over the wire and the power consumption of the network. This scheme codes the information in the time domain and allows a straightforward obtention of an ordered list of values from the maximum to the minimum. If the scheme is applied to monitors that employ TDC, digitization resource sharing is achieved, producing an important saving in area and power consumption. Two prototypes of complete monitoring systems are presented, they significantly overcome previous works in terms of area and, specially, power consumption.

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Durante los últimos años el flujo de datos en la transmisión que tiene lugar en los sistemas de comunicación ha aumentado considerablemente de forma que día a día se requieren más aplicaciones trabajando en un rango de frecuencias muy alto (3-30 GHz). Muchos de estos sistemas de comunicación incluyen dispositivos de onda acústica superficial (SAW) y por tanto se hace necesario el aumento de frecuencia a la que éstos trabajan. Pero este incremento de frecuencia de los dispositivos SAW no sólo es utilizado en los sistemas de comunicación, varios tipos de sensores, por ejemplo, aumentan su sensibilidad cuando la frecuencia a la que trabajan también lo hace. Tradicionalmente los dispositivos SAW se han fabricado sobre cuarzo, LiNbO3 y LiTaO3 principalmente. Sin embargo la principal limitación de estos materiales es su velocidad SAW. Además, debido a la alta temperatura a la que se depositan no pueden ser integrados en la tecnología de fabricación CMOS. El uso de la tecnología de capa delgada, en la que un material piezoeléctrico es depositado sobre un substrato, se está utilizando en las últimas décadas para incrementar la velocidad SAW de la estructura y poder obtener dispositivos trabajando en el rango de frecuencias requerido en la actualidad. Por otra parte, esta tecnología podría ser integrada en el proceso de fabricación CMOS. Durante esta tesis nos hemos centrado en la fabricación de dispositivos SAW trabajando a muy alta frecuencia. Para ello, utilizando la tecnología de capa delgada, hemos utilizado la estructura nitruro de aluminio (AlN) sobre diamante que permite conseguir velocidades SAW del sustrato que no se pueden alcanzar con otros materiales. El depósito de AlN se realizó mediante sputtering reactivo. Durante esta tesis se han realizado diferentes experimentos para optimizar dicho depósito de forma que se han obtenido los parámetros óptimos para los cuales se pueden obtener capas de AlN de alta calidad sobre cualquier tipo de sustrato. Además todo el proceso se realizó a baja temperatura para que el procesado de estos dispositivos pueda ser compatible con la tecnología CMOS. Una vez optimizada la estructura AlN/diamante, mediante litografía por haz de electrones se fabricaron resonadores SAW de tamaño nanométrico que sumado a la alta velocidad resultante de la combinación AlN/diamante nos ha permitido obtener dispositivos trabajando en el rango de 10-28 GHz con un alto factor de calidad y rechazo fuera de la banda. Estás frecuencias y prestaciones no han sido alcanzadas por el momento en resonadores de este tipo. Por otra parte, se han utilizado estos dispositivos para fabricar sensores de presión de alta sensibilidad. Estos dispositivos son afectados altamente por los cambios de temperatura. Se realizó también un exhaustivo estudio de cómo se comportan en temperatura estos resonadores, entre -250ºC y 250ºC (rango de temperaturas no estudiado hasta el momento) diferenciándose dos regiones una a muy baja temperatura en la que el dispositivo muestra un coeficiente de retraso en frecuencia (TCF) relativamente bajo y otra a partir de los -100ºC en la que el TCF es similar al observado en la bibliografía. Por tanto, durante esta tesis se ha optimizado el depósito de AlN sobre diamante para que sea compatible con la tecnología CMOS y permita el procesado de dispositivos trabajando a muy alta frecuencia con altas prestaciones para comunicaciones y sensores. ABSTRACT The increasing volume of information in data transmission systems results in a growing demand of applications working in the super-high-frequency band (3–30 GHz). Most of these systems work with surface acoustic wave (SAW) devices and thus there is a necessity of increasing their resonance frequency. Moreover, sensor application includes this kind of devices. The sensitivity of them is proportional with its frequency. Traditionally, quartz, LiNbO3 and LiTaO3 have been used in the fabrication of SAW devices. These materials suffer from a variety of limitations and in particular they have low SAW velocity as well as being incompatible with the CMOS technology. In order to overcome these problems, thin film technology, where a piezoelectric material is deposited on top of a substrate, has been used during the last decades. The piezoelectric/substrate structure allows to reach the frequencies required nowadays and could be compatible with the mass electronic production CMOS technology. This thesis work focuses on the fabrication of SAW devices working in the super-high-frequency range. Thin film technology has been used in order to get it, especially aluminum nitride (AlN) deposited by reactive sputtering on diamond has been used to increase the SAW velocity. Different experiments were carried out to optimize the parameters for the deposit of high quality AlN on any kind of substrates. In addition, the system was optimized under low temperature and thus this process is CMOS compatible. Once the AlN/diamond was optimized, thanks to the used e-beam lithography, nanometric SAW resonators were fabricated. The combination of the structure and the size of the devices allow the fabrication of devices working in the range of 10-28 GHz with a high quality factor and out of band rejection. These high performances and frequencies have not been reached so far for this kind of devices. Moreover, these devices have been used as high sensitivity pressure sensors. They are affected by temperature changes and thus a wide temperature range (-250ºC to 250ºC) study was done. From this study two regions were observed. At very low temperature, the temperature coefficient of frequency (TCF) is low. From -100ºC upwards the TCF is similar to the one appearing in the literature. Therefore, during this thesis work, the sputtering of AlN on diamond substrates was optimized for the CMOS compatible fabrication of high frequency and high performance SAW devices for communication and sensor application.