981 resultados para grinding circuit


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Physical computing has spun a true global revolution in the way in which the digital interfaces with the real world. From bicycle jackets with turn signal lights to twitter-controlled christmas trees, the Do-it-Yourself (DiY) hardware movement has been driving endless innovations and stimulating an age of creative engineering. This ongoing (r)evolution has been led by popular electronics platforms such as the Arduino, the Lilypad, or the Raspberry Pi, however, these are not designed taking into account the specific requirements of biosignal acquisition. To date, the physiological computing community has been severely lacking a parallel to that found in the DiY electronics realm, especially in what concerns suitable hardware frameworks. In this paper, we build on previous work developed within our group, focusing on an all-in-one, low-cost, and modular biosignal acquisition hardware platform, that makes it quicker and easier to build biomedical devices. We describe the main design considerations, experimental evaluation and circuit characterization results, together with the results from a usability study performed with volunteers from multiple target user groups, namely health sciences and electrical, biomedical, and computer engineering. Copyright © 2014 SCITEPRESS - Science and Technology Publications. All rights reserved.

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Floating-point computing with more than one TFLOP of peak performance is already a reality in recent Field-Programmable Gate Arrays (FPGA). General-Purpose Graphics Processing Units (GPGPU) and recent many-core CPUs have also taken advantage of the recent technological innovations in integrated circuit (IC) design and had also dramatically improved their peak performances. In this paper, we compare the trends of these computing architectures for high-performance computing and survey these platforms in the execution of algorithms belonging to different scientific application domains. Trends in peak performance, power consumption and sustained performances, for particular applications, show that FPGAs are increasing the gap to GPUs and many-core CPUs moving them away from high-performance computing with intensive floating-point calculations. FPGAs become competitive for custom floating-point or fixed-point representations, for smaller input sizes of certain algorithms, for combinational logic problems and parallel map-reduce problems. © 2014 Technical University of Munich (TUM).

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This paper presents solutions for fault detection and diagnosis of two-level, three phase voltage-source inverter (VSI) topologies with IGBT devices. The proposed solutions combine redundant standby VSI structures and contactors (or relays) to improve the fault-tolerant capabilities of power electronics in applications with safety requirements. The suitable combination of these elements gives the inverter the ability to maintain energy processing in the occurrence of several failure modes, including short-circuit in IGBT devices, thus extending its reliability and availability. A survey of previously developed fault-tolerant VSI structures and several aspects of failure modes, detection and isolation mechanisms within VSI is first discussed. Hardware solutions for the protection of power semiconductors with fault detection and diagnosis mechanisms are then proposed to provide conditions to isolate and replace damaged power devices (or branches) in real time. Experimental results from a prototype are included to validate the proposed solutions.

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A 10 kJ electromagnetic forming (EMF) modulator with energy recovery based on two resonant power modules, each containing a 4.5 kV/30-kA silicon controlled rectifier, a 1.11-mF capacitor bank and an energy recovery circuit, working in parallel to allow a maximum actuator discharge current amplitude and rate of 50 kA and 2 kA/mu s was successfully developed and tested. It can be plugged in standard single phase 230 V/16 A mains socket and the circuit is able to recover up to 32% of its initial energy, reducing the charging time of conventional EMF systems by up to 68%.

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This paper focuses on a novel formalization for assessing the five parameter modeling of a photovoltaic cell. An optimization procedure is used as a feasibility problem to find the parameters tuned at the open circuit, maximum power, and short circuit points in order to assess the data needed for plotting the I-V curve. A comparison with experimental results is presented for two monocrystalline PV modules.

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A mathematical model that simulates the operation of a solid-state bipolar Marx modulator topology, including the influence of parasitic capacitances is presented and discussed as a tool to analyze the circuit behavior and to assist the design engineer to select the semiconductor components and to enhance the operating performance. Simulations show good agreement with experimental results, considering a four stage circuit assembled with 1200 V isolated gate bipolar transistors and diodes, operating at 1000 V dc input voltage and 1-kHz frequency, giving 4 kV and 10-mu s output pulses into several resistive loads. Results show that parasitic capacitances between Marx cells to ground can significantly load the solid-state switches, adding new operating circuit conditions.

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Fractional Calculus (FC) goes back to the beginning of the theory of differential calculus. Nevertheless, the application of FC just emerged in the last two decades. It has been recognized the advantageous use of this mathematical tool in the modelling and control of many dynamical systems. Having these ideas in mind, this paper discusses a FC perspective in the study of the dynamics and control of several systems. The paper investigates the use of FC in the fields of controller tuning, legged robots, electrical systems and digital circuit synthesis.

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Debugging electronic circuits is traditionally done with bench equipment directly connected to the circuit under debug. In the digital domain, the difficulties associated with the direct physical access to circuit nodes led to the inclusion of resources providing support to that activity, first at the printed circuit level, and then at the integrated circuit level. The experience acquired with those solutions led to the emergence of dedicated infrastructures for debugging cores at the system-on-chip level. However, all these developments had a small impact in the analog and mixed-signal domain, where debugging still depends, to a large extent, on direct physical access to circuit nodes. As a consequence, when analog and mixed-signal circuits are integrated as cores inside a system-on-chip, the difficulties associated with debugging increase, which cause the time-to-market and the prototype verification costs to also increase. The present work considers the IEEE1149.4 infrastructure as a means to support the debugging of mixed-signal circuits, namely to access the circuit nodes and also an embedded debug mechanism named mixed-signal condition detector, necessary for watch-/breakpoints and real-time analysis operations. One of the main advantages associated with the proposed solution is the seamless migration to the system-on-chip level, as the access is done through electronic means, thus easing debugging operations at different hierarchical levels.

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Engineering Education includes not only teaching theoretical fundamental concepts but also its verification during practical lessons in laboratories. The usual strategies to carry out this action are frequently based on Problem Based Learning, starting from a given state and proceeding forward to a target state. The possibility or the effectiveness of this procedure depends on previous states and if the present state was caused or resulted from earlier ones. This often happens in engineering education when the achieved results do not match the desired ones, e.g. when programming code is being developed or when the cause of the wrong behavior of an electronic circuit is being identified. It is thus important to also prepare students to proceed in the reverse way, i.e. given a start state generate the explanation or even the principles that underlie it. Later on, this sort of skills will be important. For instance, to a doctor making a patient?s story or to an engineer discovering the source of a malfunction. This learning methodology presents pedagogical advantages besides the enhanced preparation of students to their future work. The work presented on his document describes an automation project developed by a group of students in an engineering polytechnic school laboratory. The main objective was to improve the performance of a Braille machine. However, in a scenario of Reverse Problem-Based learning, students had first to discover and characterize the entire machine's function before being allowed (and being able) to propose a solution for the existing problem.

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A genetic algorithm used to design radio-frequency binary-weighted differential switched capacitor arrays (RFDSCAs) is presented in this article. The algorithm provides a set of circuits all having the same maximum performance. This article also describes the design, implementation, and measurements results of a 0.25 lm BiCMOS 3-bit RFDSCA. The experimental results show that the circuit presents the expected performance up to 40 GHz. The similarity between the evolutionary solutions, circuit simulations, and measured results indicates that the genetic synthesis method is a very useful tool for designing optimum performance RFDSCAs.

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Fractional Calculus FC goes back to the beginning of the theory of differential calculus. Nevertheless, the application of FC just emerged in the last two decades, due to the progress in the area of chaos that revealed subtle relationships with the FC concepts. In the field of dynamical systems theory some work has been carried out but the proposed models and algorithms are still in a preliminary stage of establishment. Having these ideas in mind, the paper discusses FC in the study of system dynamics and control. In this perspective, this paper investigates the use of FC in the fields of controller tuning, legged robots, redundant robots, heat diffusion, and digital circuit synthesis.

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Mg alloys can be used as bioresorsable metallic implants. However, the high corrosion rate of magnesium alloys has limited their biomedical applications. Although Mg ions are essential to the human body, an excess may cause undesirable health effects. Therefore, surface treatments are required to enhance the corrosion resistance of magnesium parts, decreasing its rate to biocompatible levels and allowing its safe application as bioresorbable metallic implants. The application of biocompatible silane coatings is envisaged as a suitable strategy for retarding the corrosion process of magnesium alloys. In the current work, a new glycidoxypropyltrimethoxysilane (GPTMS) based coating was tested on AZ31 magnesium substrates subjected to different surface conditioning procedures before coating deposition. The surface conditioning included a short etching with hydrofluoric acid (HF) or a dc polarisation in alkaline electrolyte. The silane coated samples were immersed in Hank's solution and the protective performance of the coating was studied through electrochemical impedance spectroscopy (EIS). The EIS data was treated by new equivalent circuit models and the results revealed that the surface conditioning process plays a key role in the effectiveness of the silane coating. The HF treated samples led to the highest impedance values and delayed the coating degradation, compared to the mechanically polished samples or to those submitted to dc polarisation.

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Current Electrocardiographic (ECG) signal acquisition methods are generally highly intrusive, as they involve the use of pre-gelled electrodes and cabled sensors placed directly on the person, at the chest or limbs level. Moreover, systems that make use of alternative conductive materials to overcome this issue, only provide heart rate information and not the detailed signal itself. We present a comparison and evaluation of two types of dry electrodes as interface with the skin, targeting wearable and low intrusiveness applications, which enable ECG measurement without the need for any apparatus permanently fitted to the individual. In particular, our approach is targeted at ECG biometrics using signals collected at the hand or finger level. A custom differential circuit with virtual ground was also developed for enhanced usability. Our work builds upon the current stateof-the-art in sensoring devices and processing tools, and enables novel data acquisition settings through the use of dry electrodes. Experimental evaluation was performed for Ag/AgCl and Electrolycra materials, and results show that both materials exhibit adequate performance for the intended application.

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The increasing complexity of VLSI circuits and the reduced accessibility of modern packaging and mounting technologies restrict the usefulness of conventional in-circuit debugging tools, such as in-circuit emulators for microprocessors and microcontrollers. However, this same trend enables the development of more complex products, which in turn require more powerful debugging tools. These conflicting demands could be met if the standard scan test infrastructures now common in most complex components were able to match the debugging requirements of design verification and prototype validation. This paper analyses the main debug requirements in the design of microprocessor-based applications and the feasibility of their implementation using the mandatory, optional and additional operating modes of the standard IEEE 1149.1 test infrastructure.

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Characteristics of tunable wavelength pi'n/pin filters based on a-SiC:H multilayered stacked cells are studied both experimentally and theoretically. Results show that the device combines the demultiplexing operation with the simultaneous photodetection and self amplification of the signal. An algorithm to decode the multiplex signal is established. A capacitive active band-pass filter model is presented and supported by an electrical simulation of the state variable filter circuit. Experimental and simulated results show that the device acts as a state variable filter. It combines the properties of active high-pass and low-pass filter sections into a capacitive active band-pass filter using a changing capacitance to control the power delivered to the load.