High-Efficiency Harmonic-Peaking Class-EF Power Amplifiers with Enhanced Maximum Operating Frequency

The recently introduced Class-EF power amplifier (PA) has a peak switch voltage lower than that of the Class-E PA. However, the value of the transistor output capacitance at high frequencies is typically larger than the required Class-EF optimum shunt capacitance. Consequently, soft-switching operation that minimizes power dissipation during off-to-on transition cannot be achieved at high frequencies. Two new Class-EF PA variants with transmission-line load networks, namely, third-harmonic-peaking (THP) and fifth-harmonic-peaking (FHP) Class-EF PAs are proposed in this paper. These permit operation at higher frequencies at no expense to other PA figures of merit. Analytical expressions are derived in order to obtain circuit component values, which satisfy the required Class-EF impedances at fundamental frequency, all even harmonics, and the first few odd harmonics as well as simultaneously providing impedance matching to a 50- Ω load. Furthermore, a novel open-circuit and shorted stub arrangement, which has substantial practical benefits, is proposed to replace the normal quarter-wave line connected at the transistor's drain. Using GaN HEMTs, two PA prototypes were built. Measured peak drain efficiency of 91% and output power of 39.5 dBm were obtained at 2.22 GHz for the THP Class-EF PA. The FHP Class-EF PA delivered output power of 41.9 dBm with 85% drain efficiency at 1.52 GHz.

Circular polarisation frequency selective surface operating in Ku and Ka band

A double layer circular polarization (CP) frequency selective surface (FSS) for use as a dual-band quasi-optical diplexer suitable for deployment in reflector antenna systems is described. The FSS was designed to reflect Ku band signals (11.7–12.75 GHz) while transmitting Ka band signals (17.3–20.2 GHz) and conserving CP in each of these bands. The simulated/measured reflection loss over the Ku band was less than 0.05/0.1 dB for both TE and TM polarizations, while the simulated/measured axial ratio was less than 0.2/0.75 dB. Over the Ka band, the simulated/measured transmission loss for both polarizations was below 0.25/0.4 dB and the simulated/measured axial ratio was less than 0.25/0.75 dB. To the best of our knowledge, this is the first report of a metallo-dielectric FSS that simultaneously operates in CP for an oblique angle of incidence in both Ku and Ka bands.

Simultaneous Measurements of the Channel Response for Multiple Eavesdroppers Operating in the Vicinity of a Body Area Network at 2.45 GHz

Channel randomness can be exploited to generate secret keys. However, to ensure secrecy, it is necessary that the channel response of any eavesdropping party remain sufficiently de-correlated with that of the legitimate users'. In this paper, we investigate whether such de-correlation occurs for a body area network (BAN) operating in an indoor environment at 2.45 GHz. The hypothetical BAN configuration consisted of two legitimate transceivers, one situated on the user's left wrist and the other on the user's waist. The eavesdroppers were positioned in either a co-located or distributed manner in the area surrounding the BAN user. Using the simultaneous channel response measured at the legitimate BAN nodes and the eavesdropper positions for stationary and mobile scenarios, we analyze the localized correlation coefficient. This allows us to determine if it is possible to generate secret keys in the presence of multiple eavesdroppers in an indoor environment. Our experimental results show that although channel reciprocity was observed for both the stationary and the mobile scenarios, a higher de-correlation between the legitimate users' channels was observed for the stationary case. This indicates that mobile scenarios are better suited for secret key generation.

Study of the impact from nonlinear distortion in radio receiver architectures

A dissertação de doutoramento apresentada insere-se na área de electrónica não-linear de rádio-frequência (RF), UHF e microondas, tendo como principal campo de acção o estudo da distorção nãolinear em arquitecturas de recepção rádio, nomeadamente receptores de conversão directa como Power Meters, RFID (Radio Frequency IDentification) ou SDR (Software Define Radio) front-ends. Partindo de um estudo exaustivo das actuais arquitecturas de recepção de radiofrequência e revendo todos os conceitos teóricos relacionados com o desempenho não-linear dos sistemas/componentes electrónicos, foram desenvolvidos algoritmos matemáticos de modulação dos comportamentos não-lineares destas arquitecturas, simulados e testados em laboratório e propostas novas arquitecturas para a minimização ou cancelamento do impacto negativo de grandes interferidores em frequências vizinhas ao do sistema pretendido.

IB-DFE receiver techniques for CP-assisted block transmission within DS-CDMA and MC-CDMA systems

MC-CDMA (MultiCarrier Code Division Multiple Access), currently regarded as a promissing multiple access scheme for broadband communications, is known to combine the advantages of an OFDM-based (Orthogonal Frequency Division Multiplexing), CP-assisted (Cyclic Prefix) block transmission with those of CDMA systems. Recently, it was recognised that DS-CDMA (Direct Sequence) implementations can also take advantage of the beneficts of the CP-assisted block transmission approach, therefore enabling an efficient use of FFT-based (Fast Fourier Transform), chip level FDE (Frequency- Domain Equalisation) techniques. In this paper we consider the use of IB-DFE (Iterative Block Decision Feedback Equalisation) FDE techniques within both CP-assisted MC-CDMA systems with frequency-domain spreading and DS-CDMA systems. Our simulation results show that an IB-DFE receiver with moderate complexity is suitable in both cases, with excellent performances that can be close to the single-code matched filter bound (especially for the CP-assisted DSCDMA alternative), even with full code usage.

A frequency-domain receiver for asynchronous systems employing CP-assisted DS-CDMA schemes

In this paper we consider the uplink transmission within CP-assisted (Cyclic Pre¯x) DS-CDMA (Direct Sequence Code Division Multiple Access) systems and we present a frequency-domain MUD (MultiUser Detection) receiver with iterative estimation and compensation of residual frequency errors. The proposed receiver is suitable for broadband wireless systems, with performances that can be close to the single-user MFB (Matched Filter Bound), even for fully loaded systems and/or in the presence of strong interfering signals. The receiver is powerful enough for typical asynchronous scenarios, requiring only a coarse synchronization between users.

Adaptive self-calibrating image rejection receiver

An adaptive self-calibrating image rejection receiver is described, containing a modified Weaver image rejection mixer and a Digital Image Rejection Processor (DIRP). The blind source-separation-based DIRP eliminates the I/Q errors improving the Image Rejection Ratio (IRR) without the need for trimming or use of power-hungry discrete components. Hardware complexity is minimal, requiring only two complex coefficients; hence it can be easily integrated into the signal processing path of any receiver. Simulation results show that the proposed approach achieves 75-97 dB of IRR.

Correction of transmitter gain and phase errors at the receiver

This paper explores the benefits of compensating transmitter gain and phase inbalances in the receiver for quadrature communication systems. It is assumed that the gain and phase imbalances are introduced at the transmitter only. A simple non-data aided DSP algorithm is used at the reciever to compensate for the imbalances. Computer simulation has been formed to study a coherent QPSK communication system.

A low-complexity self-calibrating adaptive quadrature receiver

In this paper digital part of a self-calibrating quadrature-receiver is described, containing a digital calibration-engine. The blind source-separation-based calibration-engine eliminates the RF-impairments in real-time hence improving the receiver's performance without the need for test/pilot tones, trimming or use of power-hungry discrete components. Furthermore, an efficient time-multiplexed calibration-engine architecture is proposed and implemented on an FPGA utilising a reduced-range multiplier structure. The use of reduced-range multipliers results in substantial reduction of area as well as power consumption without a compromise in performance when compared with an efficiently designed general purpose multiplier. The performance of the calibration-engine does not depend on the modulation format or the constellation size of the received signal; hence it can be easily integrated into the digital signal processing paths of any receiver.

Design and low-power implementation of an adaptive image rejection receiver

This paper deals with and details the design and implementation of a low-power; hardware-efficient adaptive self-calibrating image rejection receiver based on blind-source-separation that alleviates the RF analog front-end impairments. Hybrid strength-reduced and re-scheduled data-flow, low-power implementation of the adaptive self-calibration algorithm is developed and its efficiency is demonstrated through simulation case studies. A behavioral and structural model is developed in Matlab as well as a low-level architectural design in VHDL providing valuable test benches for the performance measures undertaken on the detailed algorithms and structures.

Design of a power-aware digital image rejection receiver

This paper deals with and details the design of a power-aware adaptive digital image rejection receiver based on blind-source-separation that alleviates the RF analog front-end impairments. Power-aware system design at the RTL level without having to redesign arithmetic circuits is used to reduce the power consumption in nomadic devices. Power-aware multipliers with configurable precision are used to trade-off the image-rejection-ratio (IRR) performance with power consumption. Results of the simulation case studies demonstrate that the IRR performance of the power-aware system is comparable to that of the normal implementation albeit degraded slightly, but well within the acceptable limits.

Dual-tracking multi-constellation GNSS front-end for high-performance receiver applications

This paper presents the design and implementation of a dual–tracking Radio Frequency (RF) front–end for a multi–constellation Global Navigation Satellite Systems (GNSS) receiver. The RF frond–end is based on the direct RF conversion architecture, which employs sub–Nyquist sampling (also known as subsampling) at RF. The dual–tracking RF front–end is composed of a few RF components that are duplicated to form the two RF channels. Employing a dual–channel Analogue–to–Digital Converter (ADC) enables synchronisation of the RF channels and minimises the errors resulting from the differences in the satellite clocks and the propagation delay between the two RF channels. The digitised GNSS signals are processed by two separate acquisition and tracking engines that are driven by the front–end’s master clock. This setup provides two synchronised receivers that are integrated onto one piece of hardware. The hardware is intended to be used for research applications such as multipath mitigation, scintillation assessment, and advanced satellite clock and spatial frame transformation modelling.