Mathematical modelling: a laser soldering process for an optoelectronics butterfly package

For sensitive optoelectronic components, traditional soldering techniques cannot be used because of their inherent sensitivity to thermal stresses. One such component is the Optoelectronic Butterfly Package which houses a laser diode chip aligned to a fibre-optic cable. Even sub-micron misalignment of the fibre optic and laser diode chip can significantly reduce the performance of the device. The high cost of each unit requires that the number of damaged components, via the laser soldering process, are kept to a minimum. Mathematical modelling is undertaken to better understand the laser soldering process and to optimize operational parameters such as solder paste volume, copper pad dimensions, laser solder times for each joint, laser intensity and absorption coefficient. Validation of the model against experimental data will be completed, and will lead to an optimization of the assembly process, through an iterative modelling cycle. This will ultimately reduce costs, improve the process development time and increase consistency in the laser soldering process.

Microwave cure of conductive adhesives for flip-chip & microsystems applications

The curing of conductive adhesives and underfills can save considerable time and offer cost benefits for the microsystems and electronics packaging industry. In contrast to conventional ovens, curing by microwave energy generates heat internally within each individual component of an assembly. The rate at which heat is generated is different for each of the components and depends on the material properties as well as the oven power and frequency. This leads to a very complex and transient thermal state, which is extremely difficult to measure experimentally. Conductive adhesives need to be raised to a minimum temperature to initiate the cross-linking of the resin polymers, whilst some advanced packaging materials currently under investigation impose a maximum temperature constraint to avoid damage. Thermal imagery equipment integrated with the microwave oven can offer some information on the thermal state but such data is based on the surface temperatures. This paper describes computational models that can simulate the internal temperatures within each component of an assembly including the critical region between the chip and substrate. The results obtained demonstrate that due to the small mass of adhesive used in the joints, the temperatures reached are highly dependent on the material properties of the adjacent chip and substrate.

Solder life prediction in a thermal analysis software environment

This paper describes recent developments made to the stress analysis module within FLOTHERM, extending its capability to handle viscoplastic behavior. It also presents the validation of this approach and results obtained for an SMT resistor as an illustrative example. Lifetime predictions are made using the creep strain energy based models of Darveaux. Comment is made about the applicability of the damage model to the geometry of the joint under study.

Moisture Effects on the Reliability of Anisotropic Conductive Film Interconnection for Flip Chip on Flex Applications

Anisotropic conductive film (ACF) which consists of an adhesive epoxy matrix and randomly distributed conductive particles are widely used as the connection material for electronic devices with high I/O counts. However, for the semiconductor industry the reliability of the ACF is still a major concern due to a lack of experimental reliability data. This paper reports the investigations into the moisture-induced failures in Flip-Chip-on-Flex interconnections with Anisotropic Conductive Films (ACFs). Both experimental and modeling methods were applied. In the experiments, the contact resistance was used as a quality indicator and was measured continuously during the accelerated tests (autoclave tests). The temperature, relative humidity and the pressure were set at 121°C, 100%RH, and 2atm respectively. The contact resistance of the ACF joints increased during the tests and nearly 25% of the joints were found to be open after 168 hours’ testing time. Visible conduction gaps between the adhesive and substrate pads were observed. Cracks at the adhesive/flex interface were also found. For a better understanding of the experimental results, 3-D Finite Element (FE) models were built and a macro-micro modeling method was used to determine the moisture diffusion and moisture-induced stresses inside the ACF joints. Modeling results are consistent with the findings in the experimental work.

An investigation into the rheological properties of different lead-free solder pastes for surface mount applications

Purpose – The purpose of this paper is to investigate the rheological behaviour of three different lead-free solder pastes used for surface mount applications in the electronic industry.Design/methodology/approach – This study concerns the rheological measurements of solder paste samples and is made up of three parts. The first part deals with the measurement of rhelogical properties with three different measuring geometries, the second part looks into the effect of frequencies on oscillatory stress sweep measurements and the final part reports on the characterisation and comparison of three different types of Pb-free solder pastes. Findings – Among the three geometries, the serrated parallel plate was found effective in minimising the wall-slip effect. From the oscillatory stresssweep data with different frequencies; it was observed that the linear visco-elastic region is independent of frequency for all the solder paste samples. To understand the shear thinning behaviour of solder paste, the well known Cross and Carreau models were fitted to the viscosity data. Moreover,creep-recovery and dynamic frequency-sweep tests were also carried out without destroying the sample’s structure and have yielded useful information on the pastes behaviour.Research limitations/implications – More extensive research is needed to fully characterise the wall-slip behaviour during the rheological measurements of solder pastes. Practical implications – The rheological test results presented in this paper will be of important value for research and development, quality control and facilitation of the manufacturing of solder pastes and flux mediums. Originality/value – This paper shows how wall-slip effects can be effectively avoided during rheological measurements of solder pastes. The paper also outlines how different rheological test methods can be used to characterise solder paste behaviours

Una revisión de la Cadena Datos-Información-Conocimiento desde el Pragmatismo de Peirce

La Cadena Datos-Información-Conocimiento (DIC), denominada “Jerarquía de la Información” o “Pirámide del Conocimiento”, es uno de los modelos más importantes en la Gestión de la Información y la Gestión del Conocimiento. Por lo general, la estructuración de la cadena se ha ido definiendo como una arquitectura en la que cada elemento se levanta sobre el elemento inmediatamente inferior; sin embargo no existe un consenso en la definición de los elementos, ni acerca de los procesos que transforman un elemento de un nivel a uno del siguiente nivel. En este artículo se realiza una revisión de la Cadena Datos-Información-Conocimiento examinando las definiciones más relevantes sobre sus elementos y sobre su articulación en la literatura, para sintetizar las acepciones más comunes. Se analizan los elementos de la Cadena DIC desde la semiótica de Peirce; enfoque que nos permite aclarar los significados e identificar las diferencias, las relaciones y los roles que desempeñan en la cadena desde el punto de vista del pragmatismo. Finalmente se propone una definición de la Cadena DIC apoyada en las categorías triádicas de signos y la semiosis ilimitada de Peirce, los niveles de sistemas de signos de Stamper y las metáforas de Zeleny.

Semi-formal Models to Support Program Development: Autonomic Management within Component Based Parallel and Distributed Programming

Functional and non-functional concerns require different programming effort, different techniques and different methodologies when attempting to program efficient parallel/distributed applications. In this work we present a "programmer oriented" methodology based on formal tools that permits reasoning about parallel/distributed program development and refinement. The proposed methodology is semi-formal in that it does not require the exploitation of highly formal tools and techniques, while providing a palatable and effective support to programmers developing parallel/distributed applications, in particular when handling non-functional concerns.

Multiple model bootstrap filter for maneuvering target tracking

The extension of the bootstrap filter to the multiple model target tracking problem is considered. Bayesian bootstrap filtering is a very powerful technique since it represents samples by random samples and is therefore not restricted to linear, Gaussian systems, making it ideal for the multiple model problem where very complex densities fan be generated.