Resource usage analysis of logic programs via abstract interpretation using sized types

We present a novel general resource analysis for logic programs based on sized types. Sized types are representations that incorporate structural (shape) information and allow expressing both lower and upper bounds on the size of a set of terms and their subterms at any position and depth. They also allow relating the sizes of terms and subterms occurring at different argument positions in logic predicates. Using these sized types, the resource analysis can infer both lower and upper bounds on the resources used by all the procedures in a program as functions on input term (and subterm) sizes, overcoming limitations of existing resource analyses and enhancing their precision. Our new resource analysis has been developed within the abstract interpretation framework, as an extension of the sized types abstract domain, and has been integrated into the Ciao preprocessor, CiaoPP. The abstract domain operations are integrated with the setting up and solving of recurrence equations for inferring both size and resource usage functions. We show that the analysis is an improvement over the previous resource analysis present in CiaoPP and compares well in power to state of the art systems.

Automated end user-centred adaptation of web components through automated description logic-based reasoning

Context: This paper addresses one of the major end-user development (EUD) challenges, namely, how to pack today?s EUD support tools with composable elements. This would give end users better access to more components which they can use to build a solution tailored to their own needs. The success of later end-user software engineering (EUSE) activities largely depends on how many components each tool has and how adaptable components are to multiple problem domains. Objective: A system for automatically adapting heterogeneous components to a common development environment would offer a sizeable saving of time and resources within the EUD support tool construction process. This paper presents an automated adaptation system for transforming EUD components to a standard format. Method: This system is based on the use of description logic. Based on a generic UML2 data model, this description logic is able to check whether an end-user component can be transformed to this modeling language through subsumption or as an instance of the UML2 model. Besides it automatically finds a consistent, non-ambiguous and finite set of XSLT mappings to automatically prepare data in order to leverage the component as part of a tool that conforms to the target UML2 component model. Results: The proposed system has been successfully applied to components from four prominent EUD tools. These components were automatically converted to a standard format. In order to validate the proposed system, rich internet applications (RIA) used as an operational support system for operators at a large services company were developed using automatically adapted standard format components. These RIAs would be impossible to develop using each EUD tool separately. Conclusion: The positive results of applying our system for automatically adapting components from current tool catalogues are indicative of the system?s effectiveness. Use of this system could foster the growth of web EUD component catalogues, leveraging a vast ecosystem of user-centred SaaS to further current EUSE trends.

UAS See-and-Avoid Strategy using a Fuzzy Logic Controller Optimized by Cross-Entropy in Scaling Factors and Membership Functions.

This work aims to develop a novel Cross-Entropy (CE) optimization-based fuzzy controller for Unmanned Aerial Monocular Vision-IMU System (UAMVIS) to solve the seeand-avoid problem using its accurate autonomous localization information. The function of this fuzzy controller is regulating the heading of this system to avoid the obstacle, e.g. wall. In the Matlab Simulink-based training stages, the Scaling Factor (SF) is adjusted according to the specified task firstly, and then the Membership Function (MF) is tuned based on the optimized Scaling Factor to further improve the collison avoidance performance. After obtained the optimal SF and MF, 64% of rules has been reduced (from 125 rules to 45 rules), and a large number of real flight tests with a quadcopter have been done. The experimental results show that this approach precisely navigates the system to avoid the obstacle. To our best knowledge, this is the first work to present the optimized fuzzy controller for UAMVIS using Cross-Entropy method in Scaling Factors and Membership Functions optimization.

Extending the expressiveness of fuzzy logic languages

En el trabajo que aquí presentamos se incluye la base teórica (sintaxis y semántica) y una implementación de un framework para codificar el razonamiento de la representación difusa o borrosa del mundo (tal y como nosotros, seres humanos, entendemos éste). El interés en la realización de éste trabajo parte de dos fuentes: eliminar la complejidad existente cuando se realiza una implementación con un lenguaje de programación de los llamados de propósito general y proporcionar una herramienta lo suficientemente inteligente para dar respuestas de forma constructiva a consultas difusas o borrosas. El framework, RFuzzy, permite codificar reglas y consultas en una sintaxis muy cercana al lenguaje natural usado por los seres humanos para expresar sus pensamientos, pero es bastante más que eso. Permite representar conceptos muy interesantes, como fuzzificaciones (funciones usadas para convertir conceptos no difusos en difusos), valores por defecto (que se usan para devolver resultados un poco menos válidos que los que devolveríamos si tuviésemos la información necesaria para calcular los más válidos), similaridad entre atributos (característica que utilizamos para buscar aquellos individuos en la base de datos con una característica similar a la buscada), sinónimos o antónimos y, además, nos permite extender el numero de conectivas y modificadores (incluyendo modificadores de negación) que podemos usar en las reglas y consultas. La personalización de la definición de conceptos difusos (muy útil para lidiar con el carácter subjetivo de los conceptos borrosos, donde nos encontramos con que cualificar a alguien de “alto” depende de la altura de la persona que cualifica) es otra de las facilidades incluida. Además, RFuzzy implementa la semántica multi-adjunta. El interés en esta reside en que introduce la posibilidad de obtener la credibilidad de una regla a partir de un conjunto de datos y una regla dada y no solo el grado de satisfacción de una regla a partir de el universo modelado en nuestro programa. De esa forma podemos obtener automáticamente la credibilidad de una regla para una determinada situación. Aún cuando la contribución teórica de la tesis es interesante en si misma, especialmente la inclusión del modificador de negacion, sus multiples usos practicos lo son también. Entre los diferentes usos que se han dado al framework destacamos el reconocimiento de emociones, el control de robots, el control granular en computacion paralela/distribuída y las busquedas difusas o borrosas en bases de datos. ABSTRACT In this work we provide a theoretical basis (syntax and semantics) and a practical implementation of a framework for encoding the reasoning and the fuzzy representation of the world (as human beings understand it). The interest for this work comes from two sources: removing the existing complexity when doing it with a general purpose programming language (one developed without focusing in providing special constructions for representing fuzzy information) and providing a tool intelligent enough to answer, in a constructive way, expressive queries over conventional data. The framework, RFuzzy, allows to encode rules and queries in a syntax very close to the natural language used by human beings to express their thoughts, but it is more than that. It allows to encode very interesting concepts, as fuzzifications (functions to easily fuzzify crisp concepts), default values (used for providing results less adequate but still valid when the information needed to provide results is missing), similarity between attributes (used to search for individuals with a characteristic similar to the one we are looking for), synonyms or antonyms and it allows to extend the number of connectives and modifiers (even negation) we can use in the rules. The personalization of the definition of fuzzy concepts (very useful for dealing with the subjective character of fuzziness, in which a concept like tall depends on the height of the person performing the query) is another of the facilities included. Besides, RFuzzy implements the multi-adjoint semantics. The interest in them is that in addition to obtaining the grade of satisfaction of a consequent from a rule, its credibility and the grade of satisfaction of the antecedents we can determine from a set of data how much credibility we must assign to a rule to model the behaviour of the set of data. So, we can determine automatically the credibility of a rule for a particular situation. Although the theoretical contribution is interesting by itself, specially the inclusion of the negation modifier, the practical usage of it is equally important. Between the different uses given to the framework we highlight emotion recognition, robocup control, granularity control in parallel/distributed computing and flexible searches in databases.

Fault management techniques for systems with SRAM-based FPGAs

Las Field-Programmable Gate Arrays (FPGAs) SRAM se construyen sobre una memoria de configuración de tecnología RAM Estática (SRAM). Presentan múltiples características que las hacen muy interesantes para diseñar sistemas empotrados complejos. En primer lugar presentan un coste no-recurrente de ingeniería (NRE) bajo, ya que los elementos lógicos y de enrutado están pre-implementados (el diseño de usuario define su conexionado). También, a diferencia de otras tecnologías de FPGA, pueden ser reconfiguradas (incluso en campo) un número ilimitado de veces. Es más, las FPGAs SRAM de Xilinx soportan Reconfiguración Parcial Dinámica (DPR), la cual permite reconfigurar la FPGA sin interrumpir la aplicación. Finalmente, presentan una alta densidad de lógica, una alta capacidad de procesamiento y un rico juego de macro-bloques. Sin embargo, un inconveniente de esta tecnología es su susceptibilidad a la radiación ionizante, la cual aumenta con el grado de integración (geometrías más pequeñas, menores tensiones y mayores frecuencias). Esta es una precupación de primer nivel para aplicaciones en entornos altamente radiativos y con requisitos de alta confiabilidad. Este fenómeno conlleva una degradación a largo plazo y también puede inducir fallos instantáneos, los cuales pueden ser reversibles o producir daños irreversibles. En las FPGAs SRAM, los fallos inducidos por radiación pueden aparecer en en dos capas de arquitectura diferentes, que están físicamente superpuestas en el dado de silicio. La Capa de Aplicación (o A-Layer) contiene el hardware definido por el usuario, y la Capa de Configuración contiene la memoria de configuración y la circuitería de soporte. Los fallos en cualquiera de estas capas pueden hacer fracasar el sistema, lo cual puede ser ás o menos tolerable dependiendo de los requisitos de confiabilidad del sistema. En el caso general, estos fallos deben gestionados de alguna manera. Esta tesis trata sobre la gestión de fallos en FPGAs SRAM a nivel de sistema, en el contexto de sistemas empotrados autónomos y confiables operando en un entorno radiativo. La tesis se centra principalmente en aplicaciones espaciales, pero los mismos principios pueden aplicarse a aplicaciones terrenas. Las principales diferencias entre ambas son el nivel de radiación y la posibilidad de mantenimiento. Las diferentes técnicas para la gestión de fallos en A-Layer y C-Layer son clasificados, y sus implicaciones en la confiabilidad del sistema son analizados. Se proponen varias arquitecturas tanto para Gestores de Fallos de una capa como de doble-capa. Para estos últimos se propone una arquitectura novedosa, flexible y versátil. Gestiona las dos capas concurrentemente de manera coordinada, y permite equilibrar el nivel de redundancia y la confiabilidad. Con el objeto de validar técnicas de gestión de fallos dinámicas, se desarrollan dos diferentes soluciones. La primera es un entorno de simulación para Gestores de Fallos de C-Layer, basado en SystemC como lenguaje de modelado y como simulador basado en eventos. Este entorno y su metodología asociada permite explorar el espacio de diseño del Gestor de Fallos, desacoplando su diseño del desarrollo de la FPGA objetivo. El entorno incluye modelos tanto para la C-Layer de la FPGA como para el Gestor de Fallos, los cuales pueden interactuar a diferentes niveles de abstracción (a nivel de configuration frames y a nivel físico JTAG o SelectMAP). El entorno es configurable, escalable y versátil, e incluye capacidades de inyección de fallos. Los resultados de simulación para algunos escenarios son presentados y comentados. La segunda es una plataforma de validación para Gestores de Fallos de FPGAs Xilinx Virtex. La plataforma hardware aloja tres Módulos de FPGA Xilinx Virtex-4 FX12 y dos Módulos de Unidad de Microcontrolador (MCUs) de 32-bits de propósito general. Los Módulos MCU permiten prototipar Gestores de Fallos de C-Layer y A-Layer basados en software. Cada Módulo FPGA implementa un enlace de A-Layer Ethernet (a través de un switch Ethernet) con uno de los Módulos MCU, y un enlace de C-Layer JTAG con el otro. Además, ambos Módulos MCU intercambian comandos y datos a través de un enlace interno tipo UART. Al igual que para el entorno de simulación, se incluyen capacidades de inyección de fallos. Los resultados de pruebas para algunos escenarios son también presentados y comentados. En resumen, esta tesis cubre el proceso completo desde la descripción de los fallos FPGAs SRAM inducidos por radiación, pasando por la identificación y clasificación de técnicas de gestión de fallos, y por la propuesta de arquitecturas de Gestores de Fallos, para finalmente validarlas por simulación y pruebas. El trabajo futuro está relacionado sobre todo con la implementación de Gestores de Fallos de Sistema endurecidos para radiación. ABSTRACT SRAM-based Field-Programmable Gate Arrays (FPGAs) are built on Static RAM (SRAM) technology configuration memory. They present a number of features that make them very convenient for building complex embedded systems. First of all, they benefit from low Non-Recurrent Engineering (NRE) costs, as the logic and routing elements are pre-implemented (user design defines their connection). Also, as opposed to other FPGA technologies, they can be reconfigured (even in the field) an unlimited number of times. Moreover, Xilinx SRAM-based FPGAs feature Dynamic Partial Reconfiguration (DPR), which allows to partially reconfigure the FPGA without disrupting de application. Finally, they feature a high logic density, high processing capability and a rich set of hard macros. However, one limitation of this technology is its susceptibility to ionizing radiation, which increases with technology scaling (smaller geometries, lower voltages and higher frequencies). This is a first order concern for applications in harsh radiation environments and requiring high dependability. Ionizing radiation leads to long term degradation as well as instantaneous faults, which can in turn be reversible or produce irreversible damage. In SRAM-based FPGAs, radiation-induced faults can appear at two architectural layers, which are physically overlaid on the silicon die. The Application Layer (or A-Layer) contains the user-defined hardware, and the Configuration Layer (or C-Layer) contains the (volatile) configuration memory and its support circuitry. Faults at either layers can imply a system failure, which may be more ore less tolerated depending on the dependability requirements. In the general case, such faults must be managed in some way. This thesis is about managing SRAM-based FPGA faults at system level, in the context of autonomous and dependable embedded systems operating in a radiative environment. The focus is mainly on space applications, but the same principles can be applied to ground applications. The main differences between them are the radiation level and the possibility for maintenance. The different techniques for A-Layer and C-Layer fault management are classified and their implications in system dependability are assessed. Several architectures are proposed, both for single-layer and dual-layer Fault Managers. For the latter, a novel, flexible and versatile architecture is proposed. It manages both layers concurrently in a coordinated way, and allows balancing redundancy level and dependability. For the purpose of validating dynamic fault management techniques, two different solutions are developed. The first one is a simulation framework for C-Layer Fault Managers, based on SystemC as modeling language and event-driven simulator. This framework and its associated methodology allows exploring the Fault Manager design space, decoupling its design from the target FPGA development. The framework includes models for both the FPGA C-Layer and for the Fault Manager, which can interact at different abstraction levels (at configuration frame level and at JTAG or SelectMAP physical level). The framework is configurable, scalable and versatile, and includes fault injection capabilities. Simulation results for some scenarios are presented and discussed. The second one is a validation platform for Xilinx Virtex FPGA Fault Managers. The platform hosts three Xilinx Virtex-4 FX12 FPGA Modules and two general-purpose 32-bit Microcontroller Unit (MCU) Modules. The MCU Modules allow prototyping software-based CLayer and A-Layer Fault Managers. Each FPGA Module implements one A-Layer Ethernet link (through an Ethernet switch) with one of the MCU Modules, and one C-Layer JTAG link with the other. In addition, both MCU Modules exchange commands and data over an internal UART link. Similarly to the simulation framework, fault injection capabilities are implemented. Test results for some scenarios are also presented and discussed. In summary, this thesis covers the whole process from describing the problem of radiationinduced faults in SRAM-based FPGAs, then identifying and classifying fault management techniques, then proposing Fault Manager architectures and finally validating them by simulation and test. The proposed future work is mainly related to the implementation of radiation-hardened System Fault Managers.

A methodology to analyze, design and implement very fast and robust controls of Buck-type converters

La electrónica digital moderna presenta un desafío a los diseñadores de sistemas de potencia. El creciente alto rendimiento de microprocesadores, FPGAs y ASICs necesitan sistemas de alimentación que cumplan con requirimientos dinámicos y estáticos muy estrictos. Específicamente, estas alimentaciones son convertidores DC-DC de baja tensión y alta corriente que necesitan ser diseñados para tener un pequeño rizado de tensión y una pequeña desviación de tensión de salida bajo transitorios de carga de una alta pendiente. Además, dependiendo de la aplicación, se necesita cumplir con otros requerimientos tal y como proveer a la carga con ”Escalado dinámico de tensión”, donde el convertidor necesitar cambiar su tensión de salida tan rápidamente posible sin sobreoscilaciones, o ”Posicionado Adaptativo de la Tensión” donde la tensión de salida se reduce ligeramente cuanto más grande sea la potencia de salida. Por supuesto, desde el punto de vista de la industria, las figuras de mérito de estos convertidores son el coste, la eficiencia y el tamaño/peso. Idealmente, la industria necesita un convertidor que es más barato, más eficiente, más pequeño y que aún así cumpla con los requerimienos dinámicos de la aplicación. En este contexto, varios enfoques para mejorar la figuras de mérito de estos convertidores se han seguido por la industria y la academia tales como mejorar la topología del convertidor, mejorar la tecnología de semiconducores y mejorar el control. En efecto, el control es una parte fundamental en estas aplicaciones ya que un control muy rápido hace que sea más fácil que una determinada topología cumpla con los estrictos requerimientos dinámicos y, consecuentemente, le da al diseñador un margen de libertar más amplio para mejorar el coste, la eficiencia y/o el tamaño del sistema de potencia. En esta tesis, se investiga cómo diseñar e implementar controles muy rápidos para el convertidor tipo Buck. En esta tesis se demuestra que medir la tensión de salida es todo lo que se necesita para lograr una respuesta casi óptima y se propone una guía de diseño unificada para controles que sólo miden la tensión de salida Luego, para asegurar robustez en controles muy rápidos, se proponen un modelado y un análisis de estabilidad muy precisos de convertidores DC-DC que tienen en cuenta circuitería para sensado y elementos parásitos críticos. También, usando este modelado, se propone una algoritmo de optimización que tiene en cuenta las tolerancias de los componentes y sensados distorsionados. Us ando este algoritmo, se comparan controles muy rápidos del estado del arte y su capacidad para lograr una rápida respuesta dinámica se posiciona según el condensador de salida utilizado. Además, se propone una técnica para mejorar la respuesta dinámica de los controladores. Todas las propuestas se han corroborado por extensas simulaciones y prototipos experimentales. Con todo, esta tesis sirve como una metodología para ingenieros para diseñar e implementar controles rápidos y robustos de convertidores tipo Buck. ABSTRACT Modern digital electronics present a challenge to designers of power systems. The increasingly high-performance of microprocessors, FPGAs (Field Programmable Gate Array) and ASICs (Application-Specific Integrated Circuit) require power supplies to comply with very demanding static and dynamic requirements. Specifically, these power supplies are low-voltage/high-current DC-DC converters that need to be designed to exhibit low voltage ripple and low voltage deviation under high slew-rate load transients. Additionally, depending on the application, other requirements need to be met such as to provide to the load ”Dynamic Voltage Scaling” (DVS), where the converter needs to change the output voltage as fast as possible without underdamping, or ”Adaptive Voltage Positioning” (AVP) where the output voltage is slightly reduced the greater the output power. Of course, from the point of view of the industry, the figures of merit of these converters are the cost, efficiency and size/weight. Ideally, the industry needs a converter that is cheaper, more efficient, smaller and that can still meet the dynamic requirements of the application. In this context, several approaches to improve the figures of merit of these power supplies are followed in the industry and academia such as improving the topology of the converter, improving the semiconductor technology and improving the control. Indeed, the control is a fundamental part in these applications as a very fast control makes it easier for the topology to comply with the strict dynamic requirements and, consequently, gives the designer a larger margin of freedom to improve the cost, efficiency and/or size of the power supply. In this thesis, how to design and implement very fast controls for the Buck converter is investigated. This thesis proves that sensing the output voltage is all that is needed to achieve an almost time-optimal response and a unified design guideline for controls that only sense the output voltage is proposed. Then, in order to assure robustness in very fast controls, a very accurate modeling and stability analysis of DC-DC converters is proposed that takes into account sensing networks and critical parasitic elements. Also, using this modeling approach, an optimization algorithm that takes into account tolerances of components and distorted measurements is proposed. With the use of the algorithm, very fast analog controls of the state-of-the-art are compared and their capabilities to achieve a fast dynamic response are positioned de pending on the output capacitor. Additionally, a technique to improve the dynamic response of controllers is also proposed. All the proposals are corroborated by extensive simulations and experimental prototypes. Overall, this thesis serves as a methodology for engineers to design and implement fast and robust controls for Buck-type converters.

The Balanced Cross-Layer Design Routing Algorithm in Wireless Sensor Networks Using Fuzzy Logic

Recently, the cross-layer design for the wireless sensor network communication protocol has become more and more important and popular. Considering the disadvantages of the traditional cross-layer routing algorithms, in this paper we propose a new fuzzy logic-based routing algorithm, named the Balanced Cross-layer Fuzzy Logic (BCFL) routing algorithm. In BCFL, we use the cross-layer parameters’ dispersion as the fuzzy logic inference system inputs. Moreover, we give each cross-layer parameter a dynamic weight according the value of the dispersion. For getting a balanced solution, the parameter whose dispersion is large will have small weight, and vice versa. In order to compare it with the traditional cross-layer routing algorithms, BCFL is evaluated through extensive simulations. The simulation results show that the new routing algorithm can handle the multiple constraints without increasing the complexity of the algorithm and can achieve the most balanced performance on selecting the next hop relay node. Moreover, the Balanced Cross-layer Fuzzy Logic routing algorithm can adapt to the dynamic changing of the network conditions and topology effectively.

Telemetría de vehículos FSAE con microcontrolador PIC32 y transceptor de radio CC1101

Quizás el campo de las telecomunicaciones sea uno de los campos en el que más se ha progresado en este último siglo y medio, con la ayuda de otros campos de la ciencia y la técnica tales como la computación, la física electrónica, y un gran número de disciplinas, que se han utilizado estos últimos 150 años en conjunción para mejorarse unas con la ayuda de otras. Por ejemplo, la química ayuda a comprender y mejorar campos como la medicina, que también a su vez se ve mejorada por los progresos en la electrónica creados por los físicos y químicos, que poseen herramientas más potentes para calcular y simular debido a los progresos computacionales. Otro de los campos que ha sufrido un gran avance en este último siglo es el de la automoción, aunque estancados en el motor de combustión, los vehículos han sufrido enormes cambios debido a la irrupción de los avances en la electrónica del automóvil con multitud de sistemas ya ampliamente integrados en los vehículos actuales. La Formula SAE® o Formula Student es una competición de diseño, organizada por la SAE International (Society of Automotive Engineers) para estudiantes de universidades de todo el mundo que promueve la ingeniería a través de una competición donde los miembros del equipo diseñan, construyen, desarrollan y compiten en un pequeño y potente monoplaza. En el ámbito educativo, evitando el sistema tradicional de clases magistrales, se introducen cambios en las metodologías de enseñanza y surge el proyecto de la Fórmula Student para lograr una mejora en las acciones formativas, que permitan ir incorporando nuevos objetivos y diseñar nuevas situaciones de aprendizaje que supongan una oportunidad para el desarrollo de competencias de los alumnos, mejorar su formación como ingenieros y contrastar sus progresos compitiendo con las mejores universidades del mundo. En este proyecto se pretende dotar a los alumnos de las escuelas de ingeniería de la UPM que desarrollan el vehículo de FSAE de una herramienta de telemetría con la que evaluar y probar comportamiento del vehículo de FSAE junto con sus subsistemas que ellos mismos diseñan, con el objetivo de evaluar el comportamiento, introducir mejoras, analizar resultados de una manera más rápida y cómoda, con el objetivo de poder progresar más rápidamente en su desarrollo, recibiendo y almacenando una realimentación directa e instantánea del funcionamiento mediante la lectura de los datos que circulan por el bus CAN del vehículo. También ofrece la posibilidad de inyectar datos a los sistemas conectados al bus CAN de manera remota. Se engloba en el conjunto de proyectos de la FSAE, más concretamente en los basados en la plataforma PIC32 y propone una solución conjunta con otros proyectos o también por sí sola. Para la ejecución del proyecto se fabricó una placa compuesta de dos placas de circuito impreso, la de la estación base que envía comandos, instrucciones y datos para inyectar en el bus CAN del vehículo mediante radiofrecuencia y la placa que incorpora el vehículo que envía las tramas que circulan por el bus CAN del vehículo con los identificadores deseados, ejecuta los comandos recibidos por radiofrecuencia y salva las tramas CAN en una memoria USB o SD Card. Las dos PCBs constituyen el hardware del proyecto. El software se compone de dos programas. Un programa para la PCB del vehículo que emite los datos a la estación base, codificado en lenguaje C con ayuda del entorno de desarrollo MPLAB de Microchip. El otro programa hecho con LabView para la PCB de la estación base que recibe los datos provenientes del vehículo y los interpreta. Se propone un hardware y una capa o funciones de software para los microcontroladores PIC32 (similar al de otros proyectos del FSAE) para la transmisión de las tramas del bus CAN del vehículo de manera inalámbrica a una estación base, capaz de insertar tramas en el bus CAN del vehículo enviadas desde la estación base. También almacena estas tramas CAN en un dispositivo USB o SD Card situado en el vehículo. Para la transmisión de los datos se hizo un estudio de las frecuencias de transmisión, la legislación aplicable y los tipos de transceptores. Se optó por utilizar la banda de radiofrecuencia de uso común ISM de 433MHz mediante el transceptor integrado CC110L de Texas Instruments altamente configurable y con interfaz SPI. Se adquirieron dos parejas de módulos compatibles, con amplificador de potencia o sin él. LabView controla la estación que recoge las tramas CAN vía RF y está dotada del mismo transceptor de radio junto con un puente de comunicaciones SPI-USB, al que se puede acceder de dos diferentes maneras, mediante librerías dll, o mediante NI-VISA con transferencias RAW-USB. La aplicación desarrollada posee una interfaz configurable por el usuario para la muestra de los futuros sensores o actuadores que se incorporen en el vehículo y es capaz de interpretar las tramas CAN, mostrarlas, gráfica, numéricamente y almacenar esta información, como si fuera el cuadro de instrumentos del vehículo. Existe una limitación de la velocidad global del sistema en forma de cuello de botella que se crea debido a las limitaciones del transceptor CC110L por lo que si no se desea filtrar los datos que se crean necesarios, sería necesario aumentar el número de canales de radio para altas ocupaciones del bus CAN. Debido a la pérdida de relaciones con el INSIA, no se pudo probar de manera real en el propio vehículo, pero se hicieron pruebas satisfactorias (hasta 1,6 km) con una configuración de tramas CAN estándar a una velocidad de transmisión de 1 Mbit/s y un tiempo de bit de 1 microsegundo. El periférico CAN del PIC32 se programará para cumplir con estas especificaciones de la ECU del vehículo, que se presupone que es la MS3 Sport de Bosch, de la que LabView interpretará las tramas CAN recibidas de manera inalámbrica. Para poder probar el sistema, ha sido necesario reutilizar el hardware y adaptar el software del primer prototipo creado, que emite tramas CAN preprogramadas con una latencia también programable y que simulará al bus CAN proporcionando los datos a transmitir por el sistema que incorpora el vehículo. Durante el desarrollo de este proyecto, en las etapas finales, el fabricante del puente de comunicaciones SPI-USB MCP2210 liberó una librería (dll) compatible y sin errores, por lo que se nos ofrecía una oportunidad interesante para la comparación de las velocidades de acceso al transceptor de radio, que se presuponía y se comprobó más eficiente que la solución ya hecha mediante NI-VISA. ABSTRACT. The Formula SAE competition is an international university applied to technological innovation in vehicles racing type formula, in which each team, made up of students, should design, construct and test a prototype each year within certain rules. The challenge of FSAE is that it is an educational project farther away than a master class. The goal of the present project is to make a tool for other students to use it in his projects related to FSAE to test and improve the vehicle, and, the improvements that can be provided by the electronics could be materialized in a victory and win the competition with this competitive advantage. A telemetry system was developed. It sends the data provided by the car’s CAN bus through a radio frequency transceiver and receive commands to execute on the system, it provides by a base station on the ground. Moreover, constant verification in real time of the status of the car or data parameters like the revolutions per minute, pressure from collectors, water temperature, and so on, can be accessed from the base station on the ground, so that, it could be possible to study the behaviour of the vehicle in early phases of the car development. A printed circuit board, composed of two boards, and two software programs in two different languages, have been developed, and built for the project implementation. The software utilized to design the PCB is Orcad10.5/Layout. The base station PCB on a PC receives data from the PCB connected to the vehicle’s CAN bus and sends commands like set CAN filters or masks, activate data logger or inject CAN frames. This PCB is connected to a PC via USB and contains a bridge USB-SPI to communicate with a similar transceiver on the vehicle PCB. LabView controls this part of the system. A special virtual Instrument (VI) had been created in order to add future new elements to the vehicle, is a dashboard, which reads the data passed from the main VI and represents them graphically to studying the behaviour of the car on track. In this special VI other alums can make modifications to accommodate the data provided from the vehicle CAN’s bus to new elements on the vehicle, show or save the CAN frames in the form or format they want. Two methods to access to SPI bus of CC110l RF transceiver over LabView have been developed with minimum changes between them. Access through NI-VISA (Virtual Instrument Software Architecture) which is a standard for configuring, programming, USB interfaces or other devices in National Instruments LabView. And access through DLL (dynamic link library) supplied by the manufacturer of the bridge USB-SPI, Microchip. Then the work is done in two forms, but the dll solution developed shows better behaviour, and increase the speed of the system because has less overload of the USB bus due to a better efficiency of the dll solution versus VISA solution. The PCB connected to the vehicle’s CAN bus receives commands from the base station PCB on a PC, and, acts in function of the command or execute actions like to inject packets into CAN bus or activate data logger. Also sends over RF the CAN frames present on the bus, which can be filtered, to avoid unnecessary radio emissions or overflowing the RF transceiver. This PCB consists of two basic pieces: A microcontroller with 32 bit architecture PIC32MX795F512L from Microchip and the radio transceiver integrated circuit CC110l from Texas Instruments. The PIC32MX795F512L has an integrated CAN and several peripherals like SPI controllers that are utilized to communicate with RF transceiver and SD Card. The USB controller on the PIC32 is utilized to store CAN data on a USB memory, and change notification peripheral is utilized like an external interrupt. Hardware for other peripherals is accessible. The software part of this PCB is coded in C with MPLAB from Microchip, and programming over PICkit 3 Programmer, also from Microchip. Some of his libraries have been modified to work properly with this project and other was created specifically for this project. In the phase for RF selection and design is made a study to clarify the general aspects of regulations for the this project in order to understand it and select the proper band, frequency, and radio transceiver for the activities developed in the project. From the different options available it selects a common use band ICM, with less regulation and free to emit with restrictions and disadvantages like high occupation. The transceiver utilized to transmit and receive the data CC110l is an integrated circuit which needs fewer components from Texas Instruments and it can be accessed through SPI bus. Basically is a state machine which changes his state whit commands received over an SPI bus or internal events. The transceiver has several programmable general purpose Inputs and outputs. These GPIOs are connected to PIC32 change notification input to generate an interrupt or connected to GPIO to MCP2210 USB-SPI bridge to inform to the base station for a packet received. A two pair of modules of CC110l radio module kit from different output power has been purchased which includes an antenna. This is to keep away from fabrication mistakes in RF hardware part or designs, although reference design and gerbers files are available on the webpage of the chip manufacturer. A neck bottle is present on the complete system, because the maximum data rate of CC110l transceiver is a half than CAN bus data rate, hence for high occupation of CAN bus is recommendable to filter the data or add more radio channels, because the buffers can’t sustain this load along the time. Unfortunately, during the development of the project, the relations with the INSIA, who develops the vehicle, was lost, for this reason, will be made impossible to test the final phases of the project like integration on the car, final test of integration, place of the antenna, enclosure of the electronics, connectors selection, etc. To test or evaluate the system, it was necessary to simulate the CAN bus with a hardware to feed the system with entry data. An early hardware prototype was adapted his software to send programed CAN frames at a fixed data rate and certain timing who simulate several levels of occupation of the CAN Bus. This CAN frames emulates the Bosch ECU MS3 Sport.

Soundscape quality analysis by fuzzy logic: A field study in Cordoba, Argentina

This research studies urban soundscapes through the comparative analysis of twelve public open spaces in the city of Córdoba (Argentina), taken as case studies. The work aims to examine selection of indicators and assessment tools intended to characterize soundscape quality. The field study was carried out through surveys and acoustic and psychoacoustic indicators, that are used together to objectively describe the sound quality of urban spaces. The study shows that, while there is a relationship of these indicators with the sound quality of the spaces, this is not linear. Their relative importance or influence depends on the interrelations occurring between the parameters studied. A model analyzing and correlating the parameters with the sound quality, based on the postulates of fuzzy logic, was applied as a tool of analysis, and it was seen to achieve a very close approximation to the subjective or perceptual response of the inhabitants. This close match between the model results and the perceptual response of the users confirms the fuzzy model as an effective tool for the study, not only of soundscapes, but also for those situations in which objective parameters must be related to the perceptual response of users.

Small molecule developmental screens reveal the logic and timing of vertebrate development

Much has been learned about vertebrate development by random mutagenesis followed by phenotypic screening and by targeted gene disruption followed by phenotypic analysis in model organisms. Because the timing of many developmental events is critical, it would be useful to have temporal control over modulation of gene function, a luxury frequently not possible with genetic mutants. Here, we demonstrate that small molecules capable of conditional gene product modulation can be identified through developmental screens in zebrafish. We have identified several small molecules that specifically modulate various aspects of vertebrate ontogeny, including development of the central nervous system, the cardiovascular system, the neural crest, and the ear. Several of the small molecules identified allowed us to dissect the logic of melanocyte and otolith development and to identify critical periods for these events. Small molecules identified in this way offer potential to dissect further these and other developmental processes and to identify novel genes involved in vertebrate development.

Logic gates using high Rydberg states

Connected logic gates can be operated on the levels of one molecule by making use of the special properties of high Rydberg states. Explicit experimental results for the NO molecule are provided as an example. A number of other options, including that of several gates concatenated so as to operate as a full adder, are discussed. Specific properties of high Rydberg states that are used are: their autoionization is delayed so that they can be distinguished from direct multiphoton ionization, during their long life such states also can decay by energy transfer to the molecular core in a way that can be controlled by the judicious application of very weak external electrical fields, and the Rydberg states can be detected by the application of an ionizing electrical field. The combination of two (or three) color photons with and without external weak fields allows the construction of quite elaborate logic circuit diagrams and shows that taking advantage of the different intramolecular dynamics of levels that differ by their excitation enables the compounding of logic operations on one molecular frame.

Structure-activity relationships derived by machine learning: the use of atoms and their bond connectivities to predict mutagenicity by inductive logic programming.

We present a general approach to forming structure-activity relationships (SARs). This approach is based on representing chemical structure by atoms and their bond connectivities in combination with the inductive logic programming (ILP) algorithm PROGOL. Existing SAR methods describe chemical structure by using attributes which are general properties of an object. It is not possible to map chemical structure directly to attribute-based descriptions, as such descriptions have no internal organization. A more natural and general way to describe chemical structure is to use a relational description, where the internal construction of the description maps that of the object described. Our atom and bond connectivities representation is a relational description. ILP algorithms can form SARs with relational descriptions. We have tested the relational approach by investigating the SARs of 230 aromatic and heteroaromatic nitro compounds. These compounds had been split previously into two subsets, 188 compounds that were amenable to regression and 42 that were not. For the 188 compounds, a SAR was found that was as accurate as the best statistical or neural network-generated SARs. The PROGOL SAR has the advantages that it did not need the use of any indicator variables handcrafted by an expert, and the generated rules were easily comprehensible. For the 42 compounds, PROGOL formed a SAR that was significantly (P < 0.025) more accurate than linear regression, quadratic regression, and back-propagation. This SAR is based on an automatically generated structural alert for mutagenicity.

Clarity, Light, and Logic : Parallels between Olafur Eliasson’s The weather project and the Gothic Cathedral

This Master’s Research Paper investigates Olafur Eliasson’s The weather project as a case study for the dialogue between Gothic artistic principles and prominent elements of contemporary art. A product of a post-modern mindset, weakened historicity allows us to examine these connections anew; past, present, and future blur and artists (and viewers) have the whole of time from which to gain inspiration and meaning in works of art. I demonstrate similarities through theories on phenomenology; the spatiotemporal relationship between viewer and artwork; the convergence of art and science; and the communal, quasi-liminal experience of pilgrimage. I embrace Eliasson’s belief in the self-reflexive potential of art and the importance of the viewer’s own values, memories, and methods of seeing. This new interpretive layer will hopefully offer a richer experience for future participants of both Gothic cathedrals and environments produced by Studio Olafur Eliasson.

An approach based on Logic Forms and WordNet relationships to Textual Entailment performance

This paper outlines the approach adopted by the PLSI research group at University of Alicante in the PASCAL-2006 second Recognising Textual Entailment challenge. Our system is composed of several components. On the one hand, the first component performs the derivation of the logic forms of the text/hypothesis pairs and, on the other hand, the second component provides us with a similarity score given by the semantic relations between the derived logic forms. In order to obtain this score we apply several measures of similitude and relatedness based on the structure and content of WordNet.

Applying logic forms and statistical methods to CL-SR performance

This paper describes a CL-SR system that employs two different techniques: the first one is based on NLP rules that consist on applying logic forms to the topic processing while the second one basically consists on applying the IR-n statistical search engine to the spoken document collection. The application of logic forms to the topics allows to increase the weight of topic terms according to a set of syntactic rules. Thus, the weights of the topic terms are used by IR-n system in the information retrieval process.