A Fully Bayesian Approach for Combining Multilevel Failure Information in Fault Tree Quantification and Corresponding Optimal Resource Allocation

This paper presents a fully Bayesian approach that simultaneously combines basic event and statistically independent higher event-level failure data in fault tree quantification. Such higher-level data could correspond to train, sub-system or system failure events. The full Bayesian approach also allows the highest-level data that are usually available for existing facilities to be automatically propagated to lower levels. A simple example illustrates the proposed approach. The optimal allocation of resources for collecting additional data from a choice of different level events is also presented. The optimization is achieved using a genetic algorithm.

Evaluating stress patterns for Plio-Quaternary brittle deformation along the Calama-Olacapato-El Toro fault zone, Central Andes

Understanding the geometry and kinematics of the major structures of an orogen is important to elucidate its style of deformation, as well as its tectonic evolution. We describe the temporal and spatial changes in the state of stress of the trans-orogen area of the Calama-Olacapato-El Toro (COT) Fault Zone in the Central Andes, at about 24°S within the northern portion of the Puna Plateau between the Argentina-Chile border. The importance of the COT derives principally from the Quaternary-Holocene activity recognized on some segments, which may shed new light on its possible control on Quaternary volcanism and on the seismic hazard evaluation of the area. Field geological surveys along with kinematic analysis and numerical inversion of ∼140 new fault-slip measurements have revealed that this portion of the COT zone, previously considered a continuous, long-lived lineament, in reality has been subjected to three different kinematic regimes: 1) a Miocene transpressional phase with the maximum principal stress (σ1) chiefly trending NNE-SSW; 2) an extensional phase that started by 9 Ma, with a horizontal NW-SE-striking minimum principal stress (σ3) – permutations between σ2 and σ3 axes have been recognized at two sites – and 3) a left-lateral strike-slip phase with a horizontal ∼E-W &sigma1 and ∼N-S σ3 dating to the Late Pliocene-Quaternary. Spatially, in the Quaternary, the left-lateral component decreases toward the westernmost tip of the COT, where it transitions to extension; this produced to a N-S horst and graben structure. Hence, even if transcurrence is still active in the eastern portion of the COT, as focal mechanisms of crustal earthquakes indicate, our study demonstrates that extension is becoming the predominant structural style of deformation, at least in the western region. These major temporal and spatial changes in the tectonic regimes are attributed in part to changes in the magnitude of the boundary forces due to subduction processes. The overall orogen-perpendicular extension might be the result of vertical stress larger than both the horizontal stresses induced by gravitational effect of a thickened crust.

DESIGN AND IMPLEMENT DYNAMIC PROGRAMMING BASED DISCRETE POWER LEVEL SMART HOME SCHEDULING USING FPGA

With the development and capabilities of the Smart Home system, people today are entering an era in which household appliances are no longer just controlled by people, but also operated by a Smart System. This results in a more efficient, convenient, comfortable, and environmentally friendly living environment. A critical part of the Smart Home system is Home Automation, which means that there is a Micro-Controller Unit (MCU) to control all the household appliances and schedule their operating times. This reduces electricity bills by shifting amounts of power consumption from the on-peak hour consumption to the off-peak hour consumption, in terms of different “hour price”. In this paper, we propose an algorithm for scheduling multi-user power consumption and implement it on an FPGA board, using it as the MCU. This algorithm for discrete power level tasks scheduling is based on dynamic programming, which could find a scheduling solution close to the optimal one. We chose FPGA as our system’s controller because FPGA has low complexity, parallel processing capability, a large amount of I/O interface for further development and is programmable on both software and hardware. In conclusion, it costs little time running on FPGA board and the solution obtained is good enough for the consumers.