Adaptive generalized predictive control algorithm implemented over a DSP network

In this paper a parallel implementation of an Adaprtive Generalized Predictive Control (AGPC) algorithm is presented. Since the AGPC algorithm needs to be fed with knowledge of the plant transfer function, the parallelization of a standard Recursive Least Squares (RLS) estimator and a GPC predictor is discussed here.

Parallel implementation of an adaptive generalized predictive control algorithm

The Adaptive Generalized Predictive Control (AGPC) algorithm can be speeded up using parallel processing. Since the AGPC algorithm needs to be fed with the knowledge of the plant transfer function, the parallelization of a standard Recursive Least Squares (RLS) estimator and a GPC predictor is discussed here.

Real-time parameter estimation of dynamic temperature and humidity models for greenhouse adaptive climate control

A real-time parameter estimator for the climate discrete-time dynamic models of a greenhouse located at the North of Portugal are presented. The experiments showed that the second order models identified for the air temperature and humidity achieve a close agreement between simulated and experimantal data.

Parallel implementation of an adaptive generalized predictive control algorithm

The Adaptive Generalized Predictive Control (GPC) algorithm can be speeded up using parallel processing. Since the GPC algorithm needs to be fed with knowledge of the plant transfer function, the parallelization of a standard Recursive Least Squares (RLS) estimator and a GPC predictor is discussed here.

Adaptive Probabilistic Topic Models for Social Networks

Thesis (Master's)--University of Washington, 2012

Adaptive self-calibrating image rejection receiver

An adaptive self-calibrating image rejection receiver is described, containing a modified Weaver image rejection mixer and a Digital Image Rejection Processor (DIRP). The blind source-separation-based DIRP eliminates the I/Q errors improving the Image Rejection Ratio (IRR) without the need for trimming or use of power-hungry discrete components. Hardware complexity is minimal, requiring only two complex coefficients; hence it can be easily integrated into the signal processing path of any receiver. Simulation results show that the proposed approach achieves 75-97 dB of IRR.

On various low-hardware-complexity LMS algorithms for adaptive I/Q correction in quadrature receivers

In this paper, the performance and convergence time comparisons of various low-complexity LMS algorithms used for the coefficient update of adaptive I/Q corrector for quadrature receivers are presented. We choose the optimum LMS algorithm suitable for low complexity, high performance and high order QAM and PSK constellations. What is more, influence of the finite bit precision on VLSI implementation of such algorithms is explored through extensive simulations and optimum wordlengths established.

Performance of an adaptive homodyne receiver in the presence of multipath, Rayleigh-fading and time-varying quadrature errors

In this paper, we carry out a detailed performance analysis of the blind source separation based I/Q corrector operating at the baseband. Performance of the digital I/Q corrector is evaluated not only under time-varying phase and gain errors but also in the presence of multipath and Rayleigh fading channels. Performance under low-SNR and different modulation formats and constellation sizes is also evaluated. What is more, BER improvement after correction is illustrated. The results indicate that the adaptive algorithm offers adequate performance for most communication applications hence, reducing the matching requirements of the analog front-end enabling higher levels of integration.

On the structure, convergence and performance of an adaptive I/Q mismatch corrector

The I/Q mismatches in quadrature radio receivers results in finite and usually insufficient image rejection, degrading the performance greatly. In this paper we present a detailed analysis of the Blind-Source Separation (BSS) based mismatch corrector in terms of its structure, convergence and performance. The results indicate that the mismatch can be effectively compensated during the normal operation as well as in the rapidly changing environments. Since the compensation is carried out before any modulation specific processing, the proposed method works with all standard modulation formats and is amenable to low-power implementations.

Adaptive digital receivers for analog front-end mismatch correction

Phase and gain mismatches between the I and Q analog signal processing paths of a quadrature receiver are responsible for the generation of image signals which limit the dynamic range of a practical receiver. In this paper we analyse the effects these mismatches and propose a low-complexity blind adaptive algorithm to minimize this problem. The proposed solution is based on two, 2-tap adaptive filters, arranged in Adaptive Noise Canceller (ANC) set-up. The algorithm lends itself to efficient real-time implementation with minimal increase in modulator complexity.

Adaptive compensation of analog front-end I/Q mismatches in digital receivers

I and Q Channel phase and gain misniatches are of great concern in communications receiver design. In this paper we analyse the effects of I and Q channel mismatches and propose a low-complexity blind adaptive algorithm to minimize this problem. The proposed solution consists of two, 2-tap adaptive filters, arranged in Adaptive Noise Canceller (ANC) set-up, with the output of one cross-fed to the input of the other. The system works as a de-correlator eliminating I and Q mismatch errors.

A low-complexity self-calibrating adaptive quadrature receiver

In this paper digital part of a self-calibrating quadrature-receiver is described, containing a digital calibration-engine. The blind source-separation-based calibration-engine eliminates the RF-impairments in real-time hence improving the receiver's performance without the need for test/pilot tones, trimming or use of power-hungry discrete components. Furthermore, an efficient time-multiplexed calibration-engine architecture is proposed and implemented on an FPGA utilising a reduced-range multiplier structure. The use of reduced-range multipliers results in substantial reduction of area as well as power consumption without a compromise in performance when compared with an efficiently designed general purpose multiplier. The performance of the calibration-engine does not depend on the modulation format or the constellation size of the received signal; hence it can be easily integrated into the digital signal processing paths of any receiver.

Design and low-power implementation of an adaptive image rejection receiver

This paper deals with and details the design and implementation of a low-power; hardware-efficient adaptive self-calibrating image rejection receiver based on blind-source-separation that alleviates the RF analog front-end impairments. Hybrid strength-reduced and re-scheduled data-flow, low-power implementation of the adaptive self-calibration algorithm is developed and its efficiency is demonstrated through simulation case studies. A behavioral and structural model is developed in Matlab as well as a low-level architectural design in VHDL providing valuable test benches for the performance measures undertaken on the detailed algorithms and structures.