994 resultados para silicon etching


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Contact resistance has a significant impact on the electrical characteristics of thin film transistors. It limits their maximum on-current and affects their subsequent behavior with bias. This distorts the extracted device parameters, in particular, the field-effect mobility. This letter presents a method capable of accounting for both the non-ohmic (nonlinear) and ohmic (linear) contact resistance effects solely based upon terminal I-V measurements. Applying our analysis to a nanocrystalline silicon thin film transistor, we demonstrate that contact resistance effects can lead to a twofold underestimation of the field-effect mobility. © 2008 American Institute of Physics.

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Vertically oriented GaAs nanowires (NWs) are grown on Si(111) substrates using metal-organic chemical vapor deposition. Controlled epitaxial growth along the 111 direction is demonstrated following the deposition of thin GaAs buffer layers and the elimination of structural defects, such as twin defects and stacking faults, is found for high growth rates. By systematically manipulating the AsH 3 (group-V) and TMGa (group-III) precursor flow rates, it is found that the TMGa flow rate has the most significant effect on the nanowire quality. After capping the minimal tapering and twin-free GaAs NWs with an AlGaAs shell, long exciton lifetimes (over 700ps) are obtained for high TMGa flow rate samples. It is observed that the Ga adatom concentration significantly affects the growth of GaAs NWs, with a high concentration and rapid growth leading to desirable characteristics for optoelectronic nanowire device applications including improved morphology, crystal structure and optical performance. © 2012 IOP Publishing Ltd.

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We investigate the growth procedures for achieving taper-free and kinked germanium nanowires epitaxially grown on silicon substrates by chemical vapor deposition. Singly and multiply kinked germanium nanowires consisting of 111 segments were formed by employing a reactant gas purging process. Unlike non-epitaxial kinked nanowires, a two-temperature process is necessary to maintain the taper-free nature of segments in our kinked germanium nanowires on silicon. As an application, nanobridges formed between (111) side walls of V-grooved (100) silicon substrates have been demonstrated. © 2012 IOP Publishing Ltd.