963 resultados para random search algorithms


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Machine learning, inductive logic programming, search

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Background:Long-term outcomes of drug-eluting stents (DES) versus bare-metal stents (BMS) in patients with ST-segment elevation myocardial infarction (STEMI) remain uncertain.Objective:To investigate long-term outcomes of drug-eluting stents (DES) versus bare-metal stents (BMS) in patients with ST-segment elevation myocardial infarction (STEMI).Methods:We performed search of MEDLINE, EMBASE, the Cochrane library, and ISI Web of Science (until February 2013) for randomized trials comparing more than 12-month efficacy or safety of DES with BMS in patients with STEMI. Pooled estimate was presented with risk ratio (RR) and its 95% confidence interval (CI) using random-effects model.Results:Ten trials with 7,592 participants with STEMI were included. The overall results showed that there was no significant difference in the incidence of all-cause death and definite/probable stent thrombosis between DES and BMS at long-term follow-up. Patients receiving DES implantation appeared to have a lower 1-year incidence of recurrent myocardial infarction than those receiving BMS (RR = 0.75, 95% CI 0.56 to 1.00, p= 0.05). Moreover, the risk of target vessel revascularization (TVR) after receiving DES was consistently lowered during long-term observation (all p< 0.01). In subgroup analysis, the use of everolimus-eluting stents (EES) was associated with reduced risk of stent thrombosis in STEMI patients (RR = 0.37, p=0.02).Conclusions:DES did not increase the risk of stent thrombosis in patients with STEMI compared with BMS. Moreover, the use of DES did lower long-term risk of repeat revascularization and might decrease the occurrence of reinfarction.

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Magdeburg, Univ., Fak. für Mathematik, Habil.-Schr., 2006

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Gastrointestinal cancers, HCC, ectopeptidases, differential display, gasdermin-like

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Magdeburg, Univ., Fak. für Informatik, Diss., 2012

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This work describes a test tool that allows to make performance tests of different end-to-end available bandwidth estimation algorithms along with their different implementations. The goal of such tests is to find the best-performing algorithm and its implementation and use it in congestion control mechanism for high-performance reliable transport protocols. The main idea of this paper is to describe the options which provide available bandwidth estimation mechanism for highspeed data transport protocols and to develop basic functionality of such test tool with which it will be possible to manage entities of test application on all involved testing hosts, aided by some middleware.

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In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniques for maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables, and an approach for performing parallel addition of N input symbols.

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In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniquesfor maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables,and an approach for performing parallel addition of N input symbols.

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Magdeburg, Univ., Fak. für Mathematik, Diss., 2014

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Some practical aspects of Genetic algorithms’ implementation regarding to life cycle management of electrotechnical equipment are considered.

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Magdeburg, Univ., Fak. für Informatik, Diss., 2015

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Magdeburg, Univ., Fak. für Mathematik, Diss., 2015