905 resultados para lab on a chip


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Self-alignment of soldered electronic components such as flip-chips (FC), ball grid arrays (BGA) and optoelectronic devices during solder reflow is important as it ensures good alignment between components and substrates. Two uncoupled analytical models are presented which provide estimates of the dynamic time scales of both the chip and the solder in the self-alignment process. These predicted time scales can be used to decide whether a coupled dynamic analysis is required for the analysis of the chip motion. In this paper, we will show that for flip-chips, the alignment dynamics can be described accurately only when the chip motion is coupled with the solder motion because the two have similar time-scale values. To study this coupled phenomenon, a dynamic modeling method has been developed. The modeling results show that the uncoupled and coupled calculations result in significantly different predictions. The calculations based on the coupled model predict much faster rates of alignment than those predicted using the uncoupled approach.

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Anisotropic conductive film (ACF) which consists of an adhesive epoxy matrix and randomly distributed conductive particles are widely used as the connection material for electronic devices with high I/O counts. However, for the semiconductor industry the reliability of the ACF is still a major concern due to a lack of experimental reliability data. This paper reports an investigation into the moisture effects on the reliability of ACF interconnections in the flip-chip-on-flex (FCOF) applications. A macro-micro 3D finite element modeling technique was used in order to make the multi-length-scale modeling of the ACF flip chip possible. The purposes of this modeling work was to understand the role that moisture plays in the failure of ACF flip chips, and to look into the influence of physical properties and geometric characteristics, such as the coefficient of the moisture expansion (CME), Young's modulus of the adhesive matrix and the bump height on the reliability of the ACF interconnections in a humid environment. Simulation results suggest that moisture-induced swelling of the adhesive matrix is the major cause of the ACF joint opening. Modeling results are consistent with the findings in the experimental work.

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This paper presents the assembly process using next generation electroformed stencils and Isotropic Conductive Adhesives (ICAs) as interconnection material. The utilisation of ICAs in flip-chip assembly process is investigated as an alternative to the lead and lead-free solder alloys and aims to ensure a low temperature (T < 100 °C) assembly process. The paper emphasizes and discusses in details the assembly of a flip-chip package based on copper columns bumped die and substrate with stencil printed ICA deposits at sub-100 μm pitch. A computational modelling approach is undertaken to provide comprehensive results on reliability trends of ICA joints subject to thermal cycling of the flip-chip assembly based on easy to use damage criteria and damage evaluation. Important design parameters in the package are selected and investigated using numerical modelling techniques to provide knowledge and understanding of their impact on the thermo-mechanical behaviour of the flip-chip ICA joints. Sensitivity analysis of the damage in the adhesive material is also carried out. Optimal design rules for enhanced performance and improved thermo-mechanical reliability of ICA assembled flip-chip packages are finally formulated.

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This paper presents the results of a packaging process based on the stencil printing of isotropic conductive adhesives (ICAs) that form the interconnections of flip-chip bonded electronic packages. Ultra-fine pitch (sub-100-mum), low temperature (100degC), and low cost flip-chip assembly is demonstrated. The article details recent advances in electroformed stencil manufacturing that use microengineering techniques to enable stencil fabrication at apertures sizes down to 20mum and pitches as small as 30mum. The current state of the art for stencil printing of ICAs and solder paste is limited between 150-mum and 200-mum pitch. The ICAs-based interconnects considered in this article have been stencil printed successfully down to 50-mum pitch with consistent printing demonstrated at 90-mum pitch size. The structural integrity or the stencil after framing and printing is also investigated through experimentation and computational modeling. The assembly of a flip-chip package based on copper column bumped die and ICA deposits stencil printed at sub-100-mum pitch is described. Computational fluid dynamics modeling of the print performance provides an indicator on the optimum print parameters. Finally, an organic light emitting diode display chip is packaged using this assembly process

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Dual-section variable frequency microwave systems enable rapid, controllable heating of materials within an individual surface mount component in a chip-on=board assembly. The ability to process devices individually allows components with disparate processing requirements to be mounted on the same assembly. The temperature profile induced by the microwave system can be specifically tailored to the needs of the component, allowing optimisation and degree of cure whilst minimising thermomechanical stresses. This paper presents a review of dual-section microwave technology and its application to curing of thermosetting polymer materials in microelectronics applications. Curing processes using both conventional and microwave technologies are assessed and compared. Results indicate that dual-section microwave systems are able to cure individual surface mount packages in a significantly shorter time, at the expense of an increase in thermomechanical stresses and a greater variation in degree of cure.

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The printing of pastes (solder pastes and isotropic conductive adhesives) through very small stencil apertures required for flip-chip pitch sizes is expected to result in increased stencil clogging and incomplete transfer of paste to the printed circuit board pads. There is wide agreement in industry that the paste printing process accounts for the majority of assembly defects, and most defects originate from poor understanding of the effect of printing process parameters on printing performance.

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The paper reports on the investigation of the rheological behaviour new lead-free solder pastes formulations for use in flip-chip assembly applications. The study is made up of three parts; namely the evaluation of the effect of plate geometry, the effect of temperature and processing environment and the effect of torsional frequencies on the rheological measurements. Different plate geometries and rheological tests were used to evaluate new formulations in terms of wall slip characteristics, linear viscoelastic region and shear thinning behaviour. A technique which combines the use of the creep-recovery and dynamic frequency sweep tests was used to further characterise the paste structure, rheological behaviour and the processing performance of the new paste formulations. The technique demonstrated in this study has wide utility for R & D personnel involved in new paste formulation, for implementing quality control procedures used in paste manufacture and packaging and for qualifying new flip-chip assembly lines

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The market for solder paste materials in the electronic manufacturing and assembly sector is very large and consists of material and equipment suppliers and end users. These materials are used to bond electronic components (such as flip-chip, CSP and BGA) to printed circuit boards (PCB's) across a range of dimensions where the solder interconnects can be in the order of 0.05mm to 5mm in size. The non-Newtonian flow properties exhibited by solder pastes during its manufacture and printing/deposition phases have been of practical concern to surface mount engineers and researchers for many years. The printing of paste materials through very small-sized stencil apertures is known to lead to increased stencil clogging and incomplete transfer of paste to the substrate pads. At these very narrow aperture sizes the paste rheology and particle-wall interactions become crucial for consistent paste withdrawal. These non-Newtonian effects must be understood so that the new paste formulations can be optimised for consistent printing. The focus of the study reported in this paper is the characterisation of the rheological properties of solder pastes and flux mediums, and the evaluation of the effect of these properties on the pastes' printing performance at the flip-chip assembly application level. Solder pastes are known to exhibit a thixotropic behaviour, which is recognised by the decrease in apparent viscosity of paste material with time when subjected to a constant shear rate. The proper characterisation of this time-dependent theological behaviour of solder pastes is crucial for establishing the relationships between the pastes' structure and flow behaviour; and for correlating the physical parameters with paste printing performance. In this paper, we present a number of methods which have been developed for characterising the time-dependent and non-Newtonian rheological behaviour of solder pastes and flux mediums as a function of shear rates. We also present results of the study of the rheology of the solder pastes and flux mediums using the structural kinetic modelling approach, which postulates that the network structure of solder pastes breaks down irreversibly under shear, leading to time and shear dependent changes in the flow properties. Our results show that for the solder pastes used in the study, the rate and extent of thixotropy was generally found to increase with increasing shear rate. The technique demonstrated in this study has wide utility for R&D personnel involved in new paste formulation, for implementing quality control procedures used in solder paste manufacture and packaging; and for qualifying new flip-chip assembly lines

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A practical analytical workshop at NIOZ (Royal Netherlands Institute for Sea Research), The Netherlands, was held on 12-15 November 2012. The aim of the workshop was to gain information from the global nutrient analytical community about general problems which arise when measuring nutrients, and then to attempt to investigate these problems in the laboratory, with a small select representative group of International nutrient analysts conducting the lab work. 18 experts were participated and worked simultaneously on four different PO4 gas segmented CFA systems. This report documents the finding of the workshop and describes recommendations based on group consensus which can hopefully assist the larger community of labs worldwide participating in the Inter-Laboratory Comparison RMNS 2012 studies organized by MRI in Japan.

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We present descriptions of a new order (Ranunculo cortusifolii-Geranietalia reuteri and of a new alliance (Stachyo lusitanicae-Cheirolophion sempervirentis) for the herbaceous fringe communities of Macaronesia and of the southwestern Iberian Peninsula, respectively. A new alliance, the Polygalo mediterraneae-Bromion erecti (mesophilous post-cultural grasslands), was introduced for the Peninsular Italy. We further validate and typify the Armerietalia rumelicae (perennial grasslands supported by nutrient-poor on siliceous bedrocks at altitudes characterized by the submediterranean climate of central-southern Balkan Peninsula), the Securigero-Dasypyrion villosae (lawn and fallow-land tall-grass annual vegetation of Italy), and the Cirsio vallis-demoni-Nardion (acidophilous grasslands on siliceous substrates of the Southern Italy). Nomenclatural issues (validity, legitimacy, synonymy, formal corrections) have been discussed and clarified for the following names: Brachypodio-Brometalia, Bromo pannonici-Festucion csikhegyensis, Corynephoro-Plantaginion radicatae, Heleochloion, Hieracio-Plantaginion radicatae, Nardetea strictae, Nardetalia strictae, Nardo-Callunetea, Nardo-Galion saxatilis, Oligo-Bromion, Paspalo-Heleochloetalia, Plantagini-Corynephorion and Scorzoneret alia villosae. 

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The ingress of chlorides into concrete is predominantly by the mechanism of diffusion and the resistance of concrete to the transport of chlorides is generally represented by its coefficient of diffusion. The determination of this coefficient normally requires long test duration (many months). Therefore, rapid test methods based on the electrical migration of ions have widely been used. The current procedure of chloride ion migration tests involves placing a concrete disc between an ion source solution and a neutral solution and accelerating the transport of ions from the source solution to the neutral solution by the application of a potential difference across the concrete disc. This means that, in order to determine the chloride transport resistance of concrete cover, cores should be extracted from the structure and tested in laboratories. In an attempt to facilitate testing of the concrete cover on site, an in situ ion migration test (hereafter referred to as PERMIT ion migration test for the unique identification of the new test) was developed. The PERMIT ion migration test was validated in the lab by carrying out a comparative investigation and correlating the results with the migration coefficient from the one-dimensional chloride migration test, the effective diffusion coefficient from the normal diffusion test and the apparent diffusion coefficient determined from chloride profiles. A range of concrete mixes made with ordinary Portland cement was used for this purpose. In addition, the effects of preferential flow of ions close to the concrete surface and the proximity of reinforcement within the test area on the in situ migration coefficients were investigated. It was observed that the in situ migration index, found in one working day, correlated well with the chloride diffusion coefficients from other tests. The quality of the surface layer of the cover concrete and the location of the reinforcement within the test area were found to affect the flow of ions through the concrete during the test. Based on the data, a procedure to carry out the PERMIT ion migration test was standardised.

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This paper presents the design of a novel single chip adaptive beamformer capable of performing 50 Gflops, (Giga-floating-point operations/second). The core processor is a QR array implemented on a fully efficient linear systolic architecture, derived using a mapping that allows individual processors for boundary and internal cell operations. In addition, the paper highlights a number of rapid design techniques that have been used to realise this system. These include an architecture synthesis tool for quickly developing the circuit architecture and the utilisation of a library of parameterisable silicon intellectual property (IP) cores, to rapidly develop detailed silicon designs.