824 resultados para parallel scheduling


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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

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ABSTRACT: The thermal entry region in laminar forced convection of Herschel-Bulkley fluids is solved analytically through the integral transform technique, for both circular and parallel-plates ducts, which are maintained at a prescribed wall temperature or at a prescribed wall heat flux. The local Nusselt numbers are obtained with high accuracy in both developing and fully-developed thermal regions, and critical comparisons with previously reported numerical results are performed.

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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

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The increasing amount of sequences stored in genomic databases has become unfeasible to the sequential analysis. Then, the parallel computing brought its power to the Bioinformatics through parallel algorithms to align and analyze the sequences, providing improvements mainly in the running time of these algorithms. In many situations, the parallel strategy contributes to reducing the computational complexity of the big problems. This work shows some results obtained by an implementation of a parallel score estimating technique for the score matrix calculation stage, which is the first stage of a progressive multiple sequence alignment. The performance and quality of the parallel score estimating are compared with the results of a dynamic programming approach also implemented in parallel. This comparison shows a significant reduction of running time. Moreover, the quality of the final alignment, using the new strategy, is analyzed and compared with the quality of the approach with dynamic programming.

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This paper presents the design of a high-speed coprocessor for Elliptic Curve Cryptography over binary Galois Field (ECC- GF(2m)). The purpose of our coprocessor is to accelerate the scalar multiplication performed over elliptic curve points represented by affine coordinates in polynomial basis. Our method consists of using elliptic curve parameters over GF(2163) in accordance with international security requirements to implement a bit-parallel coprocessor on field-programmable gate-array (FPGA). Our coprocessor performs modular inversion by using a process based on the Stein's algorithm. Results are presented and compared to results of other related works. We conclude that our coprocessor is suitable for comparing with any other ECC-hardware proposal, since its speed is comparable to projective coordinate designs.

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Sao Paulo State Research Foundation-FAPESP

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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

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The resistive-type superconducting fault current limiters (RSFCL) prototypes using YBCO-coated conductors have shown current limitation for medium voltage class applications for acting time up to 80 ms. By connecting an air-core reactor in parallel with the RSFCL, thus making an hybrid current limiter, one can extend the acting time for up to 1 s. In this work, we report the performance of a hybrid current limiter subjected to an AC peak fault current of 2 kA during 1 s for which within the first 80 ms the SFCL limits the current concurrently with the air-core reactor, and for the remaining 920 ms, only the air-core reactor limits the current. In order to evaluate the actual conditions for subsequent reconnection of RSFCL to the power grid, the hybrid fault current limiter was tested varying the time interval for recovery from 900 ms and 1.2 s, followed again by the concurrent operation of the hybrid limiter during 1 s (SFCL during 80 ms). From this evaluation test, the recovery time can be measured and compared using the voltage peak generated in superconducting module from the first and second fault test. The recovery time was also determined through the pulsed current method (PCM) on short-length sample test. The results showed that the fault current was limited from 1.9 kA down to 514 A after 1 cycle of 60 Hz frequency, with recovery time lower than 1.2 s for two subsequent fault current tests.

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Pós-graduação em Engenharia Elétrica - FEIS

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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

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Data-intensive Grid applications require huge data transfers between grid computing nodes. These computing nodes, where computing jobs are executed, are usually geographically separated. A grid network that employs optical wavelength division multiplexing (WDM) technology and optical switches to interconnect computing resources with dynamically provisioned multi-gigabit rate bandwidth lightpath is called a Lambda Grid network. A computing task may be executed on any one of several computing nodes which possesses the necessary resources. In order to reflect the reality in job scheduling, allocation of network resources for data transfer should be taken into consideration. However, few scheduling methods consider the communication contention on Lambda Grids. In this paper, we investigate the joint scheduling problem while considering both optical network and computing resources in a Lambda Grid network. The objective of our work is to maximize the total number of jobs that can be scheduled in a Lambda Grid network. An adaptive routing algorithm is proposed and implemented for accomplishing the communication tasks for every job submitted in the network. Four heuristics (FIFO, ESTF, LJF, RS) are implemented for job scheduling of the computational tasks. Simulation results prove the feasibility and efficiency of the proposed solution.