BSRN Toolbox V2.0 - a tool to create quality checked output files from BSRN datasets and station-to-archive files

The BSRN Toolbox is a software package supplied by the WRMC and is freely available to all station scientists and data users. The main features of the package include a download manager for Station- to-Archive files, a tool to convert files into human readable TAB-separated ASCII-tables (similar to those output by the PANGAEA database), and a tool to check data sets for violations of the "BSRN Global Network recommended QC tests, V2.0" quality criteria. The latter tool creates quality codes, one per measured value, indicating if the data are "physically possible," "extremely rare," or if "intercomparison limits are exceeded." In addition, auxiliary data such as solar zenith angle or global calculated from diffuse and direct can be output. All output from the QC tool can be visualized using PanPlot (doi:10.1594/PANGAEA.816201).

Practical Characterization of Input-Parallel-Connected Converters with a Common Input Filter

The paper presents a method to analyze robust stability and transient performance of a distributed power system consisting of commercial converter modules interconnected through a common input filter. The method is based on the use of four transfer functions, which are measurable from the converter input and output terminals. It is shown that these parameters provide important information on the power module sensitivity to the interactions caused by the external impedances. Practical characterization for the described system structure is performed introducing special transfer functions utilized for the interactions assessment. Experimental results are provided to support the presented analysis procedure.

Analysis and validation of a multiple output series resonant converter

In this paper a novel bidirectional multiple port dc/dc transformer topology is presented. The novel concept for dc/dc transformer is based on the Series Resonant Converter (SRC) topology operated at its resonant frequency point. This allows for higher switching frequency to be adopted and enables high efficiency/high power density operation. The feasibility of the proposed concept is verified on a 300W, 700 kHz three port prototype with 390V input voltage and 48V and 12V output voltages. A peak overall efficiency of 93% is measured at full load. A very good load and cross regulation characteristic of the converter is observed in the whole load range, from full load to open circuit. The sensitivity analysis of the resonant capacitance is also performed showing very slight deterioration in the converter performances when a resonant capacitor is changed ±30% of its nominal value.

Optimization of multidimensional cross-section tables for few-group core calculations

Multigroup diffusion codes for three dimensional LWR core analysis use as input data pre-generated homogenized few group cross sections and discontinuity factors for certain combinations of state variables, such as temperatures or densities. The simplest way of compiling those data are tabulated libraries, where a grid covering the domain of state variables is defined and the homogenized cross sections are computed at the grid points. Then, during the core calculation, an interpolation algorithm is used to compute the cross sections from the table values. Since interpolation errors depend on the distance between the grid points, a determined refinement of the mesh is required to reach a target accuracy, which could lead to large data storage volume and a large number of lattice transport calculations. In this paper, a simple and effective procedure to optimize the distribution of grid points for tabulated libraries is presented. Optimality is considered in the sense of building a non-uniform point distribution with the minimum number of grid points for each state variable satisfying a given target accuracy in k-effective. The procedure consists of determining the sensitivity coefficients of k-effective to cross sections using perturbation theory; and estimating the interpolation errors committed with different mesh steps for each state variable. These results allow evaluating the influence of interpolation errors of each cross section on k-effective for any combination of state variables, and estimating the optimal distance between grid points.

Output Impedance Correction Circuit (OICC): A New Concept to Improve the Dynamic Response of DC/DC Converters with Additional Energy Path

El desarrollo da las nuevas tecnologías permite a los ingenieros llevar al límite el funcionamiento de los circuitos integrados (Integrated Circuits, IC). Las nuevas generaciones de procesadores, DSPs o FPGAs son capaces de procesar la información a una alta velocidad, con un alto consumo de energía, o esperar en modo de baja potencia con el mínimo consumo posible. Esta gran variación en el consumo de potencia y el corto tiempo necesario para cambiar de un nivel al otro, afecta a las especificaciones del Módulo de Regulador de Tensión (Voltage Regulated Module, VRM) que alimenta al IC. Además, las características adicionales obligatorias, tales como adaptación del nivel de tensión (Adaptive Voltage Positioning, AVP) y escalado dinámico de la tensión (Dynamic Voltage Scaling, DVS), imponen requisitos opuestas en el diseño de la etapa de potencia del VRM. Para poder soportar las altas variaciones de los escalones de carga, el condensador de filtro de salida del VRM se ha de sobredimensionar, penalizando la densidad de energía y el rendimiento durante la operación de DVS. Por tanto, las actuales tendencias de investigación se centran en mejorar la respuesta dinámica del VRM, mientras se reduce el tamaño del condensador de salida. La reducción del condensador de salida lleva a menor coste y una prolongación de la vida del sistema ya que se podría evitar el uso de condensadores voluminosos, normalmente implementados con condensadores OSCON. Una ventaja adicional es que reduciendo el condensador de salida, el DVS se puede realizar más rápido y con menor estrés de la etapa de potencia, ya que la cantidad de carga necesaria para cambiar la tensión de salida es menor. El comportamiento dinámico del sistema con un control lineal (Control Modo Tensión, VMC, o Control Corriente de Pico, Peak Current Mode Control, PCMC,…) está limitado por la frecuencia de conmutación del convertidor y por el tamaño del filtro de salida. La reducción del condensador de salida se puede lograr incrementando la frecuencia de conmutación, así como incrementando el ancho de banda del sistema, y/o aplicando controles avanzados no-lineales. Usando esos controles, las variables del estado se saturan para conseguir el nuevo régimen permanente en un tiempo mínimo, así como el filtro de salida, más específicamente la pendiente de la corriente de la bobina, define la respuesta de la tensión de salida. Por tanto, reduciendo la inductancia de la bobina de salida, la corriente de bobina llega más rápido al nuevo régimen permanente, por lo que una menor cantidad de carga es tomada del condensador de salida durante el tránsito. El inconveniente de esa propuesta es que el rendimiento del sistema es penalizado debido al incremento de pérdidas de conmutación y las corrientes RMS. Para conseguir tanto la reducción del condensador de salida como el alto rendimiento del sistema, mientras se satisfacen las estrictas especificaciones dinámicas, un convertidor multifase es adoptado como estándar para aplicaciones VRM. Para asegurar el reparto de las corrientes entre fases, el convertidor multifase se suele implementar con control de modo de corriente. Para superar la limitación impuesta por el filtro de salida, la segunda posibilidad para reducir el condensador de salida es aplicar alguna modificación topológica (Topologic modifications) de la etapa básica de potencia para incrementar la pendiente de la corriente de bobina y así reducir la duración de tránsito. Como el transitorio se ha reducido, una menor cantidad de carga es tomada del condensador de salida bajo el mismo escalón de la corriente de salida, con lo cual, el condensador de salida se puede reducir para lograr la misma desviación de la tensión de salida. La tercera posibilidad para reducir el condensador de salida del convertidor es introducir un camino auxiliar de energía (additional energy path, AEP) para compensar el desequilibrio de la carga del condensador de salida reduciendo consecuentemente la duración del transitorio y la desviación de la tensión de salida. De esta manera, durante el régimen permanente, el sistema tiene un alto rendimiento debido a que el convertidor principal con bajo ancho de banda es diseñado para trabajar con una frecuencia de conmutación moderada para conseguir requisitos estáticos. Por otro lado, el comportamiento dinámico durante los transitorios es determinado por el AEP con un alto ancho de banda. El AEP puede ser implementado como un camino resistivo, como regulador lineal (Linear regulator, LR) o como un convertidor conmutado. Las dos primeras implementaciones proveen un mayor ancho de banda, acosta del incremento de pérdidas durante el transitorio. Por otro lado, la implementación del convertidor computado presenta menor ancho de banda, limitado por la frecuencia de conmutación, aunque produce menores pérdidas comparado con las dos anteriores implementaciones. Dependiendo de la aplicación, la implementación y la estrategia de control del sistema, hay una variedad de soluciones propuestas en el Estado del Arte (State-of-the-Art, SoA), teniendo diferentes propiedades donde una solución ofrece más ventajas que las otras, pero también unas desventajas. En general, un sistema con AEP ideal debería tener las siguientes propiedades: 1. El impacto del AEP a las pérdidas del sistema debería ser mínimo. A lo largo de la operación, el AEP genera pérdidas adicionales, con lo cual, en el caso ideal, el AEP debería trabajar por un pequeño intervalo de tiempo, solo durante los tránsitos; la otra opción es tener el AEP constantemente activo pero, por la compensación del rizado de la corriente de bobina, se generan pérdidas innecesarias. 2. El AEP debería ser activado inmediatamente para minimizar la desviación de la tensión de salida. Para conseguir una activación casi instantánea, el sistema puede ser informado por la carga antes del escalón o el sistema puede observar la corriente del condensador de salida, debido a que es la primera variable del estado que actúa a la perturbación de la corriente de salida. De esa manera, el AEP es activado con casi cero error de la tensión de salida, logrando una menor desviación de la tensión de salida. 3. El AEP debería ser desactivado una vez que el nuevo régimen permanente es detectado para evitar los transitorios adicionales de establecimiento. La mayoría de las soluciones de SoA estiman la duración del transitorio, que puede provocar un transitorio adicional si la estimación no se ha hecho correctamente (por ejemplo, si la corriente de bobina del convertidor principal tiene un nivel superior o inferior al necesitado, el regulador lento del convertidor principal tiene que compensar esa diferencia una vez que el AEP es desactivado). Otras soluciones de SoA observan las variables de estado, asegurando que el sistema llegue al nuevo régimen permanente, o pueden ser informadas por la carga. 4. Durante el transitorio, como mínimo un subsistema, o bien el convertidor principal o el AEP, debería operar en el lazo cerrado. Implementando un sistema en el lazo cerrado, preferiblemente el subsistema AEP por su ancho de banda elevado, se incrementa la robustez del sistema a los parásitos. Además, el AEP puede operar con cualquier tipo de corriente de carga. Las soluciones que funcionan en el lazo abierto suelen preformar el control de balance de carga con mínimo tiempo, así reducen la duración del transitorio y tienen un impacto menor a las pérdidas del sistema. Por otro lado, esas soluciones demuestran una alta sensibilidad a las tolerancias y parásitos de los componentes. 5. El AEP debería inyectar la corriente a la salida en una manera controlada, así se reduce el riesgo de unas corrientes elevadas y potencialmente peligrosas y se incrementa la robustez del sistema bajo las perturbaciones de la tensión de entrada. Ese problema suele ser relacionado con los sistemas donde el AEP es implementado como un convertidor auxiliar. El convertidor auxiliar es diseñado para una potencia baja, con lo cual, los dispositivos elegidos son de baja corriente/potencia. Si la corriente no es controlada, bajo un pico de tensión de entrada provocada por otro parte del sistema (por ejemplo, otro convertidor conectado al mismo bus), se puede llegar a un pico en la corriente auxiliar que puede causar la perturbación de tensión de salida e incluso el fallo de los dispositivos del convertidor auxiliar. Sin embargo, cuando la corriente es controlada, usando control del pico de corriente o control con histéresis, la corriente auxiliar tiene el control con prealimentación (feed-forward) de tensión de entrada y la corriente es definida y limitada. Por otro lado, si la solución utiliza el control de balance de carga, el sistema puede actuar de forma deficiente si la tensión de entrada tiene un valor diferente del nominal, provocando que el AEP inyecta/toma más/menos carga que necesitada. 6. Escalabilidad del sistema a convertidores multifase. Como ya ha sido comentado anteriormente, para las aplicaciones VRM por la corriente de carga elevada, el convertidor principal suele ser implementado como multifase para distribuir las perdidas entre las fases y bajar el estrés térmico de los dispositivos. Para asegurar el reparto de las corrientes, normalmente un control de modo corriente es usado. Las soluciones de SoA que usan VMC son limitadas a la implementación con solo una fase. Esta tesis propone un nuevo método de control del flujo de energía por el AEP y el convertidor principal. El concepto propuesto se basa en la inyección controlada de la corriente auxiliar al nodo de salida donde la amplitud de la corriente es n-1 veces mayor que la corriente del condensador de salida con las direcciones apropiadas. De esta manera, el AEP genera un condensador virtual cuya capacidad es n veces mayor que el condensador físico y reduce la impedancia de salida. Como el concepto propuesto reduce la impedancia de salida usando el AEP, el concepto es llamado Output Impedance Correction Circuit (OICC) concept. El concepto se desarrolla para un convertidor tipo reductor síncrono multifase con control modo de corriente CMC (incluyendo e implementación con una fase) y puede operar con la tensión de salida constante o con AVP. Además, el concepto es extendido a un convertidor de una fase con control modo de tensión VMC. Durante la operación, el control de tensión de salida de convertidor principal y control de corriente del subsistema OICC están siempre cerrados, incrementando la robustez a las tolerancias de componentes y a los parásitos del cirquito y permitiendo que el sistema se pueda enfrentar a cualquier tipo de la corriente de carga. Según el método de control propuesto, el sistema se puede encontrar en dos estados: durante el régimen permanente, el sistema se encuentra en el estado Idle y el subsistema OICC esta desactivado. Por otro lado, durante el transitorio, el sistema se encuentra en estado Activo y el subsistema OICC está activado para reducir la impedancia de salida. El cambio entre los estados se hace de forma autónoma: el sistema entra en el estado Activo observando la corriente de condensador de salida y vuelve al estado Idle cunado el nuevo régimen permanente es detectado, observando las variables del estado. La validación del concepto OICC es hecha aplicándolo a un convertidor tipo reductor síncrono con dos fases y de 30W cuyo condensador de salida tiene capacidad de 140μF, mientras el factor de multiplicación n es 15, generando en el estado Activo el condensador virtual de 2.1mF. El subsistema OICC es implementado como un convertidor tipo reductor síncrono con PCMC. Comparando el funcionamiento del convertidor con y sin el OICC, los resultados demuestran que se ha logrado una reducción de la desviación de tensión de salida con factor 12, tanto con funcionamiento básico como con funcionamiento AVP. Además, los resultados son comparados con un prototipo de referencia que tiene la misma etapa de potencia y un condensador de salida físico de 2.1mF. Los resultados demuestran que los dos sistemas tienen el mismo comportamiento dinámico. Más aun, se ha cuantificado el impacto en las pérdidas del sistema operando bajo una corriente de carga pulsante y bajo DVS. Se demuestra que el sistema con OICC mejora el rendimiento del sistema, considerando las pérdidas cuando el sistema trabaja con la carga pulsante y con DVS. Por lo último, el condensador de salida de sistema con OICC es mucho más pequeño que el condensador de salida del convertidor de referencia, con lo cual, por usar el concepto OICC, la densidad de energía se incrementa. En resumen, las contribuciones principales de la tesis son: • El concepto propuesto de Output Impedance Correction Circuit (OICC), • El control a nivel de sistema basado en el método usado para cambiar los estados de operación, • La implementación del subsistema OICC en lazo cerrado conjunto con la implementación del convertidor principal, • La cuantificación de las perdidas dinámicas bajo la carga pulsante y bajo la operación DVS, y • La robustez del sistema bajo la variación del condensador de salida y bajo los escalones de carga consecutiva. ABSTRACT Development of new technologies allows engineers to push the performance of the integrated circuits to its limits. New generations of processors, DSPs or FPGAs are able to process information with high speed and high consumption or to wait in low power mode with minimum possible consumption. This huge variation in power consumption and the short time needed to change from one level to another, affect the specifications of the Voltage Regulated Module (VRM) that supplies the IC. Furthermore, additional mandatory features, such as Adaptive Voltage Positioning (AVP) and Dynamic Voltage Scaling (DVS), impose opposite trends on the design of the VRM power stage. In order to cope with high load-step amplitudes, the output capacitor of the VRM power stage output filter is drastically oversized, penalizing power density and the efficiency during the DVS operation. Therefore, the ongoing research trend is directed to improve the dynamic response of the VRM while reducing the size of the output capacitor. The output capacitor reduction leads to a smaller cost and longer life-time of the system since the big bulk capacitors, usually implemented with OSCON capacitors, may not be needed to achieve the desired dynamic behavior. An additional advantage is that, by reducing the output capacitance, dynamic voltage scaling (DVS) can be performed faster and with smaller stress on the power stage, since the needed amount of charge to change the output voltage is smaller. The dynamic behavior of the system with a linear control (Voltage mode control, VMC, Peak Current Mode Control, PCMC,…) is limited by the converter switching frequency and filter size. The reduction of the output capacitor can be achieved by increasing the switching frequency of the converter, thus increasing the bandwidth of the system, and/or by applying advanced non-linear controls. Applying nonlinear control, the system variables get saturated in order to reach the new steady-state in a minimum time, thus the output filter, more specifically the output inductor current slew-rate, determines the output voltage response. Therefore, by reducing the output inductor value, the inductor current reaches faster the new steady state, so a smaller amount of charge is taken from the output capacitor during the transient. The drawback of this approach is that the system efficiency is penalized due to increased switching losses and RMS currents. In order to achieve both the output capacitor reduction and high system efficiency, while satisfying strict dynamic specifications, a Multiphase converter system is adopted as a standard for VRM applications. In order to ensure the current sharing among the phases, the multiphase converter is usually implemented with current mode control. In order to overcome the limitation imposed by the output filter, the second possibility to reduce the output capacitor is to apply Topologic modifications of the basic power stage topology in order to increase the slew-rate of the inductor current and, therefore, reduce the transient duration. Since the transient is reduced, smaller amount of charge is taken from the output capacitor under the same load current, thus, the output capacitor can be reduced to achieve the same output voltage deviation. The third possibility to reduce the output capacitor of the converter is to introduce an additional energy path (AEP) to compensate the charge unbalance of the output capacitor, consequently reducing the transient time and output voltage deviation. Doing so, during the steady-state operation the system has high efficiency because the main low-bandwidth converter is designed to operate at moderate switching frequency, to meet the static requirements, whereas the dynamic behavior during the transients is determined by the high-bandwidth auxiliary energy path. The auxiliary energy path can be implemented as a resistive path, as a Linear regulator, LR, or as a switching converter. The first two implementations provide higher bandwidth, at the expense of increasing losses during the transient. On the other hand, the switching converter implementation presents lower bandwidth, limited by the auxiliary converter switching frequency, though it produces smaller losses compared to the two previous implementations. Depending on the application, the implementation and the control strategy of the system, there is a variety of proposed solutions in the State-of-the-Art (SoA), having different features where one solution offers some advantages over the others, but also some disadvantages. In general, an ideal additional energy path system should have the following features: 1. The impact on the system losses should be minimal. During its operation, the AEP generates additional losses, thus ideally, the AEP should operate for a short period of time, only when the transient is occurring; the other option is to have the AEP constantly on, but due to the inductor current ripple compensation at the output, unnecessary losses are generated. 2. The AEP should be activated nearly instantaneously to prevent bigger output voltage deviation. To achieve near instantaneous activation, the converter system can be informed by the load prior to the load-step or the system can observe the output capacitor current, which is the first system state variable that reacts on the load current perturbation. In this manner, the AEP is turned on with near zero output voltage error, providing smaller output voltage deviation. 3. The AEP should be deactivated once the new steady state is reached to avoid additional settling transients. Most of the SoA solutions estimate duration of the transient which may cause additional transient if the estimation is not performed correctly (e.g. if the main converter inductor current has higher or lower value than needed, the slow regulator of the main converter needs to compensate the difference after the AEP is deactivated). Other SoA solutions are observing state variables, ensuring that the system reaches the new steady state or they are informed by the load. 4. During the transient, at least one subsystem, either the main converter or the AEP, should be in closed-loop. Implementing a closed loop system, preferably the AEP subsystem, due its higher bandwidth, increases the robustness under system tolerances and circuit parasitic. In addition, the AEP can operate with any type of load. The solutions that operate in open loop usually perform minimum time charge balance control, thus reducing the transient length and minimizing the impact on the losses, however they are very sensitive to tolerances and parasitics. 5. The AEP should inject current at the output in a controlled manner, thus reducing the risk of high and potentially damaging currents and increasing robustness on the input voltage deviation. This issue is mainly related to the systems where AEP is implemented as auxiliary converter. The auxiliary converter is designed for small power and, as such, the MOSFETs are rated for small power/currents. If the current is not controlled, due to the some unpredicted spike in input voltage caused by some other part of the system (e.g. different converter), it may lead to a current spike in auxiliary current which will cause the perturbation of the output voltage and even failure of the switching components of auxiliary converter. In the case when the current is controlled, using peak CMC or Hysteretic Window CMC, the auxiliary converter has inherent feed-forwarding of the input voltage in current control and the current is defined and limited. Furthermore, if the solution employs charge balance control, the system may perform poorly if the input voltage has different value than the nominal, causing that AEP injects/extracts more/less charge than needed. 6. Scalability of the system to multiphase converters. As commented previously, in VRM applications, due to the high load currents, the main converters are implemented as multiphase to redistribute losses among the modules, lowering temperature stress of the components. To ensure the current sharing, usually a Current Mode Control (CMC) is employed. The SoA solutions that are implemented with VMC are limited to a single stage implementation. This thesis proposes a novel control method of the energy flow through the AEP and the main converter system. The proposed concept relays on a controlled injection of the auxiliary current at the output node where the instantaneous current value is n-1 times bigger than the output capacitor current with appropriate directions. Doing so, the AEP creates an equivalent n times bigger virtual capacitor at the output, thus reducing the output impedance. Due to the fact that the proposed concept reduces the output impedance using the AEP, it has been named the Output Impedance Correction Circuit (OICC) concept. The concept is developed for a multiphase CMC synchronous buck converter (including a single phase implementation), operating with a constant output voltage and with AVP feature. Further, it is extended to a single phase VMC synchronous buck converter. During the operation, the main converter voltage loop and the OICC subsystem capacitor current loop is constantly closed, increasing the robustness under system tolerances and circuit parasitic and allowing the system to operate with any load-current shape or pattern. According to the proposed control method, the system operates in two states: during the steady-state the system is in the Idle state and the OICC subsystem is deactivated, while during the load-step transient the system is in the Active state and the OICC subsystem is activated in order to reduce the output impedance. The state changes are performed autonomously: the system enters in the Active state by observing the output capacitor current and it returns back to the Idle state when the steady-state operation is detected by observing the state variables. The validation of the OICC concept has been done by applying it to a 30W two phase synchronous buck converter with 140μF output capacitor and with the multiplication factor n equal to 15, generating during the Active state equivalent output capacitor of 2.1mF. The OICC subsystem is implemented as single phase PCMC synchronous buck converter. Comparing the converter operation with and without the OICC the results demonstrate that the 12 times reduction of the output voltage deviation is achieved, for both basic operation and for the AVP operation. Furthermore, the results have been compared to a reference prototype which has the same power stage and a fiscal output capacitor of 2.1mF. The results show that the two systems have the same dynamic behavior. Moreover, an impact on the system losses under the pulsating load and DVS operation has been quantified and it has been demonstrated that the OICC system has improved the system efficiency, considering the losses when the system operates with the pulsating load and the DVS operation. Lastly, the output capacitor of the OICC system is much smaller than the reference design output capacitor, therefore, by applying the OICC concept the power density can be increased. In summary, the main contributions of the thesis are: • The proposed Output Impedance Correction Circuit (OICC) concept, • The system level control based on the used approach to change the states of operation, • The OICC subsystem closed-loop implementation, together with the main converter implementation, • The dynamic losses under the pulsating load and the DVS operation quantification, and • The system robustness on the capacitor impedance variation and consecutive load-steps.

Control of time-dependent biological processes by temporally patterned input

Temporal patterning of biological variables, in the form of oscillations and rhythms on many time scales, is ubiquitous. Altering the temporal pattern of an input variable greatly affects the output of many biological processes. We develop here a conceptual framework for a quantitative understanding of such pattern dependence, focusing particularly on nonlinear, saturable, time-dependent processes that abound in biophysics, biochemistry, and physiology. We show theoretically that pattern dependence is governed by the nonlinearity of the input–output transformation as well as its time constant. As a result, only patterns on certain time scales permit the expression of pattern dependence, and processes with different time constants can respond preferentially to different patterns. This has implications for temporal coding and decoding, and allows differential control of processes through pattern. We show how pattern dependence can be quantitatively predicted using only information from steady, unpatterned input. To apply our ideas, we analyze, in an experimental example, how muscle contraction depends on the pattern of motorneuron firing.

Decoding temporally encoded sensory input by cortical oscillations and thalamic phase comparators

The temporally encoded information obtained by vibrissal touch could be decoded “passively,” involving only input-driven elements, or “actively,” utilizing intrinsically driven oscillators. A previous study suggested that the trigeminal somatosensory system of rats does not obey the bottom-up order of activation predicted by passive decoding. Thus, we have tested whether this system obeys the predictions of active decoding. We have studied cortical single units in the somatosensory cortices of anesthetized rats and guinea pigs and found that about a quarter of them exhibit clear spontaneous oscillations, many of them around whisking frequencies (≈10 Hz). The frequencies of these oscillations could be controlled locally by glutamate. These oscillations could be forced to track the frequency of induced rhythmic whisker movements at a stable, frequency-dependent, phase difference. During these stimulations, the response intensities of multiunits at the thalamic recipient layers of the cortex decreased, and their latencies increased, with increasing input frequency. These observations are consistent with thalamocortical loops implementing phase-locked loops, circuits that are most efficient in decoding temporally encoded information like that obtained by active vibrissal touch. According to this model, and consistent with our results, populations of thalamic “relay” neurons function as phase “comparators” that compare cortical timing expectations with the actual input timing and represent the difference by their population output rate.

The temporal lobe is a target of output from the basal ganglia.

The basal ganglia are known to receive inputs from widespread regions of the cerebral cortex, such as the frontal, parietal, and temporal lobes. Of these cortical areas, only the frontal lobe is thought to be the target of basal ganglia output. One of the cortical regions that is a source of input to the basal ganglia is area TE, in inferotemporal cortex. This cortical area is thought to be critically involved in the recognition and discrimination of visual objects. Using retrograde transneuronal transport of herpes simplex virus type 1, we have found that one of the output nuclei of the basal ganglia, the substantia nigra pars reticulata, projects via the thalamus to TE. Thus, TE is not only a source of input to the basal ganglia, but also is a target of basal ganglia output. This result implies that the output of the basal ganglia influences higher order aspects of visual processing. In addition, we propose that dysfunction of the basal ganglia loop with TE leads to alterations in visual perception, including visual hallucinations.

The Theoretical Framework and Methodology to Estimate the Farm Labour and Other Factor-Derived Demand and Output Supply Systems. Factor Markets Working Document No. 44, May 2013

This paper provides a conceptual framework for the estimation of the farm labour and other factor-derived demand and output supply systems. In order to analyse the drivers of labour demand in agriculture and account for the impact of policies on those decisions, it is necessary to acknowledge the interaction between the different factor markets. For this purpose, we present a review of the theoretical background to primal and dual representations of production and some empirical literature that has made use of derived demand systems. The main focus of the empirical work is to study the effect of market distortions in one market, through inefficient pricing, on the demand for other inputs. Therefore, own-price and cross-price elasticities of demand become key variables in the analysis. The dual cost function is selected as the most appropriate approach, where input prices are assumed to be exogenous. A commonly employed specification – and one that is particularly convenient due to its flexible form – is the translog cost function. The analysis consists of estimating the system of cost-share equations, in order to obtain the derived demand functions for inputs. Thus, the elasticities of factor substitution can be used to examine the complementarity/substitutability between inputs.

Output price subsidies in a stochastic world

This article studies the comparative statics of output subsidies for firms, with monotonic preferences over costs and returns, that face price and production uncertainty. The modeling of deficiency payments, support-price schemes, and stochastic supply shifts in a state-space framework is discussed. It is shown how these notions can be used, via a simple application of Shephard's lemma, to analyze input-demand shifts once comparative-static results for supply are available. A range of comparative-static results for supply are then developed and discussed.

On the relationship between Bayesian error bars and the input data density

We investigate the dependence of Bayesian error bars on the distribution of data in input space. For generalized linear regression models we derive an upper bound on the error bars which shows that, in the neighbourhood of the data points, the error bars are substantially reduced from their prior values. For regions of high data density we also show that the contribution to the output variance due to the uncertainty in the weights can exhibit an approximate inverse proportionality to the probability density. Empirical results support these conclusions.

Regression with input-dependent noise: A Gaussian process treatment

Gaussian processes provide natural non-parametric prior distributions over regression functions. In this paper we consider regression problems where there is noise on the output, and the variance of the noise depends on the inputs. If we assume that the noise is a smooth function of the inputs, then it is natural to model the noise variance using a second Gaussian process, in addition to the Gaussian process governing the noise-free output value. We show that prior uncertainty about the parameters controlling both processes can be handled and that the posterior distribution of the noise rate can be sampled from using Markov chain Monte Carlo methods. Our results on a synthetic data set give a posterior noise variance that well-approximates the true variance.

The efficiency and productivity of Malaysian banks:an output distance function approach

This study employs stochastic frontier analysis to analyze Malaysian commercial banks during 1996-2002, and particularly focuses on determining the impact of Islamic banking on performance. We derive both net and gross efficiency estimates, thereby demonstrating that differences in operating characteristics explain much of the difference in outputs between Malaysian banks. We also decompose productivity change into efficiency, technical, and scale change using a generalised Malmquist productivity index. On average, Malaysian banks experience mild decreasing return to scale and annual productivity change of 2.37 percent, with the latter driven primarily by technical change, which has declined over time. Our gross efficiency estimates suggest that Islamic banking is associated with higher input requirements. In addition, our productivity estimates indicate that the potential for full-fledged Islamic banks and conventional banks with Islamic banking operations to overcome the output disadvantages associated with Islamic banking are relatively limited. Merged banks are found to have higher input usage and lower productivity change, suggesting that bank mergers have not contributed positively to bank performance. Finally, our results suggest that while the East Asian financial crisis had an interim output-increasing effect in 1998, the crisis prompted a continuing negative impact on the output performance by increasing the volume of non-performing loans.

Optimal design for correlated processes with input-dependent noise

Optimal design for parameter estimation in Gaussian process regression models with input-dependent noise is examined. The motivation stems from the area of computer experiments, where computationally demanding simulators are approximated using Gaussian process emulators to act as statistical surrogates. In the case of stochastic simulators, which produce a random output for a given set of model inputs, repeated evaluations are useful, supporting the use of replicate observations in the experimental design. The findings are also applicable to the wider context of experimental design for Gaussian process regression and kriging. Designs are proposed with the aim of minimising the variance of the Gaussian process parameter estimates. A heteroscedastic Gaussian process model is presented which allows for an experimental design technique based on an extension of Fisher information to heteroscedastic models. It is empirically shown that the error of the approximation of the parameter variance by the inverse of the Fisher information is reduced as the number of replicated points is increased. Through a series of simulation experiments on both synthetic data and a systems biology stochastic simulator, optimal designs with replicate observations are shown to outperform space-filling designs both with and without replicate observations. Guidance is provided on best practice for optimal experimental design for stochastic response models. © 2013 Elsevier Inc. All rights reserved.

Expanding the biomass resource:sustainable oil production via fast pyrolysis of low input high diversity biomass and the potential integration of thermochemical and biological conversion routes

Waste biomass is generated during the conservation management of semi-natural habitats, and represents an unused resource and potential bioenergy feedstock that does not compete with food production. Thermogravimetric analysis was used to characterise a representative range of biomass generated during conservation management in Wales. Of the biomass types assessed, those dominated by rush (Juncus effuses) and bracken (Pteridium aquilinum) exhibited the highest and lowest volatile compositions respectively and were selected for bench scale conversion via fast pyrolysis. Each biomass type was ensiled and a sub-sample of silage was washed and pressed. Demineralization of conservation biomass through washing and pressing was associated with higher oil yields following fast pyrolysis. The oil yields were within the published range established for the dedicated energy crops miscanthus and willow. In order to examine the potential a multiple output energy system was developed with gross power production estimates following valorisation of the press fluid, char and oil. If used in multi fuel industrial burners the char and oil alone would displace 3.9 × 105 tonnes per year of No. 2 light oil using Welsh biomass from conservation management. Bioenergy and product development using these feedstocks could simultaneously support biodiversity management and displace fossil fuels, thereby reducing GHG emissions. Gross power generation predictions show good potential.