Modulation of Catalytic Activity in Multi-Domain Protein Tyrosine Phosphatases

Signaling mechanisms involving protein tyrosine phosphatases govern several cellular and developmental processes. These enzymes are regulated by several mechanisms which include variation in the catalytic turnover rate based on redox stimuli, subcellular localization or protein-protein interactions. In the case of Receptor Protein Tyrosine Phosphatases (RPTPs) containing two PTP domains, phosphatase activity is localized in their membrane-proximal (D1) domains, while the membrane-distal (D2) domain is believed to play a modulatory role. Here we report our analysis of the influence of the D2 domain on the catalytic activity and substrate specificity of the D1 domain using two Drosophila melanogaster RPTPs as a model system. Biochemical studies reveal contrasting roles for the D2 domain of Drosophila Leukocyte antigen Related (DLAR) and Protein Tyrosine Phosphatase on Drosophila chromosome band 99A (PTP99A). While D2 lowers the catalytic activity of the D1 domain in DLAR, the D2 domain of PTP99A leads to an increase in the catalytic activity of its D1 domain. Substrate specificity, on the other hand, is cumulative, whereby the individual specificities of the D1 and D2 domains contribute to the substrate specificity of these two-domain enzymes. Molecular dynamics simulations on structural models of DLAR and PTP99A reveal a conformational rationale for the experimental observations. These studies reveal that concerted structural changes mediate inter-domain communication resulting in either inhibitory or activating effects of the membrane distal PTP domain on the catalytic activity of the membrane proximal PTP domain.

Recent Advances in Low CTE and High Density System-on-a-Package (SOP) Substrate with Thin Film Component Integration

The Packaging Research Center has been developing next generation system-on-a-package (SOP) technology with digital, RF, optical, and sensor functions integrated in a single package/module. The goal of this effort is to develop a platform substrate technology providing very high wiring density and embedded thin film passive and active components using PWB compatible materials and processes. The latest SOP baseline process test vehicle has been fabricated on novel Si-matched CTE, high modulus C-SiC composite core substrates using 10mum thick BCB dielectric films with loss tangent of 0.0008 and dielectric constant of 2.65. A semi-additive plating process has been developed for multilayer microvia build-up using BCB without the use of any vacuum deposition or polishing/CMP processes. PWB and package substrate compatible processes such as plasma surface treatment/desmear and electroless/electrolytic pulse reverse plating was used. The smallest line width and space demonstrated in this paper is 6mum with microvia diameters in the 15-30mum range. This build-up process has also been developed on medium CTE organic laminates including MCL-E-679F from Hitachi Chemical and PTFE laminates with Cu-Invar-Cu core. Embedded decoupling capacitors with capacitance density of >500nF/cm2 have been integrated into the build-up layers using sol-gel synthesized BaTiO3 thin films (200-300nm film thickness) deposited on copper foils and integrated using vacuum lamination and subtractive etch processes. Thin metal alloy resistor films have been integrated into the SOP substrate using two methods: (a) NiCrAlSi thin films (25ohms per square) deposited on copper foils (Gould Electronics) laminated on the build-up layers and two step etch process for resistor definition, and (b) electroless plated Ni-W-P thin films (70 ohms to few Kohms per square) on the BCB dielectric by plasma surface treatment and activation. The electrical design and build-up layer structure along- - with key materials and processes used in the fabrication of the SOP4 test vehicle were presented in this paper. Initial results from the high density wiring and embedded thin film components were also presented. The focus of this paper is on integration of materials, processes and structures in a single package substrate for system-on-a-package (SOP) implementation