921 resultados para Asynchronous logic circuits
Resumo:
Although many examples exist for shared neural representations of self and other, it is unknown how such shared representations interact with the rest of the brain. Furthermore, do high-level inference-based shared mentalizing representations interact with lower level embodied/simulation-based shared representations? We used functional neuroimaging (fMRI) and a functional connectivity approach to assess these questions during high-level inference-based mentalizing. Shared mentalizing representations in ventromedial prefrontal cortex, posterior cingulate/precuneus, and temporo-parietal junction (TPJ) all exhibited identical functional connectivity patterns during mentalizing of both self and other. Connectivity patterns were distributed across low-level embodied neural systems such as the frontal operculum/ventral premotor cortex, the anterior insula, the primary sensorimotor cortex, and the presupplementary motor area. These results demonstrate that identical neural circuits are implementing processes involved in mentalizing of both self and other and that the nature of such processes may be the integration of low-level embodied processes within higher level inference-based mentalizing.
Resumo:
The extensive development of the ruminant forestomach sets apart their N economy from that of nonruminants in a number of respects. Extensive pregastric fermentation alters the profile of protein reaching the small intestine, largely through the transformation of nitrogenous compounds into microbial protein. This process is fueled primarily by carbohydrate fermentation and includes extensive recycling of N between the body and gut lumen pools. Nitrogen recycling occurs via blood and gut lumen exchanges of urea and NH3, as well as endogenous gut and secretory N entry into the gut lumen, and the subsequent digestion and absorption of microbial and endogenous protein. Factors controlling urea transfer to the gut from blood, including the contributions of urea transporters, remain equivocal. Ammonia produced by microbial degradation of urea and dietary and endogenous AA is utilized by microbial fermentation or absorbed and primarily converted to urea. Therefore, microbial growth and carbohydrate fermentation affect the extent of NH3 absorption and urea N recycling and excretion. The extensive recycling of N to the rumen represents an evolutionary advantage of the ruminant in terms of absorbable protein supply during periods of dietary protein deficiency, or asynchronous carbohydrate and protein supply, but incurs a cost of greater N intakes, especially in terms of excess N excretion. Efforts to improve the efficiency of N utilization in ruminants by synchronizing fermentable energy and N availability have generally met with limited success with regards to production responses. In contrast, imposing asynchrony through oscillating dietary protein concentration, or infrequent supplementation, surprisingly has not negatively affected production responses unless the frequency of supplementation is less than once every 3 d. In some cases, oscillation of dietary protein concentration has improved N retention compared with animals fed an equal amount of dietary protein on a daily basis. This may reflect benefits of Orn cycle adaptations and sustained recycling of urea to the gut. The microbial symbiosis of the ruminant is inherently adaptable to asynchronous N and energy supply. Recycling of urea to the gut buffers the effect of irregular dietary N supply such that intuitive benefits of rumen synchrony in terms of the efficiency of N utilization are typically not observed in practice.
Resumo:
This paper describes the development and validation of a novel web-based interface for the gathering of feedback from building occupants about their environmental discomfort including signs of Sick Building Syndrome (SBS). The gathering of such feedback may enable better targeting of environmental discomfort down to the individual as well as the early detection and subsequently resolution by building services of more complex issues such as SBS. The occupant's discomfort is interpreted and converted to air-conditioning system set points using Fuzzy Logic. Experimental results from a multi-zone air-conditioning test rig have been included in this paper.
Resumo:
Design for low power in FPGA is rather limited since technology factors affecting power are either fixed or limited for FPGA families. This paper investigates opportunities for power savings of a pipelined 2D IDCT design at the architecture and logic level. We report power consumption savings of over 25% achieved in FPGA circuits obtained from clock gating implementation of optimizations made at the algorithmic level(1).
Resumo:
This paper presents the evaluation in power consumption of gated clocks pipelined circuits with different register configurations in Virtex-based FPGA devices. Power impact of a gated clock circuitry aimed at reducing flip-flops output rate at the bit level is studied. Power performance is also given for pipeline stages based on the implementation of a double edge-triggered flip-flop. Using a pipelined Cordic Core circuit as an example, this study did not find evidence in power benefits either when gated clock at the bit-level or double-edge triggered flip-flops used when synthesized with FPGA logic resources.
Resumo:
This paper develops cycle-level FPGA circuits of an organization for a fast path-based neural branch predictor Our results suggest that practical sizes of prediction tables are limited to around 32 KB to 64 KB in current FPGA technology due mainly to FPGA area of logic resources to maintain the tables. However the predictor scales well in terms of prediction speed. Table sizes alone should not be used as the only metric for hardware budget when comparing neural-based predictor to predictors of totally different organizations. This paper also gives early evidence to shift the attention on to the recovery from mis-prediction latency rather than on prediction latency as the most critical factor impacting accuracy of predictions for this class of branch predictors.
Resumo:
Dense deployments of wireless local area networks (WLANs) are fast becoming a permanent feature of all developed cities around the world. While this increases capacity and coverage, the problem of increased interference, which is exacerbated by the limited number of channels available, can severely degrade the performance of WLANs if an effective channel assignment scheme is not employed. In an earlier work, an asynchronous, distributed and dynamic channel assignment scheme has been proposed that (1) is simple to implement, (2) does not require any knowledge of the throughput function, and (3) allows asynchronous channel switching by each access point (AP). In this paper, we present extensive performance evaluation of this scheme when it is deployed in the more practical non-uniform and dynamic topology scenarios. Specifically, we investigate its effectiveness (1) when APs are deployed in a nonuniform fashion resulting in some APs suffering from higher levels of interference than others and (2) when APs are effectively switched `on/off' due to the availability/lack of traffic at different times, which creates a dynamically changing network topology. Simulation results based on actual WLAN topologies show that robust performance gains over other channel assignment schemes can still be achieved even in these realistic scenarios.
Resumo:
Due to its popularity, dense deployments of wireless local area networks (WLANs) are becoming a common feature of many cities around the world. However, with only a limited number of channels available, the problem of increased interference can severely degrade the performance of WLANs if an effective channel assignment scheme is not employed. In an earlier work, we proposed an improved asynchronous distributed and dynamic channel assignment scheme that (1) is simple to implement, (2) does not require any knowledge of the throughput function, and (3) allows asynchronous channel switching by each access point (AP). In this paper, we present extensive performance evaluation of the proposed scheme in practical scenarios found in densely populated WLAN deployments. Specifically, we investigate the convergence behaviour of the scheme and how its performance gains vary with different number of available channels and in different deployment densities. We also prove that our scheme is guaranteed to converge in a single iteration when the number of channels is greater than the number of neighbouring APs.
Resumo:
Due to their popularity, dense deployments of wireless local area networks (WLANs) are becoming a common feature of many cities around the world. However, with only a limited number of channels available, the problem of increased interference can severely degrade the performance of WLANs if an effective channel assignment scheme is not employed. Previous studies on channel assignment in WLANs almost always assume that all access points (AP) employ the same channel assignment scheme which is clearly unrealistic. On the other hand, to the best of our knowledge, the interaction between different channel assignment schemes has also not been studied before. Therefore, in this paper, we investigate the effectiveness of our earlier proposed asynchronous channel assignment scheme in these heterogeneous WLANs scenarios. Simulation results show that our proposed scheme is still able to provide robust performance gains even in these scenarios.
Resumo:
Wireless local area networks (WLANs) have changed the way many of us communicate, work, play and live. Due to its popularity, dense deployments are becoming a norm in many cities around the world. However, increased interference and traffic demands can severely limit the aggregate throughput achievable if an effective channel assignment scheme is not used. In this paper, we propose an enhanced asynchronous distributed and dynamic channel assignment scheme that is simple to implement, does not require any knowledge of the throughput function, allows asynchronous channel switching by each access point (AP) and is superior in performance. Simulation results show that our proposed scheme converges much faster than previously reported synchronous schemes, with a reduction in convergence time and channel switches by tip to 73.8% and 30.0% respectively.