Silicon Promotes Exodermal Casparian Band Formation in Si-Accumulating and Si-Excluding Species by Forming Phenol Complexes

We studied the effect of Silicon (Si) on Casparian band (CB) development, chemical composition of the exodermal CB and Si deposition across the root in the Si accumulators rice and maize and the Si non-accumulator onion. Plants were cultivated in nutrient solution with and without Si supply. The CB development was determined in stained root cross-sections. The outer part of the roots containing the exodermis was isolated after enzymatic treatment. The exodermal suberin was transesterified with MeOH/BF3 and the chemical composition was measured using gas chromatography-mass spectroscopy (GC-MS) and flame ionization detector (GC-FID). Laser ablation-inductively coupled plasma-mass spectroscopy (LA-ICP-MS) was used to determine the Si deposition across root cross sections. Si promoted CB formation in the roots of Si-accumulator and Si non-accumulator species. The exodermal suberin was decreased in rice and maize due to decreased amounts of aromatic suberin fractions. Si did not affect the concentration of lignin and lignin-like polymers in the outer part of rice, maize and onion roots. The highest Si depositions were found in the tissues containing CB. These data along with literature were used to suggest a mechanism how Si promotes the CB development by forming complexes with phenols.

Growth and application of planar III-V semiconductor nanowires grown with MOCVD

The semiconductor nanowire has been widely studied over the past decade and identified as a promising nanotechnology building block with application in photonics and electronics. The flexible bottom-up approach to nanowire growth allows for straightforward fabrication of complex 1D nanostructures with interesting optical, electrical, and mechanical properties. III-V nanowires in particular are useful because of their direct bandgap, high carrier mobility, and ability to form heterojunctions and have been used to make devices such as light-emitting diodes, lasers, and field-effect transistors. However, crystal defects are widely reported for III-V nanowires when grown in the common out-of-plane <111>B direction. Furthermore, commercialization of nanowires has been limited by the difficulty of assembling nanowires with predetermined position and alignment on a wafer-scale. In this thesis, planar III-V nanowires are introduced as a low-defect and integratable nanotechnology building block grown with metalorganic chemical vapor deposition. Planar GaAs nanowires grown with gold seed particles self-align along the <110> direction on the (001) GaAs substrate. Transmission electron microscopy reveals that planar GaAs nanowires are nearly free of crystal defects and grow laterally and epitaxially on the substrate surface. The nanowire morphology is shown to be primarily controlled through growth temperature and an ideal growth window of 470 +\- 10 °C is identified for planar GaAs nanowires. Extension of the planar growth mode to other materials is demonstrated through growth of planar InAs nanowires. Using a sacrificial layer, the transfer of planar GaAs nanowires onto silicon substrates with control over the alignment and position is presented. A metal-semiconductor field-effect transistor fabricated with a planar GaAs nanowire shows bulk-like low-field electron transport characteristics with high mobility. The aligned planar geometry and excellent material quality of planar III-V nanowires may lead to highly integrated III-V nanophotonics and nanoelectronics.

MICROSCALE DIELECTRIC ANTI-REFLECTION COATINGS FOR PHOTOVOLTAICS

In order to power our planet for the next century, clean energy technologies need to be developed and deployed. Photovoltaic solar cells, which convert sunlight into electricity, are a clear option; however, they currently supply 0.1% of the US electricity due to the relatively high cost per Watt of generation. Thus, our goal is to create more power from a photovoltaic device, while simultaneously reducing its price. To accomplish this goal, we are creating new high efficiency anti-reflection coatings that allow more of the incident sunlight to be converted to electricity, using simple and inexpensive coating techniques that enable reduced manufacturing costs. Traditional anti-reflection coatings (consisting of thin layers of non-absorbing materials) rely on the destructive interference of the reflected light, causing more light to enter the device and subsequently get absorbed. While these coatings are used on nearly all commercial cells, they are wavelength dependent and are deposited using expensive processes that require elevated temperatures, which increase production cost and can be detrimental to some temperature sensitive solar cell materials. We are developing two new classes of anti-reflection coatings (ARCs) based on textured dielectric materials: (i) a transparent, flexible paper technology that relies on optical scattering and reduced refractive index contrast between the air and semiconductor and (ii) silicon dioxide (SiO2) nanosphere arrays that rely on collective optical resonances. Both techniques improve solar cell absorption and ultimately yield high efficiency, low cost devices. For the transparent paper-based ARCs, we have recently shown that they improve solar cell efficiencies for all angles of incident illumination reducing the need for costly tracking of the sun’s position. For a GaAs solar cell, we achieved a 24% improvement in the power conversion efficiency using this simple coating. Because the transparent paper is made from an earth abundant material (wood pulp) using an easy, inexpensive and scalable process, this type of ARC is an excellent candidate for future solar technologies. The coatings based on arrays of dielectric nanospheres also show excellent potential for inexpensive, high efficiency solar cells. The fabrication process is based on a Meyer rod rolling technique, which can be performed at room-temperature and applied to mass production, yielding a scalable and inexpensive manufacturing process. The deposited monolayer of SiO2 nanospheres, having a diameter of 500 nm on a bare Si wafer, leads to a significant increase in light absorption and a higher expected current density based on initial simulations, on the order of 15-20%. With application on a Si solar cell containing a traditional anti-reflection coating (Si3N4 thin-film), an additional increase in the spectral current density is observed, 5% beyond what a typical commercial device would achieve. Due to the coupling between the spheres originated from Whispering Gallery Modes (WGMs) inside each nanosphere, the incident light is strongly coupled into the high-index absorbing material, leading to increased light absorption. Furthermore, the SiO2 nanospheres scatter and diffract light in such a way that both the optical and electrical properties of the device have little dependence on incident angle, eliminating the need for solar tracking. Because the layer can be made with an easy, inexpensive, and scalable process, this anti-reflection coating is also an excellent candidate for replacing conventional technologies relying on complicated and expensive processes.

Effects of silicon treatment and inoculation with Fusarium oxysporum f. sp. vasinfectum on cellular defences in root tissues of two cotton cultivars

BACKGROUND AND AIMS: Silicon has been shown to enhance the resistance of plants to fungal and bacterial pathogens. Here, the effect of potassium silicate was assessed on two cotton (Gossypium hirsutum) cultivars subsequently inoculated with Fusarium oxysporum f. sp. vasinfectum (Fov). Sicot 189 is moderately resistant whilst Sicot F-1 is the second most resistant commercial cultivar presently available in Australia. METHODS: Transmission and light microscopy were used to compare cellular modifications in root cells after these different treatments. The accumulation of phenolic compounds and lignin was measured. KEY RESULTS: Cellular alterations including the deposition of electron-dense material, degradation of fungal hyphae and occlusion of endodermal cells were more rapidly induced and more intense in endodermal and vascular regions of Sicot F-1 plants supplied with potassium silicate followed by inoculation with Fov than in similarly treated Sicot 189 plants or in silicate-treated plants of either cultivar not inoculated with Fov. Significantly more phenolic compounds were present at 7 d post-infection (dpi) in root extracts of Sicot F-1 plants treated with potassium silicate followed by inoculation with Fov compared with plants from all other treatments. The lignin concentration at 3 dpi in root material from Sicot F-1 treated with potassium silicate and inoculated with Fov was significantly higher than that from water-treated and inoculated plants. CONCLUSIONS: This study demonstrates that silicon treatment can affect cellular defence responses in cotton roots subsequently inoculated with Fov, particularly in Sicot F-1, a cultivar with greater inherent resistance to this pathogen. This suggests that silicon may interact with or initiate defence pathways faster in this cultivar than in the less resistant cultivar.

Analysis methods for meso- and macroporous silicon etching baths

Analysis methods for electrochemical etching baths consisting of various concentrations of hydrofluoric acid (HF) and an additional organic surface wetting agent are presented. These electrolytes are used for the formation of meso- and macroporous silicon. Monitoring the etching bath composition requires at least one method each for the determination of the HF concentration and the organic content of the bath. However, it is a precondition that the analysis equipment withstands the aggressive HF. Titration and a fluoride ion-selective electrode are used for the determination of the HF and a cuvette test method for the analysis of the organic content, respectively. The most suitable analysis method is identified depending on the components in the electrolyte with the focus on capability of resistance against the aggressive HF.

Contactless Spectral-Dependent Measurement of Bulk Lifetime and Surface Recombination Velocity in Silicon Photovoltaic Materials

Charge carrier lifetime measurements in bulk or unfinished photovoltaic (PV) materials allow for a more accurate estimate of power conversion efficiency in completed solar cells. In this work, carrier lifetimes in PV- grade silicon wafers are obtained by way of quasi-steady state photoconductance measurements. These measurements use a contactless RF system coupled with varying narrow spectrum input LEDs, ranging in wavelength from 460 nm to 1030 nm. Spectral dependent lifetime measurements allow for determination of bulk and surface properties of the material, including the intrinsic bulk lifetime and the surface recombination velocity. The effective lifetimes are fit to an analytical physics-based model to determine the desired parameters. Passivated and non-passivated samples are both studied and are shown to have good agreement with the theoretical model.

The development of planar high-K/III-V p-channel MOSFETs for post-silicon CMOS

Conventional Si complementary-metal-oxide-semiconductor (CMOS) scaling is fast approaching its limits. The extension of the logic device roadmap for future enhancements in transistor performance requires non-Si materials and new device architectures. III-V materials, due to their superior electron transport properties, are well poised to replace Si as the channel material beyond the 10nm technology node to mitigate the performance loss of Si transistors from further reductions in supply voltage to minimise power dissipation in logic circuits. However several key challenges, including a high quality dielectric/III-V gate stack, a low-resistance source/drain (S/D) technology, heterointegration onto a Si platform and a viable III-V p-metal-oxide-semiconductor field-effect-transistor (MOSFET), need to be addressed before III-Vs can be employed in CMOS. This Thesis specifically addressed the development and demonstration of planar III-V p-MOSFETs, to complement the n-MOSFET, thereby enabling an all III-V CMOS technology to be realised. This work explored the application of InGaAs and InGaSb material systems as the channel, in conjunction with Al2O3/metal gate stacks, for p-MOSFET development based on the buried-channel flatband device architecture. The body of work undertaken comprised material development, process module development and integration into a robust fabrication flow for the demonstration of p-channel devices. The parameter space in the design of the device layer structure, based around the III-V channel/barrier material options of In_x≥0.53Ga_1-xAs/In_0.52Al_0.48As and In_x≥0.1Ga_1-xSb/AlSb, was systematically examined to improve hole channel transport. A mobility of 433 cm²/Vs, the highest room temperature hole mobility of any InGaAs quantum-well channel reported to date, was obtained for the In_0.85Ga_0.15As (2.1% strain) structure. S/D ohmic contacts were developed based on thermally annealed Au/Zn/Au metallisation and validated using transmission line model test structures. The effects of metallisation thickness, diffusion barriers and de-oxidation conditions were examined. Contacts to InGaSb-channel structures were found to be sensitive to de-oxidation conditions. A fabrication process, based on a lithographically-aligned double ohmic patterning approach, was realised for deep submicron gate-to-source/drain gap (L_side) scaling to minimise the access resistance, thereby mitigating the effects of parasitic S/D series resistance on transistor performance. The developed process yielded gaps as small as 20nm. For high-k integration on GaSb, ex-situ ammonium sulphide ((NH₄)₂S) treatments, in the range 1%-22%, for 10min at 295K were systematically explored for improving the electrical properties of the Al₂O₃/GaSb interface. Electrical and physical characterisation indicated the 1% treatment to be most effective with interface trap densities in the range of 4 - 10×10¹²cm^-2eV^-1 in the lower half of the bandgap. An extended study, comprising additional immersion times at each sulphide concentration, was further undertaken to determine the surface roughness and the etching nature of the treatments on GaSb. A number of p-MOSFETs based on III-V-channels with the most promising hole transport and integration of the developed process modules were successfully demonstrated in this work. Although the non-inverted InGaAs-channel devices showed good current modulation and switch-off characteristics, several aspects of performance were non-ideal; depletion-mode operation, modest drive current (I_d,sat=1.14mA/mm), double peaked transconductance (g_m=1.06mS/mm), high subthreshold swing (SS=301mV/dec) and high on-resistance (R_on=845kΩ.μm). Despite demonstrating substantial improvement in the on-state metrics of I_d,sat (11×), g_m (5.5×) and R_on (5.6×), inverted devices did not switch-off. Scaling gate-to-source/drain gap (L_side) from 1μm down to 70nm improved I_d,sat (72.4mA/mm) by a factor of 3.6 and gm (25.8mS/mm) by a factor of 4.1 in inverted InGaAs-channel devices. Well-controlled current modulation and good saturation behaviour was observed for InGaSb-channel devices. In the on-state In_0.3Ga_0.7Sb-channel (I_d,sat=49.4mA/mm, g_m=12.3mS/mm, R_on=31.7kΩ.μm) and In_0.4Ga_0.6Sb-channel (I_d,sat=38mA/mm, g_m=11.9mS/mm, R_on=73.5kΩ.μm) devices outperformed the InGaAs-channel devices. However the devices could not be switched off. These findings indicate that III-V p-MOSFETs based on InGaSb as opposed to InGaAs channels are more suited as the p-channel option for post-Si CMOS.

Deposition of Intrinsic a-Si:H by ECR-CVD to Passivate the Crystalline Silicon Heterointerface in HIT Solar Cells

We have deposited intrinsic amorphous silicon (a-Si:H) using the electron cyclotron resonance (ECR) chemical vapor deposition technique in order to analyze the a-Si:H/c-Si heterointerface and assess the possible application in heterojunction with intrinsic thin layer (HIT) solar cells. Physical characterization of the deposited films shows that the hydrogen content is in the 15-30% range, depending on deposition temperature. The optical bandgap value is always comprised within the range 1.9- 2.2 eV. Minority carrier lifetime measurements performed on the heterostructures reach high values up to 1.3 ms, indicating a well-passivated a-Si:H/c-Si heterointerface for deposition temperatures as low as 100°C. In addition, we prove that the metal-oxide- semiconductor conductance method to obtain interface trap distribution can be applied to the a-Si:H/c-Si heterointerface, since the intrinsic a-Si:H layer behaves as an insulator at low or negative bias. Values for the minimum of D_it as low as 8 × 10^10 cm^2 · eV^-1 were obtained for our samples, pointing to good surface passivation properties of ECR-deposited a-Si:H for HIT solar cell applications.

Limitations of high pressure sputtering for amorphous silicon deposition

Amorphous silicon thin films were deposited using the high pressure sputtering (HPS) technique to study the influence of deposition parameters on film composition, presence of impurities, atomic bonding characteristics and optical properties. An optical emission spectroscopy (OES) system has been used to identify the different species present in the plasma in order to obtain appropriate conditions to deposit high purity films. Composition measurements in agreement with the OES information showed impurities which critically depend on the deposition rate and on the gas pressure. We prove that films deposited at the highest RF power and 3.4 × 10^−2 mbar, exhibit properties as good as the ones of the films deposited by other more standard techniques.

Room temperature photo-response of titanium supersaturated silicon at energies over the bandgap

Silicon samples were implanted with high Ti doses and subsequently processed with the pulsed-laser melting technique. The electronic transport properties in the 15–300 K range and the room temperature spectral photoresponse at energies over the bandgap were measured. Samples with Ti concentration below the insulator-metal (I-M) transition limit showed a progressive reduction of the carrier lifetime in the implanted layer as Ti dose is increased. However, when the Ti concentration exceeded this limit, an extraordinary recovery of the photoresponse was measured. This result supports the theory of intermediate band materials and is of utmost relevance for photovoltaic cells and Si-based detectors.

Post-CMOS compatible high-throughput fabrication of AIN-based piezoelectric microcantilevers

A post-complementary metal oxide semiconductor (CMOS) compatible microfabrication process of piezoelectric cantilevers has been developed. The fabrication process is suitable for standard silicon technology and provides low-cost and high-throughput manufacturing. This work reports design, fabrication and characterization of piezoelectric cantilevers based on aluminum nitride (AlN) thin films synthesized at room temperature. The proposed microcantilever system is a sandwich structure composed of chromium (Cr) electrodes and a sputtered AlN film. The key issue for cantilever fabrication is the growth at room temperature of the AlN layer by reactive sputtering, making possible the innovative compatibility of piezoelectric MEMS devices with CMOS circuits already processed. AlN and Cr have been etched by inductively coupled plasma (ICP) dry etching using a BCl3–Cl2–Ar plasma chemistry. As part of the novelty of the post-CMOS micromachining process presented here, a silicon Si (1 0 0) wafer has been used as substrate as well as the sacrificial layer used to release the microcantilevers. In order to achieve this, the Si surface underneath the structure has been wet etched using an HNA (hydrofluoric acid + nitric acid + acetic acid) based solution. X-ray diffraction (XRD) characterization indicated the high crystalline quality of the AlN film. An atomic force microscope (AFM) has been used to determine the Cr electrode surface roughness. The morphology of the fabricated devices has been studied by scanning electron microscope (SEM). The cantilevers have been piezoelectrically actuated and their out-of-plane vibration modes were detected by vibrometry.

Electrical characterization of CVD diamond-n(+) silicon junctions

The electrical characteristics of CVD-diamond/n(+)-Si heterojunction devices are reported. Below 250 K the diodes show an unusual inversion of their rectification properties. This behavior is attributed to an enhanced tunneling component due to interface states, which change their occupation with the applied bias. The temperature dependence of the loss tangent shows two relaxation processes with different activation energies. These processes are likely related with two parallel charge transport mechanisms, one through the diamond grain, and the other through the grain boundary. (C) 2001 Elsevier Science B.V. Ah rights reserved.

Electrical characterization of pn-junctions of PPV and silicon

Poly(phenylene vinylene) (PPV) grown via the precursor route, deposited on top of heavily doped n-type silicon, was studied using electrical measurement techniques. The results are compared to PPV grown via deposition of soluble derivative (MEH-PPV). The two types are very similar. They have comparable free carrier densities and both show minority-carrier effects. The activation energy found via the loss tangent is 0.13 eV. The effect of exposure to oxygen is visible in the capacitance and the current.