1000 resultados para electrical switching


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A current-error space phasor based hysteresis controller with nearly constant switching frequency is proposed for a general n-level voltage source inverter fed three-phase induction motor drive. Like voltage-controlled space vector PWM (SVPWM), the proposed controller can precisely detect sub-sector changes and for switching it selects only the nearest switching voltage vectors using the information of the estimated fundamental stator voltages along α and β axes. It provides smooth transition between voltage levels, including operation in over modulation region. Due to adjacent switching amongst the nearest switching vectors forming a triangular sub-sector, in which tip of the fundamental stator voltage vector of the machine lies, switching loss is reduced while keeping the current-error space phasor within the varying parabolic boundary. Appropriate dimension and orientation of this parabolic boundary ensures similar switching frequency spectrum like constant switching frequency SVPWM-based induction motor (IM) drive. Inherent advantages of multi-level inverter and space phasor based current hysteresis controller are retained. The proposed controller is simulated as well as implemented on a 5-level inverter fed 7.5 kW open-end winding IM drive.

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Multilevel inverters with hexagonal and dodecagonal voltage space vector structures have improved harmonic profile compared to two-level inverters. Further improvement in the quality of the waveform is possible using multilevel octadecagonal (18-sided polygon) voltage space vectors. This paper proposes an inverter circuit topology capable of generating multilevel octadecagonal voltage space vectors, by cascading two asymmetric three-level inverters. By the proper selection of dc-link voltages and the resultant switching states for the inverters, voltage space vectors, whose tips lie on three concentric octadecagons, are obtained. The advantages of octadecagonal voltage space vector-based pulsewidth modulation (PWM) techniques are the complete elimination of fifth, seventh, eleventh, and thirteenth harmonics in phase voltages and the extension of linear modulation range. In this paper, a simple PWM timing calculation method is also proposed. Experimental results have been presented in this paper to validate the proposed concept.

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The paper identified and characterized a special multi-degree of freedom toggle behavior, called double toggle, observed in a typical MCCB switching mechanism. For an idealized system, the condition of toggle sequence is derived geometrically. The existing tools available in a multi-body dynamics package are used for exploring the dynamic behavior of such systems parametrically. The double toggle mechanism is found to make the system insensitive to the operator's behavior; however, the system is vulnerable under extreme usage. The linkage kinematics and stopper locations are found to have dominant role on the behavior of the system. It is revealed that the operating time is immune to the inertial property of the input link and sensitive to that of the output link. Novel designs exploiting this observation, in terms of spring and toggle placements, to enhance switching performance have also been reported in the paper. Detailed study revealed that strategic placement of the spring helps in selective alteration of system performance. Thus, the study establishes the critical importance of the kinematic design of MCCB over the dynamic parameters. (C) 2013 Elsevier Ltd. All rights reserved.

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This paper presents a multilevel inverter topology suitable for the generation of dodecagonal space vectors instead of hexagonal space vectors as in the case of conventional schemes. This feature eliminates all the 6n +/- 1 (n = odd) harmonics from the phase voltages and currents in the entire modulation range with an increase in the linear modulation range. The topology is realized by flying capacitor-based three-level inverters feeding from two ends of an open-end winding induction motor with asymmetric dc links. The flying capacitor voltages are tightly controlled throughout the modulation range using redundant switching states for any load power factor. A simple and fast carrier-based space-vector pulsewidth modulation (PWM) scheme is also proposed for the topology which utilizes only the sampled amplitudes of the reference wave for the PWM timing computation.

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Advances in technology have increased the number of cores and size of caches present on chip multicore platforms(CMPs). As a result, leakage power consumption of on-chip caches has already become a major power consuming component of the memory subsystem. We propose to reduce leakage power consumption in static nonuniform cache architecture(SNUCA) on a tiled CMP by dynamically varying the number of cache slices used and switching off unused cache slices. A cache slice in a tile includes all cache banks present in that tile. Switched-off cache slices are remapped considering the communication costs to reduce cache usage with minimal impact on execution time. This saves leakage power consumption in switched-off L2 cache slices. On an average, there map policy achieves 41% and 49% higher EDP savings compared to static and dynamic NUCA (DNUCA) cache policies on a scalable tiled CMP, respectively.

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with the development of large scale wireless networks, there has been short comings and limitations in traditional network topology management systems. In this paper, an adaptive algorithm is proposed to maintain topology of hybrid wireless superstore network by considering the transactions and individual network load. The adaptations include to choose the best network connection for the response, and to perform network Connection switching when network situation changes. At the same time, in terms of the design for topology management systems, aiming at intelligence, real-time, the study makes a step-by-step argument and research on the overall topology management scheme. Architecture for the adaptive topology management of hybrid wireless networking resources is available to user’s mobile device. Simulation results describes that the new scheme has outperformed the original topology management and it is simpler than the original rate borrowing scheme.

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The impact of chemical treatment on the surface morphology and other physical properties of tin monosulphide (SnS) thin films have been investigated. The SnS films treated with selected organic solvents exhibited strong improvement in their crystalline-quality and considerable decrease in electrical resistivity. Particularly, the films treated with chloroform showed very low electrical resistivity of similar to 5 Omega cm and a low optical band gap of 1.81 eV as compared to untreated and treated SnS films with other chemicals. From these studies we realized that the chemical treatment of SnS films has strong impact on their surface morphology and also on other physical properties. (C) 2012 Elsevier B.V. All rights reserved.

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Ceramic/Porcelain insulators are widely used in power transmission lines to provide mechanical support for High voltage conductors in addition to withstand electrical stresses. As a result of lightning, switching or temporary over voltages that could initiate flashover under worst weather conditions, and to operate within interference limits. Given that the useful life in service of the individual insulator elements making up the insulator strings is hard to predict, they must be verified periodically to ensure that adequate line reliability is maintained at all times. Over the years utilities have adopted few methods to detect defective discs in a string, subsequently replacement of the faulty discs are being carried out for smooth operation. But, if the insulator is found to be defective in a string at some location that may not create any changes in the field configuration, there is no need to replace to avoid manpower and cost of replacement. Due to deficiency of electric field data for the existing string configuration, utilities are forced to replace the discs which may not be essentially required. Hence, effort is made in the present work to simulate the potential and electric field along the normal and with faults induced discs in a string up to 765 kV system voltages using Surface Charge Simulation Method (SCSM). A comparison is made between simulated results, experimental and field data and it was found that the computed results are quite acceptable and useful.

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Space vector based PWM strategies for three-level inverters have a broader choice of switching sequences to generate the required reference vector than triangle comparison based PWM techniques. However, space vector based PWM involves numerous steps which are computationally intensive. A simplified algorithm is proposed here, which is shown to reduce the computation time significantly. The developed algorithm is used to implement synchronous and asynchronous conventional space vector PWM, synchronized modified space vector PWM and an asynchronous advanced bus-clamping PWM technique on a low-cost dsPIC digital controller. Experimental results are presented for a comparative evaluation of the performance of different PWM methods.

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Classical control and one cycle control of current are popular methods used to modulate pulses in active rectifiers for ac-dc power conversion. One cycle control has lower control complexity and can be implemented using linear analog circuits when compared with the classical approach. However, it also suffers from problems such as instability and offsets in current that is severe at light load conditions. A control strategy for bidirectional boost rectifiers based on one cycle control of charge is proposed for that overcomes these limitations. The integral of sensed current, which represents charge, is compared with a non-linear carrier, which is modified for ac-dc power conversion. This generates the gating signals for the switching devices. The modifications required for the control law governing one cycle control of charge is derived in the paper. Detailed simulation studies are carried out to compare one cycle control of current with the proposed method for ac-dc power conversion, which are validated on a laboratory hardware prototype.

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This paper presents an analysis and comparison between two circuit topologies of the 3-phase, 3-level unity power factor (Vienna) rectifier on the basis of packaging issues and semiconductor power losses. The analysis indicates the suitability of one particular circuit variant due to restrictions on switching frequency at higher power levels. A comparison is also done between hysteresis and carrier based PWM strategies for current control of the rectifier, along with experimental evaluation of the control strategies on a hardware prototype of the rectifier. The comparison indicates that the carrier based modulation strategy is better suited for use with higher order filters that are utilized in high power applications.

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In this brief, we present a physics-based solution for the temperature-dependent electrical resistance of a suspended metallic single-layer graphene (SLG) sheet under Joule self-heating. The effect of in-plane and flexural phonons on the electron scattering rates for a doped SLG layer has been considered, which particularly demonstrates the variation of the electrical resistance with increasing temperature at different current levels using the solution of the self-heating equation. The present solution agrees well with the available experimental data done with back-gate electrostatic method over a wide range of temperatures.

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A new scheme for nine-level voltage space-vector generation for medium-voltage induction motor (IM) drives with open-end stator winding is presented in this paper. The proposed nine-level power converter topology consists of two conventional three-phase two-level voltage source inverters powered by isolated dc sources and six floating-capacitor-connected H-bridges. The H-bridge capacitor voltages are effectively maintained at the required asymmetrical levels by employing a space vector modulation (SVPWM) based control strategy. An interesting feature of this topology is its ability to function in five-or three-level mode, in the entire modulation range, at full-power rating, in the event of any failure in the H-bridges. This feature significantly improves the reliability of the proposed drive system. Each leg of the three-phase two-level inverters used in this topology switches only for a half cycle of the reference voltage waveform. Hence, the effective switching frequency is reduced by half, resulting in switching loss reduction in high-voltage devices. The transient as well as the steady-state performance of the proposed nine-level inverter-fed IM drive system is experimentally verified in the entire modulation range including the overmodulation region.

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CoFe2O4 nanoparticles were prepared by solution combustion method. The nanoparticle are characterized by powder X-ray diffraction (PXRD), Fourier transform infrared spectroscopy and scanning electron microscopy (SEM). PXRD reveals single phase, cubic spinel structure with Fd (3) over barm (227) space group. SEM micrograph shows the particles are agglomerated and porous in nature. Electron paramagnetic resonance spectrum exhibits a broad resonance signal g=2.150 and is attributed to super exchange between Fe3+ and Co2+. Magnetization values of CoFe2O4 nanoparticle are lower when compared to the literature values of bulk samples. This can be attributed to the surface spin canting due to large surface-to-volume ratio for a nanoscale system. The variation of dielectric constant, dielectric loss, loss tangent and AC conductivity of as-synthesized nano CoFe2O4 particles at room temperature as a function of frequency has been studied. The magnetic and dielectric properties of the samples show that they are suitable for electronic and biomedical applications.

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Metal-oxide semiconductor capacitors based on titanium dioxide (TiO2) gate dielectrics were prepared by RF magnetron sputtering technique. The deposited films were post-annealed at temperatures in the range 773-1173 K in air for 1 hour. The effect of annealing temperature on the structural properties of TiO2 films was investigated by X-ray diffraction and Raman spectroscopy, the surface morphology was studied by atomic force microscopy (AFM) and the electrical properties of Al/TiO2/p-Si structure were measured recording capacitance-voltage and current-voltage characteristics. The as-deposited films and the films annealed at temperatures lower than 773 K formed in the anatase phase, while those annealed at temperatures higher than 973 K were made of mixtures of the rutile and anatase phases. FTIR analysis revealed that, in the case of films annealed at 1173 K, an interfacial layer had formed, thereby reducing the dielectric constant. The dielectric constant of the as-deposited films was 14 and increased from 25 to 50 with increases in the annealing temperature from 773 to 973 K. The leakage current density of as-deposited films was 1.7 x 10(-5) and decreased from 4.7 X 10(-6) to 3.5 x 10(-9) A/cm(2) with increases in the annealing temperature from 773 to 1173 K. The electrical conduction in the Al/TiO2/p-Si structures was studied on the basis of the plots of Schottky emission, Poole-Frenkel emission and Fowler-Nordheim tunnelling. The effect of structural changes on the current-voltage and capacitance-voltage characteristics of Al/TiO2/p-Si capacitors was also discussed.