Parameter space of experimental chaotic circuits with high-precision control parameters

The authors thank Professor Iber^e Luiz Caldas for the suggestions and encouragement. The authors F.F.G.d.S., R.M.R., J.C.S., and H.A.A. acknowledge the Brazilian agency CNPq and state agencies FAPEMIG, FAPESP, and FAPESC, and M.S.B. also acknowledges the EPSRC Grant Ref. No. EP/I032606/1.

Investigating the encoding of visual stimuli by forming neural circuits in the cat primary visual cortex

Contexte La connectomique, ou la cartographie des connexions neuronales, est un champ de recherche des neurosciences évoluant rapidement, promettant des avancées majeures en ce qui concerne la compréhension du fonctionnement cérébral. La formation de circuits neuronaux en réponse à des stimuli environnementaux est une propriété émergente du cerveau. Cependant, la connaissance que nous avons de la nature précise de ces réseaux est encore limitée. Au niveau du cortex visuel, qui est l’aire cérébrale la plus étudiée, la manière dont les informations se transmettent de neurone en neurone est une question qui reste encore inexplorée. Cela nous invite à étudier l’émergence des microcircuits en réponse aux stimuli visuels. Autrement dit, comment l’interaction entre un stimulus et une assemblée cellulaire est-elle mise en place et modulée? Méthodes En réponse à la présentation de grilles sinusoïdales en mouvement, des ensembles neuronaux ont été enregistrés dans la couche II/III (aire 17) du cortex visuel primaire de chats anesthésiés, à l’aide de multi-électrodes en tungstène. Des corrélations croisées ont été effectuées entre l’activité de chacun des neurones enregistrés simultanément pour mettre en évidence les liens fonctionnels de quasi-synchronie (fenêtre de ± 5 ms sur les corrélogrammes croisés corrigés). Ces liens fonctionnels dévoilés indiquent des connexions synaptiques putatives entre les neurones. Par la suite, les histogrammes peri-stimulus (PSTH) des neurones ont été comparés afin de mettre en évidence la collaboration synergique temporelle dans les réseaux fonctionnels révélés. Enfin, des spectrogrammes dépendants du taux de décharges entre neurones ou stimulus-dépendants ont été calculés pour observer les oscillations gamma dans les microcircuits émergents. Un indice de corrélation (Rsc) a également été calculé pour les neurones connectés et non connectés. Résultats Les neurones liés fonctionnellement ont une activité accrue durant une période de 50 ms contrairement aux neurones fonctionnellement non connectés. Cela suggère que les connexions entre neurones mènent à une synergie de leur inter-excitabilité. En outre, l’analyse du spectrogramme dépendant du taux de décharge entre neurones révèle que les neurones connectés ont une plus forte activité gamma que les neurones non connectés durant une fenêtre d’opportunité de 50ms. L’activité gamma de basse-fréquence (20-40 Hz) a été associée aux neurones à décharge régulière (RS) et l’activité de haute fréquence (60-80 Hz) aux neurones à décharge rapide (FS). Aussi, les neurones fonctionnellement connectés ont systématiquement un Rsc plus élevé que les neurones non connectés. Finalement, l’analyse des corrélogrammes croisés révèle que dans une assemblée neuronale, le réseau fonctionnel change selon l’orientation de la grille. Nous démontrons ainsi que l’intensité des relations fonctionnelles dépend de l’orientation de la grille sinusoïdale. Cette relation nous a amené à proposer l’hypothèse suivante : outre la sélectivité des neurones aux caractères spécifiques du stimulus, il y a aussi une sélectivité du connectome. En bref, les réseaux fonctionnels «signature » sont activés dans une assemblée qui est strictement associée à l’orientation présentée et plus généralement aux propriétés des stimuli. Conclusion Cette étude souligne le fait que l’assemblée cellulaire, plutôt que le neurone, est l'unité fonctionnelle fondamentale du cerveau. Cela dilue l'importance du travail isolé de chaque neurone, c’est à dire le paradigme classique du taux de décharge qui a été traditionnellement utilisé pour étudier l'encodage des stimuli. Cette étude contribue aussi à faire avancer le débat sur les oscillations gamma, en ce qu'elles surviennent systématiquement entre neurones connectés dans les assemblées, en conséquence d’un ajout de cohérence. Bien que la taille des assemblées enregistrées soit relativement faible, cette étude suggère néanmoins une intrigante spécificité fonctionnelle entre neurones interagissant dans une assemblée en réponse à une stimulation visuelle. Cette étude peut être considérée comme une prémisse à la modélisation informatique à grande échelle de connectomes fonctionnels.

Organisation et réorganisation post-lésionnelle des circuits neuronaux permettant l'accès au lexique : l'apport de la connectivité effective

Thèse numérisée par la Direction des bibliothèques de l'Université de Montréal.

Testing of Interposer-Based 2.5D Integrated Circuits

The unprecedented and relentless growth in the electronics industry is feeding the demand for integrated circuits (ICs) with increasing functionality and performance at minimum cost and power consumption. As predicted by Moore's law, ICs are being aggressively scaled to meet this demand. While the continuous scaling of process technology is reducing gate delays, the performance of ICs is being increasingly dominated by interconnect delays. In an effort to improve submicrometer interconnect performance, to increase packing density, and to reduce chip area and power consumption, the semiconductor industry is focusing on three-dimensional (3D) integration. However, volume production and commercial exploitation of 3D integration are not feasible yet due to significant technical hurdles.

At the present time, interposer-based 2.5D integration is emerging as a precursor to stacked 3D integration. All the dies and the interposer in a 2.5D IC must be adequately tested for product qualification. However, since the structure of 2.5D ICs is different from the traditional 2D ICs, new challenges have emerged: (1) pre-bond interposer testing, (2) lack of test access, (3) limited ability for at-speed testing, (4) high density I/O ports and interconnects, (5) reduced number of test pins, and (6) high power consumption. This research targets the above challenges and effective solutions have been developed to test both dies and the interposer.

The dissertation first introduces the basic concepts of 3D ICs and 2.5D ICs. Prior work on testing of 2.5D ICs is studied. An efficient method is presented to locate defects in a passive interposer before stacking. The proposed test architecture uses e-fuses that can be programmed to connect or disconnect functional paths inside the interposer. The concept of a die footprint is utilized for interconnect testing, and the overall assembly and test flow is described. Moreover, the concept of weighted critical area is defined and utilized to reduce test time. In order to fully determine the location of each e-fuse and the order of functional interconnects in a test path, we also present a test-path design algorithm. The proposed algorithm can generate all test paths for interconnect testing.

In order to test for opens, shorts, and interconnect delay defects in the interposer, a test architecture is proposed that is fully compatible with the IEEE 1149.1 standard and relies on an enhancement of the standard test access port (TAP) controller. To reduce test cost, a test-path design and scheduling technique is also presented that minimizes a composite cost function based on test time and the design-for-test (DfT) overhead in terms of additional through silicon vias (TSVs) and micro-bumps needed for test access. The locations of the dies on the interposer are taken into consideration in order to determine the order of dies in a test path.

To address the scenario of high density of I/O ports and interconnects, an efficient built-in self-test (BIST) technique is presented that targets the dies and the interposer interconnects. The proposed BIST architecture can be enabled by the standard TAP controller in the IEEE 1149.1 standard. The area overhead introduced by this BIST architecture is negligible; it includes two simple BIST controllers, a linear-feedback-shift-register (LFSR), a multiple-input-signature-register (MISR), and some extensions to the boundary-scan cells in the dies on the interposer. With these extensions, all boundary-scan cells can be used for self-configuration and self-diagnosis during interconnect testing. To reduce the overall test cost, a test scheduling and optimization technique under power constraints is described.

In order to accomplish testing with a small number test pins, the dissertation presents two efficient ExTest scheduling strategies that implements interconnect testing between tiles inside an system on chip (SoC) die on the interposer while satisfying the practical constraint that the number of required test pins cannot exceed the number of available pins at the chip level. The tiles in the SoC are divided into groups based on the manner in which they are interconnected. In order to minimize the test time, two optimization solutions are introduced. The first solution minimizes the number of input test pins, and the second solution minimizes the number output test pins. In addition, two subgroup configuration methods are further proposed to generate subgroups inside each test group.

Finally, the dissertation presents a programmable method for shift-clock stagger assignment to reduce power supply noise during SoC die testing in 2.5D ICs. An SoC die in the 2.5D IC is typically composed of several blocks and two neighboring blocks that share the same power rails should not be toggled at the same time during shift. Therefore, the proposed programmable method does not assign the same stagger value to neighboring blocks. The positions of all blocks are first analyzed and the shared boundary length between blocks is then calculated. Based on the position relationships between the blocks, a mathematical model is presented to derive optimal result for small-to-medium sized problems. For larger designs, a heuristic algorithm is proposed and evaluated.

In summary, the dissertation targets important design and optimization problems related to testing of interposer-based 2.5D ICs. The proposed research has led to theoretical insights, experiment results, and a set of test and design-for-test methods to make testing effective and feasible from a cost perspective.

Investigation of electrically active defects at the interface of high-k dielectrics and compound semiconductors

As silicon based devices in integrated circuits reach the fundamental limits of dimensional scaling there is growing research interest in the use of high electron mobility channel materials, such as indium gallium arsenide (InGaAs), in conjunction with high dielectric constant (high-k) gate oxides, for Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) based devices. The motivation for employing high mobility channel materials is to reduce power dissipation in integrated circuits while also providing improved performance. One of the primary challenges to date in the field of III-V semiconductors has been the observation of high levels of defect densities at the high-k/III-V interface, which prevents surface inversion of the semiconductor. The work presented in this PhD thesis details the characterization of MOS devices incorporating high-k dielectrics on III-V semiconductors. The analysis examines the effect of modifying the semiconductor bandgap in MOS structures incorporating InxGa1-xAs (x: 0, 0.15. 0.3, 0.53) layers, the optimization of device passivation procedures designed to reduce interface defect densities, and analysis of such electrically active interface defect states for the high-k/InGaAs system. Devices are characterized primarily through capacitance-voltage (CV) and conductance-voltage (GV) measurements of MOS structures both as a function of frequency and temperature. In particular, the density of electrically active interface states was reduced to the level which allowed the observation of true surface inversion behavior in the In0.53Ga0.47As MOS system. This was achieved by developing an optimized (NH4)2S passivation, minimized air exposure, and atomic layer deposition of an Al2O3 gate oxide. An extraction of activation energies allows discrimination of the mechanisms responsible for the inversion response. Finally a new approach is described to determine the minority carrier generation lifetime and the oxide capacitance in MOS structures. The method is demonstrated for an In0.53Ga0.47As system, but is generally applicable to any MOS structure exhibiting a minority carrier response in inversion.

Circuits for presaccadic remapping

Saccadic eye movements rapidly displace the image of the world that is projected onto the retinas. In anticipation of each saccade, many neurons in the visual system shift their receptive fields. This presaccadic change in visual sensitivity, known as remapping, was first documented in the parietal cortex and has been studied in many other brain regions. Remapping requires information about upcoming saccades via corollary discharge. Analyses of neurons in a corollary discharge pathway that targets the frontal eye field (FEF) suggest that remapping may be assembled in the FEF’s local microcircuitry. Complementary data from reversible inactivation, neural recording, and modeling studies provide evidence that remapping contributes to transsaccadic continuity of action and perception. Multiple forms of remapping have been reported in the FEF and other brain areas, however, and questions remain about reasons for these differences. In this review of recent progress, we identify three hypotheses that may help to guide further investigations into the structure and function of circuits for remapping.

Circuits for Presaccadic Visual Remapping.

Saccadic eye movements rapidly displace the image of the world that is projected onto the retinas. In anticipation of each saccade, many neurons in the visual system shift their receptive fields. This presaccadic change in visual sensitivity, known as remapping, was first documented in the parietal cortex and has been studied in many other brain regions. Remapping requires information about upcoming saccades via corollary discharge. Analyses of neurons in a corollary discharge pathway that targets the frontal eye field (FEF) suggest that remapping may be assembled in the FEF's local microcircuitry. Complementary data from reversible inactivation, neural recording, and modeling studies provide evidence that remapping contributes to transsaccadic continuity of action and perception. Multiple forms of remapping have been reported in the FEF and other brain areas, however, and questions remain about reasons for these differences. In this review of recent progress, we identify three hypotheses that may help to guide further investigations into the structure and function of circuits for remapping.

Resonance Energy Transfer-Based Molecular Switch Designed Using a Systematic Design Process Based on Monte Carlo Methods and Markov Chains

A RET network consists of a network of photo-active molecules called chromophores that can participate in inter-molecular energy transfer called resonance energy transfer (RET). RET networks are used in a variety of applications including cryptographic devices, storage systems, light harvesting complexes, biological sensors, and molecular rulers. In this dissertation, we focus on creating a RET device called closed-diffusive exciton valve (C-DEV) in which the input to output transfer function is controlled by an external energy source, similar to a semiconductor transistor like the MOSFET. Due to their biocompatibility, molecular devices like the C-DEVs can be used to introduce computing power in biological, organic, and aqueous environments such as living cells. Furthermore, the underlying physics in RET devices are stochastic in nature, making them suitable for stochastic computing in which true random distribution generation is critical.

In order to determine a valid configuration of chromophores for the C-DEV, we developed a systematic process based on user-guided design space pruning techniques and built-in simulation tools. We show that our C-DEV is 15x better than C-DEVs designed using ad hoc methods that rely on limited data from prior experiments. We also show ways in which the C-DEV can be improved further and how different varieties of C-DEVs can be combined to form more complex logic circuits. Moreover, the systematic design process can be used to search for valid chromophore network configurations for a variety of RET applications.

We also describe a feasibility study for a technique used to control the orientation of chromophores attached to DNA. Being able to control the orientation can expand the design space for RET networks because it provides another parameter to tune their collective behavior. While results showed limited control over orientation, the analysis required the development of a mathematical model that can be used to determine the distribution of dipoles in a given sample of chromophore constructs. The model can be used to evaluate the feasibility of other potential orientation control techniques.

Investigating the encoding of visual stimuli by forming neural circuits in the cat primary visual cortex

Contexte La connectomique, ou la cartographie des connexions neuronales, est un champ de recherche des neurosciences évoluant rapidement, promettant des avancées majeures en ce qui concerne la compréhension du fonctionnement cérébral. La formation de circuits neuronaux en réponse à des stimuli environnementaux est une propriété émergente du cerveau. Cependant, la connaissance que nous avons de la nature précise de ces réseaux est encore limitée. Au niveau du cortex visuel, qui est l’aire cérébrale la plus étudiée, la manière dont les informations se transmettent de neurone en neurone est une question qui reste encore inexplorée. Cela nous invite à étudier l’émergence des microcircuits en réponse aux stimuli visuels. Autrement dit, comment l’interaction entre un stimulus et une assemblée cellulaire est-elle mise en place et modulée? Méthodes En réponse à la présentation de grilles sinusoïdales en mouvement, des ensembles neuronaux ont été enregistrés dans la couche II/III (aire 17) du cortex visuel primaire de chats anesthésiés, à l’aide de multi-électrodes en tungstène. Des corrélations croisées ont été effectuées entre l’activité de chacun des neurones enregistrés simultanément pour mettre en évidence les liens fonctionnels de quasi-synchronie (fenêtre de ± 5 ms sur les corrélogrammes croisés corrigés). Ces liens fonctionnels dévoilés indiquent des connexions synaptiques putatives entre les neurones. Par la suite, les histogrammes peri-stimulus (PSTH) des neurones ont été comparés afin de mettre en évidence la collaboration synergique temporelle dans les réseaux fonctionnels révélés. Enfin, des spectrogrammes dépendants du taux de décharges entre neurones ou stimulus-dépendants ont été calculés pour observer les oscillations gamma dans les microcircuits émergents. Un indice de corrélation (Rsc) a également été calculé pour les neurones connectés et non connectés. Résultats Les neurones liés fonctionnellement ont une activité accrue durant une période de 50 ms contrairement aux neurones fonctionnellement non connectés. Cela suggère que les connexions entre neurones mènent à une synergie de leur inter-excitabilité. En outre, l’analyse du spectrogramme dépendant du taux de décharge entre neurones révèle que les neurones connectés ont une plus forte activité gamma que les neurones non connectés durant une fenêtre d’opportunité de 50ms. L’activité gamma de basse-fréquence (20-40 Hz) a été associée aux neurones à décharge régulière (RS) et l’activité de haute fréquence (60-80 Hz) aux neurones à décharge rapide (FS). Aussi, les neurones fonctionnellement connectés ont systématiquement un Rsc plus élevé que les neurones non connectés. Finalement, l’analyse des corrélogrammes croisés révèle que dans une assemblée neuronale, le réseau fonctionnel change selon l’orientation de la grille. Nous démontrons ainsi que l’intensité des relations fonctionnelles dépend de l’orientation de la grille sinusoïdale. Cette relation nous a amené à proposer l’hypothèse suivante : outre la sélectivité des neurones aux caractères spécifiques du stimulus, il y a aussi une sélectivité du connectome. En bref, les réseaux fonctionnels «signature » sont activés dans une assemblée qui est strictement associée à l’orientation présentée et plus généralement aux propriétés des stimuli. Conclusion Cette étude souligne le fait que l’assemblée cellulaire, plutôt que le neurone, est l'unité fonctionnelle fondamentale du cerveau. Cela dilue l'importance du travail isolé de chaque neurone, c’est à dire le paradigme classique du taux de décharge qui a été traditionnellement utilisé pour étudier l'encodage des stimuli. Cette étude contribue aussi à faire avancer le débat sur les oscillations gamma, en ce qu'elles surviennent systématiquement entre neurones connectés dans les assemblées, en conséquence d’un ajout de cohérence. Bien que la taille des assemblées enregistrées soit relativement faible, cette étude suggère néanmoins une intrigante spécificité fonctionnelle entre neurones interagissant dans une assemblée en réponse à une stimulation visuelle. Cette étude peut être considérée comme une prémisse à la modélisation informatique à grande échelle de connectomes fonctionnels.

Organisation et réorganisation post-lésionnelle des circuits neuronaux permettant l'accès au lexique : l'apport de la connectivité effective

Thèse numérisée par la Direction des bibliothèques de l'Université de Montréal.

Rethinking Care Through Social Reproduction: Articulating Circuits of Migration

Care has come to dominate much feminist research on globalized migrations and the transfer of labor from the South to the North, while the older concept of reproduction had been pushed into the background but is now becoming the subject of debates on the commodification of care in the household and changes in welfare state policies. This article argues that we could achieve a better understanding of the different modalities and trajectories of care in the reproduction of individuals, families, and communities, both of migrant and nonmigrant populations by articulating the diverse circuits of migration, in particular that of labor and the family. In doing this, I go back to the earlier North American writing on racialized minorities and migrants and stratified social reproduction. I also explore insights from current Asian studies of gendered circuits of migration connecting labor and marriage migrations as well as the notion of global householding that highlights the gender politics of social reproduction operating within and beyond households in institutional and welfare architectures. In contrast to Asia, there has relatively been little exploration in European studies of the articulation of labor and family migrations through the lens of social reproduction. However, connecting the different types of migration enables us to achieve a more complex understanding of care trajectories and their contribution to social reproduction.

High-Performance WSe2 CMOS Technology and Integrated Circuits.

Because of their extraordinary structural and electrical properties, two dimensional materials are currently being pursued for applications such as thin-film transistors and integrated circuit. One of the main challenges that still needs to be overcome for these applications is the fabrication of air-stable transistors with industry-compatible complementary metal oxide semiconductor (CMOS) technology. In this work, we experimentally demonstrate a novel high performance air-stable WSe2 CMOS technology with almost ideal voltage transfer characteristic, full logic swing and high noise margin with different supply voltages. More importantly, the inverter shows large voltage gain (~38) and small static power (Pico-Watts), paving the way for low power electronic system in 2D materials.

Graphene-MoS2 Hybrid Technology for Large-Scale Two-Dimensional Electronics

Two-dimensional (2D) materials have generated great interest in the last few years as a new toolbox for electronics. This family of materials includes, among others, metallic graphene, semiconducting transition metal dichalcogenides (such as MoS2) and insulating Boron Nitride. These materials and their heterostructures offer excellent mechanical flexibility, optical transparency and favorable transport properties for realizing electronic, sensing and optical systems on arbitrary surfaces. In this work, we develop several etch stop layer technologies that allow the fabrication of complex 2D devices and present for the first time the large scale integration of graphene with molybdenum disulfide (MoS2) , both grown using the fully scalable CVD technique. Transistor devices and logic circuits with MoS2 channel and graphene as contacts and interconnects are constructed and show high performances. In addition, the graphene/MoS2 heterojunction contact has been systematically compared with MoS2-metal junctions experimentally and studied using density functional theory. The tunability of the graphene work function significantly improves the ohmic contact to MoS2. These high-performance large-scale devices and circuits based on 2D heterostructure pave the way for practical flexible transparent electronics in the future. The authors acknowledge financial support from the Office of Naval Research (ONR) Young Investigator Program, the ONR GATE MURI program, and the Army Research Laboratory. This research has made use of the MI.

Microwave Plasma Assisted ALD Development for the Deposition of Gate Oxides & ALD of High-k Dielectrics

The semiconductor industry's urge towards faster, smaller and cheaper integrated circuits has lead the industry to smaller node devices. The integrated circuits that are now under volume production belong to 22 nm and 14 nm technology nodes. In 2007 the 45 nm technology came with the revolutionary high- /metal gate structure. 22 nm technology utilizes fully depleted tri-gate transistor structure. The 14 nm technology is a continuation of the 22 nm technology. Intel is using second generation tri-gate technology in 14 nm devices. After 14 nm, the semiconductor industry is expected to continue the scaling with 10 nm devices followed by 7 nm. Recently, IBM has announced successful production of 7 nm node test chips. This is the fashion how nanoelectronics industry is proceeding with its scaling trend. For the present node of technologies selective deposition and selective removal of the materials are required. Atomic layer deposition and the atomic layer etching are the respective techniques used for selective deposition and selective removal. Atomic layer deposition still remains as a futuristic manufacturing approach that deposits materials and lms in exact places. In addition to the nano/microelectronics industry, ALD is also widening its application areas and acceptance. The usage of ALD equipments in industry exhibits a diversi cation trend. With this trend, large area, batch processing, particle ALD and plasma enhanced like ALD equipments are becoming prominent in industrial applications. In this work, the development of an atomic layer deposition tool with microwave plasma capability is described, which is a ordable even for lightly funded research labs.