Diui Bernardi Abbatis Clareuallis, ordinis Cisterciensis ... Opera omnia diuinæ institutionis resertissima, accuratiore iam denuo censura recognita ac reposita ...

Imp. tomado del colofón

Hierarchy v typology of evidence

Hierarchy v typology of evidence animation

Concise Encyclopaedia of Philosophy of Language, ed. P.V. Lamarque, Pergamon 1997, ISBN: 978-0080429915 and, Readings in the Philosophy of Language, ed. P. Ludlow, The MIT Press, 1997, ISBN: 978-0262621144 [Book review]

Abstract not available

Modelling turbulent flow dynamics in AC magnetic field

Abstract not available

Spectroscopic constants and term values for the X2πi state of OH (v = 0-10)

info:eu-repo/semantics/published

A III-V channel field effect transistor for non-classical CMOS: process optimisation for improved gate stack function

This thesis describes a collection of studies into the electrical response of a III-V MOS stack comprising metal/GaGdO/GaAs layers as a function of fabrication process variables and the findings of those studies. As a result of this work, areas of improvement in the gate process module of a III-V heterostructure MOSFET were identified. Compared to traditional bulk silicon MOSFET design, one featuring a III-V channel heterostructure with a high-dielectric-constant oxide as the gate insulator provides numerous benefits, for example: the insulator can be made thicker for the same capacitance, the operating voltage can be made lower for the same current output, and improved output characteristics can be achieved without reducing the channel length further. It is known that transistors composed of III-V materials are most susceptible to damage induced by radiation and plasma processing. These devices utilise sub-10 nm gate dielectric films, which are prone to contamination, degradation and damage. Therefore, throughout the course of this work, process damage and contamination issues, as well as various techniques to mitigate or prevent those have been investigated through comparative studies of III-V MOS capacitors and transistors comprising various forms of metal gates, various thicknesses of GaGdO dielectric, and a number of GaAs-based semiconductor layer structures. Transistors which were fabricated before this work commenced, showed problems with threshold voltage control. Specifically, MOSFETs designed for normally-off (VTH > 0) operation exhibited below-zero threshold voltages. With the results obtained during this work, it was possible to gain an understanding of why the transistor threshold voltage shifts as the gate length decreases and of what pulls the threshold voltage downwards preventing normally-off device operation. Two main culprits for the negative VTH shift were found. The first was radiation damage induced by the gate metal deposition process, which can be prevented by slowing down the deposition rate. The second was the layer of gold added on top of platinum in the gate metal stack which reduces the effective work function of the whole gate due to its electronegativity properties. Since the device was designed for a platinum-only gate, this could explain the below zero VTH. This could be prevented either by using a platinum-only gate, or by matching the layer structure design and the actual gate metal used for the future devices. Post-metallisation thermal anneal was shown to mitigate both these effects. However, if post-metallisation annealing is used, care should be taken to ensure it is performed before the ohmic contacts are formed as the thermal treatment was shown to degrade the source/drain contacts. In addition, the programme of studies this thesis describes, also found that if the gate contact is deposited before the source/drain contacts, it causes a shift in threshold voltage towards negative values as the gate length decreases, because the ohmic contact anneal process affects the properties of the underlying material differently depending on whether it is covered with the gate metal or not. In terms of surface contamination; this work found that it causes device-to-device parameter variation, and a plasma clean is therefore essential. This work also demonstrated that the parasitic capacitances in the system, namely the contact periphery dependent gate-ohmic capacitance, plays a significant role in the total gate capacitance. This is true to such an extent that reducing the distance between the gate and the source/drain ohmic contacts in the device would help with shifting the threshold voltages closely towards the designed values. The findings made available by the collection of experiments performed for this work have two major applications. Firstly, these findings provide useful data in the study of the possible phenomena taking place inside the metal/GaGdO/GaAs layers and interfaces as the result of chemical processes applied to it. In addition, these findings allow recommendations as to how to best approach fabrication of devices utilising these layers.

The development of planar high-K/III-V p-channel MOSFETs for post-silicon CMOS

Conventional Si complementary-metal-oxide-semiconductor (CMOS) scaling is fast approaching its limits. The extension of the logic device roadmap for future enhancements in transistor performance requires non-Si materials and new device architectures. III-V materials, due to their superior electron transport properties, are well poised to replace Si as the channel material beyond the 10nm technology node to mitigate the performance loss of Si transistors from further reductions in supply voltage to minimise power dissipation in logic circuits. However several key challenges, including a high quality dielectric/III-V gate stack, a low-resistance source/drain (S/D) technology, heterointegration onto a Si platform and a viable III-V p-metal-oxide-semiconductor field-effect-transistor (MOSFET), need to be addressed before III-Vs can be employed in CMOS. This Thesis specifically addressed the development and demonstration of planar III-V p-MOSFETs, to complement the n-MOSFET, thereby enabling an all III-V CMOS technology to be realised. This work explored the application of InGaAs and InGaSb material systems as the channel, in conjunction with Al2O3/metal gate stacks, for p-MOSFET development based on the buried-channel flatband device architecture. The body of work undertaken comprised material development, process module development and integration into a robust fabrication flow for the demonstration of p-channel devices. The parameter space in the design of the device layer structure, based around the III-V channel/barrier material options of In<sub>x≥0.53sub>Ga<sub>1-xsub>As/In<sub>0.52sub>Al<sub>0.48sub>As and In<sub>x≥0.1sub>Ga<sub>1-xsub>Sb/AlSb, was systematically examined to improve hole channel transport. A mobility of 433 cm<sup>2sup>/Vs, the highest room temperature hole mobility of any InGaAs quantum-well channel reported to date, was obtained for the In<sub>0.85sub>Ga<sub>0.15sub>As (2.1% strain) structure. S/D ohmic contacts were developed based on thermally annealed Au/Zn/Au metallisation and validated using transmission line model test structures. The effects of metallisation thickness, diffusion barriers and de-oxidation conditions were examined. Contacts to InGaSb-channel structures were found to be sensitive to de-oxidation conditions. A fabrication process, based on a lithographically-aligned double ohmic patterning approach, was realised for deep submicron gate-to-source/drain gap (L<sub>sidesub>) scaling to minimise the access resistance, thereby mitigating the effects of parasitic S/D series resistance on transistor performance. The developed process yielded gaps as small as 20nm. For high-k integration on GaSb, ex-situ ammonium sulphide ((NH<sub>4sub>)<sub>2sub>S) treatments, in the range 1%-22%, for 10min at 295K were systematically explored for improving the electrical properties of the Al<sub>2sub>O<sub>3sub>/GaSb interface. Electrical and physical characterisation indicated the 1% treatment to be most effective with interface trap densities in the range of 4 - 10×10<sup>12sup>cm<sup>-2sup>eV<sup>-1sup> in the lower half of the bandgap. An extended study, comprising additional immersion times at each sulphide concentration, was further undertaken to determine the surface roughness and the etching nature of the treatments on GaSb. A number of p-MOSFETs based on III-V-channels with the most promising hole transport and integration of the developed process modules were successfully demonstrated in this work. Although the non-inverted InGaAs-channel devices showed good current modulation and switch-off characteristics, several aspects of performance were non-ideal; depletion-mode operation, modest drive current (I<sub>d,satsub>=1.14mA/mm), double peaked transconductance (g<sub>msub>=1.06mS/mm), high subthreshold swing (SS=301mV/dec) and high on-resistance (R<sub>onsub>=845kΩ.μm). Despite demonstrating substantial improvement in the on-state metrics of I<sub>d,satsub> (11×), g<sub>msub> (5.5×) and R<sub>onsub> (5.6×), inverted devices did not switch-off. Scaling gate-to-source/drain gap (L<sub>sidesub>) from 1μm down to 70nm improved I<sub>d,satsub> (72.4mA/mm) by a factor of 3.6 and gm (25.8mS/mm) by a factor of 4.1 in inverted InGaAs-channel devices. Well-controlled current modulation and good saturation behaviour was observed for InGaSb-channel devices. In the on-state In<sub>0.3sub>Ga<sub>0.7sub>Sb-channel (I<sub>d,satsub>=49.4mA/mm, g<sub>msub>=12.3mS/mm, R<sub>onsub>=31.7kΩ.μm) and In<sub>0.4sub>Ga<sub>0.6sub>Sb-channel (I<sub>d,satsub>=38mA/mm, g<sub>msub>=11.9mS/mm, R<sub>onsub>=73.5kΩ.μm) devices outperformed the InGaAs-channel devices. However the devices could not be switched off. These findings indicate that III-V p-MOSFETs based on InGaSb as opposed to InGaAs channels are more suited as the p-channel option for post-Si CMOS.

Aporte de la Escuela de Bibliotecología, Documentación e Información al V Encuentro Nacional de Investigadores en Educación - Heredia, 1989. "Bases de Datos y Bibliografías Especializadas en Educación"

La Escuela de Bibliotecologia, Documentación e Información, se siente muy complacida de participar en este V ENCUENTRO DE INVESTIGADORES EN EDUCACION.El aporte que la Escuela quiere brindar es sobre las fuentes de información en educación y las nuevas tecnologías que el país tiene para accesar información relevante y pertinente sobre el tema.

V ENCUENTRO INTERNACIONAL DE ECONOMISTAS SOBRE GLOBALIZACIÓN Y PROBLEMAS DEL DESARROLLO

Este año se conmemora el 150 Aniversario del natalicio de uno de los grandes pensadores que ha trascendido sus tiempos, Jos�� Martí. En justo honor a él iniciamos nuestra relatoría del V Encuentro Internacional sobre Globalización y Problemas del Desarrollo con dos de sus bellos aforismos: Patria es Humanidad. Y decía también: “el AMOR a la Patria no es el amor ridículo a la tierra, ni a las yerbas que pisan nuestras plantas, es el odio invencible a quien la oprime, es el rencor eterno a quien la ataca."”Entre el 10 y el 14 de febrero, los más de 1500 participantes en este evento, procedentes de 41 países, han enaltecido el AMOR que les inspira la Patria Grande, participando en intensas jornadas de análisis y reflexión que fortalecen las convicciones y compromisos colectivos a favor de una Globalización alternativa, porque la actual, oprime y ataca a la Humanidad.

CAPITULO V: PROMOCIÓN DE EXPORTACIONES Y ATRACCIÓN DE INVERSIONES: HACIA UN SISTEMA NACIONAL DE INNOVACIÓN

A partir de los años ochenta Costa Rica adoptó una estrategia de desarrollo económico cuyo eje central consistió en dirigir los esfuerzos institucionales en favor de tres elementos básicos: crecimiento exportador, desgravación arancelaria y atracción de inversión extranjera directa -IED-, razón por la cual este modelo es llamado de “Orientación hacia Afuera”.En materia de Promoción de Exportaciones, el Estado impuls�� una serie de importantes políticas con dos objetivos básicos: a) diversificar la oferta exportable nacional, y b) incrementar los mercados de destino de tales exportaciones, con la meta de disminuir la alta dependencia nacional de unos pocos bienes de exportación (tradicionalmente café, banano, carne, azúcar), y que dichas actividades se convirtieran en el motor del crecimiento de la producción, amén de otros resultados positivos esperados en materia de empleo, salarios, productividad y generación de divisas. El desempeño exportador ha sido impresionante, con un importante crecimiento promedio del 16,3% anual entre 1991 y 1998, siendo este último el año de mayor incremento de la década (un 34%), lo que refleja el impacto de la compañía Intel en las exportaciones

Asociación Latinoamericana y del Caribe en Economía Agrícola, V Congreso Internacional, “La transformación de la empresa en la agricultura”

Introducción Los trabajos se focalizaron en los problemas medulares de la agricultura, aspectos en lso cuales las relaciones entre la agricultura, economía y comercio internacional son fundamentales. Se desprende de las presentaciones que los desafíos de construir una nueva base institucional para apoyar el proceso de transformación  de la agricultura son demasiado evidentes como para continuar relegados; esa construcción se hace aun más necesaria cuando se plantea la importancia de incorporar en los procesos productivos las exigencias de carácter ambiental para generar productos más limpios y fortalecer la capacidad competitiva en los mercados internacionales y el los latinoamericanos y caribeños.

Electrical AC behaviour of MPCVD diamond Schottky diodes

The present work reports some experimental results on the electrical AC behaviour of metal-undoped diamond Schottky diodes fabricated with a free-standing MPCVD diamond film (5 mum thick). The metals are gold for the ohmic contact and aluminium for the rectifier. The capacitance and loss tangent vs, frequency shows that capacitance presents a relaxation maximum at frequencies near 10 kHz at room temperature. Although the simple model (small equivalent circuit) can justify the values for the relaxation, it cannot justify the departure from the Debye model, also verified in the Cole-Cole plot. Taking into account the existence of traps in the depletion region, a best fit to the experimental results was obtained. The difference between the Fermi level and the band edge of 0.2-0.3 eV is in agreement with the activation energy found from the loss tangent analysis. The capacitance with applied voltage (Mott-Schottky plots) gives a defect density of 10(16) cm(-3) with contact potentials near 0.5 V and the profile of defect density obtained shows a major density (approx. 10(17) cm(-3)) in a layer with a thickness less than 50 nm from the junction, decreasing by one order of magnitude with increasing distance. Finally a structural model is proposed to explain the AC behaviour found. (C) 2001 Elsevier Science B.V. All rights reserved.

Comportamento produtivo de cultivares de sorgo sacarino em Rio Branco-AC.

Visando avaliar a potencialidade da cultura, bem como estudar o comportamento produtivo de cultivares de sorgo na microrregião do Alto Purus, conduziu-se, no ano agrícola de 1983/84, na Fazenda Experimental da Embrapa, em Rio Branco, um experimento envolvendo quatro cultivares de sorgo procedentes do CNPMS, em Minas Gerais.

Summa confessionalis / Do. Antonini Archiepiscopi Floren[tini] ; opus aureum (quod Summa confessionalis, siue Confessionale vocatur) omnibus confessionu[m] auditoribus vtilissimu[m] ac necessariu[m] ... nuper est redditum ...

Imp. deducido de la marca tip. en t8v (Baudrier. IV, p. 24)

Rescission and substitute property:Bainbridge v Bainbridge [2016] EWHC 898 (Ch)

One of the unresolved issues concerning equity’s jurisdiction to set aside dispositions for mistake is the nature of the proprietary consequences that ensue. The decision in Bainbridge v Bainbridge sheds further light on this important issue, but also illustrates that some important aspects concerning the application of rescission needs further clarification. The key issue concerned the rescission of a trust, where parts of the land had been sold by the trustees who had used the proceeds of sale to buy two new plots of land. Part of the reasoning used by Master Matthews relied upon authorities, developed in the context of fraudulently induced transfers of money, which requires careful consideration of the relationship between the principle in Pitt v Holt and unjust enrichment.